2 * Simulator of microcontrollers (uc.cc)
4 * Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
6 * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu
10 /* This file is part of microcontroller simulator: ucsim.
12 UCSIM is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
17 UCSIM is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with UCSIM; see the file COPYING. If not, write to the Free
24 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
61 cl_ticker::cl_ticker(int adir, int in_isr, char *aname)
68 name= aname?strdup(aname):0;
71 cl_ticker::~cl_ticker(void)
78 cl_ticker::tick(int nr)
86 cl_ticker::get_rtime(double xtal)
90 d= (double)ticks/xtal;
95 cl_ticker::dump(int nr, double xtal, class cl_console *con)
97 con->dd_printf("timer #%d(\"%s\") %s%s: %g sec (%lu clks)\n",
98 nr, name?name:"unnamed",
99 (options&TICK_RUN)?"ON":"OFF",
100 (options&TICK_INISR)?",ISR":"",
101 get_rtime(xtal), ticks);
106 * Abstract microcontroller
107 ******************************************************************************
110 cl_uc::cl_uc(class cl_sim *asim):
115 mems= new cl_list(MEM_TYPES, 1);
117 options= new cl_list(2, 2);
118 for (i= MEM_ROM; i < MEM_TYPES; i++)
120 ticks= new cl_ticker(+1, 0, "time");
121 isr_ticks= new cl_ticker(+1, TICK_INISR, "isr");
122 idle_ticks= new cl_ticker(+1, TICK_IDLE, "idle");
123 counters= new cl_list(2, 2);
124 it_levels= new cl_list(2, 2);
125 it_sources= new cl_irqs(2, 2);
126 class it_level *il= new it_level(-1, 0, 0, 0);
128 st_ops= new cl_list(2, 2);
129 errors= new cl_list(2, 2);
130 events= new cl_list(2, 2);
146 events->disconn_all();
164 if (!(sim->app->args->arg_avail('X')) ||
165 sim->app->args->get_farg('X', 0) == 0)
168 xtal= sim->app->args->get_farg('X', 0);
169 for (mc= MEM_ROM; mc < MEM_TYPES; mc++)
171 class cl_mem *m= mk_mem((enum mem_class)mc,
172 get_id_string(mem_classes, mc));
175 ebrk= new brk_coll(2, 2, /*(class cl_rom *)*/mem(MEM_ROM));
176 fbrk= new brk_coll(2, 2, /*(class cl_rom *)*/mem(MEM_ROM));
177 fbrk->Duplicates= DD_FALSE;
181 class cl_cmdset *cs= sim->app->get_commander()->cmdset;
184 for (i= 0; i < sim->app->in_files->count; i++)
186 char *fname= (char *)(sim->app->in_files->at(i));
188 if ((l= read_hex_file(fname)) >= 0)
190 sim->app->get_commander()->all_printf("%ld words read from %s\n",
198 cl_uc::id_string(void)
200 return("unknown microcontroller");
212 idle_ticks->ticks= 0;
213 /*FIXME should we clear user counters?*/
214 il= (class it_level *)(it_levels->top());
218 il= (class it_level *)(it_levels->pop());
220 il= (class it_level *)(it_levels->top());
226 for (i= 0; i < hws->count; i++)
228 class cl_hw *hw= (class cl_hw *)(hws->at(i));
238 cl_uc::mk_mem(enum mem_class type, char *class_name)
242 if (get_mem_size(type) < 0)
244 m= new cl_m(type, get_id_string(mem_classes, type),
245 get_mem_size(type), get_mem_width(type), this);
251 cl_uc::get_mem_size(enum mem_class type)
255 case MEM_ROM: return(0x10000);
256 case MEM_XRAM: return(0x10000);
257 case MEM_IRAM: return(0x80);
258 case MEM_SFR: return(0x100);
266 cl_uc::get_mem_width(enum mem_class type)
272 cl_uc::mk_hw_elements(void)
277 cl_uc::build_cmdset(class cl_cmdset *cmdset)
280 class cl_cmdset *cset;
282 cmdset->add(cmd= new cl_state_cmd("state", 0,
283 "state State of microcontroller",
284 "long help of state"));
287 cmdset->add(cmd= new cl_file_cmd("file", 0,
288 "file \"FILE\" Load FILE into ROM",
289 "long help of file"));
291 cmd->add_name("load");
293 cmdset->add(cmd= new cl_dl_cmd("download", 0,
294 "download,dl Load (intel.hex) data",
295 "long help of download"));
299 cmdset->add(cmd= new cl_pc_cmd("pc", 0,
300 "pc [addr] Set/get PC",
304 cmdset->add(cmd= new cl_reset_cmd("reset", 0,
306 "long help of reset"));
309 cmdset->add(cmd= new cl_dump_cmd("dump", 0,
310 "dump memory_type [start [stop [bytes_per_line]]]\n"
311 " Dump memory of specified type\n"
312 "dump bit... Dump bits",
313 "long help of dump"));
316 cmdset->add(cmd= new cl_di_cmd("di", 0,
317 "di [start [stop]] Dump Internal RAM",
321 cmdset->add(cmd= new cl_dx_cmd("dx", 0,
322 "dx [start [stop]] Dump External RAM",
326 cmdset->add(cmd= new cl_ds_cmd("ds", 0,
327 "ds [start [stop]] Dump SFR",
331 cmdset->add(cmd= new cl_dch_cmd("dch", 0,
332 "dch [start [stop]] Dump code in hex form",
333 "long help of dch"));
336 cmdset->add(cmd= new cl_dc_cmd("dc", 0,
337 "dc [start [stop]] Dump code in disass form",
341 cmdset->add(cmd= new cl_disassemble_cmd("disassemble", 0,
342 "disassemble [start [offset [lines]]]\n"
344 "long help of disassemble"));
347 cmdset->add(cmd= new cl_fill_cmd("fill", 0,
348 "fill memory_type start end data\n"
349 " Fill memory region with data",
350 "long help of fill"));
353 cmdset->add(cmd= new cl_where_cmd("where", 0,
354 "where memory_type data...\n"
355 " Case unsensitive search for data",
356 "long help of where"));
359 cmdset->add(cmd= new cl_Where_cmd("Where", 0,
360 "Where memory_type data...\n"
361 " Case sensitive search for data",
362 "long help of Where"));
365 cmdset->add(cmd= new cl_break_cmd("break", 0,
366 "break addr [hit] Set fix breakpoint\n"
367 "break mem_type r|w addr [hit]\n"
368 " Set fix event breakpoint",
369 "long help of break"));
372 cmdset->add(cmd= new cl_tbreak_cmd("tbreak", 0,
373 "tbreak addr [hit] Set temporary breakpoint\n"
374 "tbreak mem_type r|w addr [hit]\n"
375 " Set temporary event breakpoint",
376 "long help of tbreak"));
379 cmdset->add(cmd= new cl_clear_cmd("clear", 0,
380 "clear [addr...] Clear fix breakpoint",
381 "long help of clear"));
384 cmdset->add(cmd= new cl_delete_cmd("delete", 0,
385 "delete [nr...] Delete breakpoint(s)",
386 "long help of clear"));
390 cset= new cl_cmdset();
392 cset->add(cmd= new cl_get_sfr_cmd("sfr", 0,
393 "get sfr address...\n"
394 " Get value of addressed SFRs",
395 "long help of get sfr"));
397 cset->add(cmd= new cl_get_option_cmd("option", 0,
399 " Get value of an option",
400 "long help of get option"));
403 cmdset->add(cmd= new cl_super_cmd("get", 0,
404 "get subcommand Get, see `get' command for more help",
405 "long help of get", cset));
409 cset= new cl_cmdset();
411 cset->add(cmd= new cl_set_mem_cmd("memory", 0,
412 "set memory memory_type address data...\n"
413 " Place list of data into memory",
414 "long help of set memory"));
416 cset->add(cmd= new cl_set_bit_cmd("bit", 0,
417 "set bit addr 0|1 Set specified bit to 0 or 1",
418 "long help of set bit"));
420 cset->add(cmd= new cl_set_hw_cmd("hardware", 0,
421 "set hardware cathegory params...\n"
422 " Set parameters of specified hardware element",
423 "long help of set hardware"));
426 cset->add(cmd= new cl_set_option_cmd("option", 0,
427 "set option name value\n"
428 " Set value of an option",
429 "long help of set option"));
432 cmdset->add(cmd= new cl_super_cmd("set", 0,
433 "set subcommand Set, see `set' command for more help",
434 "long help of set", cset));
438 cset= new cl_cmdset();
440 cset->add(cmd= new cl_info_bp_cmd("breakpoints", 0,
441 "info breakpoints Status of user-settable breakpoints",
442 "long help of info breakpoints"));
445 cset->add(cmd= new cl_info_reg_cmd("registers", 0,
446 "info registers List of integer registers and their contents",
447 "long help of info registers"));
449 cset->add(cmd= new cl_info_hw_cmd("hardware", 0,
450 "info hardware cathegory\n"
451 " Status of hardware elements of the CPU",
452 "long help of info hardware"));
456 cmdset->add(cmd= new cl_super_cmd("info", 0,
457 "info subcommand Information, see `info' command for more help",
458 "long help of info", cset));
461 cmdset->add(cmd= new cl_timer_cmd("timer", 0,
462 "timer a|d|g|r|s|v id [direction|value]\n"
463 " Timer add|del|get|run|stop|value",
464 "timer add|create|make id [direction] -- create a new timer\n"
465 "timer del id -- delete a timer\n"
466 "timer get id -- list timers\n"
467 "timer run id -- turn a timer ON\n"
468 "timer stop id -- turn a timer OFF\n"
469 "timer value id val -- set value of a timer to `val'"));
475 * Read/write simulated memory
479 cl_uc::read_mem(enum mem_class type, t_addr addr)
483 if ((m= (class cl_mem*)mems->at(type)) == 0)
484 m= (class cl_mem*)(mems->at(MEM_DUMMY));
485 return(m->read(addr));
489 cl_uc::get_mem(enum mem_class type, t_addr addr)
493 if ((m= (class cl_mem*)mems->at(type)) == 0)
494 m= (class cl_mem*)(mems->at(MEM_DUMMY));
495 return(m->get(addr));
499 cl_uc::write_mem(enum mem_class type, t_addr addr, t_mem val)
503 if ((m= (class cl_mem*)mems->at(type)) == 0)
504 m= (class cl_mem*)(mems->at(MEM_DUMMY));
509 cl_uc::set_mem(enum mem_class type, t_addr addr, t_mem val)
513 if ((m= (class cl_mem*)mems->at(type)) == 0)
514 m= (class cl_mem*)(mems->at(MEM_DUMMY));
519 cl_uc::mem(enum mem_class type)
523 if (mems->count < type)
524 m= (class cl_mem *)(mems->at(MEM_DUMMY));
526 m= (class cl_mem *)(mems->at(type));
531 cl_uc::mem(char *class_name)
538 s= n= strdup(class_name);
547 for (i= 0; !found && i < mems->count; i++)
549 cl_mem *m= (cl_mem *)(mems->at(i));
554 s= mcn= strdup(m->class_name);
560 if (strstr(/*m->class_name*/mcn,/*class_name*/n) == /*m->class_name*/mcn)
574 ReadInt(FILE *f, bool *ok, int bytes)
582 if (fscanf(f, "%2c", &s2[0]) == EOF)
585 l= l*256 + strtol(s2, NULL, 16);
594 * Reading intel hexa file into EROM
595 *____________________________________________________________________________
597 * If parameter is a NULL pointer, this function reads data from `cmd_in'
602 cl_uc::read_hex_file(const char *name)
606 long written= 0, recnum= 0;
608 uchar dnum; // data number
609 uchar rtyp=0; // record type
610 uint addr= 0; // address
611 uchar rec[300]; // data record
612 uchar sum ; // checksum
620 sim->app->get_commander()->
621 dd_printf("cl_uc::read_hex_file File name not specified\n");
625 if ((f= fopen(name, "r")) == NULL)
627 fprintf(stderr, "Can't open `%s': %s\n", name, strerror(errno));
631 //memset(inst_map, '\0', sizeof(inst_map));
636 while (((c= getc(f)) != ':') &&
639 {fprintf(stderr, ": not found\n");break;}
641 dnum= ReadInt(f, &ok, 1);//printf("dnum=%02x",dnum);
643 addr= ReadInt(f, &ok, 2);//printf("addr=%04x",addr);
645 chk+= ((addr >> 8) & 0xff);
646 rtyp= ReadInt(f, &ok, 1);//printf("rtyp=%02x ",rtyp);
648 for (i= 0; ok && (i < dnum); i++)
650 rec[i]= ReadInt(f, &ok, 1);//printf("%02x",rec[i]);
655 sum= ReadInt(f, &ok, 1);//printf(" sum=%02x\n",sum);
658 if (((sum + chk) & 0xff) == 0)
662 if (get_mem_width(MEM_ROM) > 8)
664 for (i= 0; i < dnum; i++)
666 if (get_mem_width(MEM_ROM) <= 8)
668 set_mem(MEM_ROM, addr, rec[i]);
672 else if (get_mem_width(MEM_ROM) <= 16)
682 set_mem(MEM_ROM, addr, (high*256)+low);
691 if (sim->app->args->get_iarg('V', 0) &&
693 sim->app->get_commander()->
694 dd_printf("Unknown record type %d(0x%x)\n", rtyp, rtyp);
697 if (sim->app->args->get_iarg('V', 0))
698 sim->app->get_commander()->
699 dd_printf("Checksum error (%x instead of %x) in "
700 "record %ld.\n", chk, sum, recnum);
703 if (sim->app->args->get_iarg('V', 0))
704 sim->app->get_commander()->
705 dd_printf("Read error in record %ld.\n", recnum);
708 if (get_mem_width(MEM_ROM) > 8 &&
710 set_mem(MEM_ROM, addr, low);
714 if (sim->app->args->get_iarg('V', 0))
715 sim->app->get_commander()->dd_printf("%ld records have been read\n", recnum);
722 * Handling instruction map
724 * `inst_at' is checking if the specified address is in instruction
725 * map and `set_inst_at' marks the address in the map and
726 * `del_inst_at' deletes the mark. `there_is_inst' cheks if there is
727 * any mark in the map
731 cl_uc::inst_at(t_addr addr)
733 class cl_mem/*rom*/ *rom= /*(class cl_rom *)*/mem(MEM_ROM);
737 //return(rom->inst_map->get(addr));
738 return(rom->get_cell_flag(addr, CELL_INST));
742 cl_uc::set_inst_at(t_addr addr)
744 class cl_mem/*rom*/ *rom= /*(class cl_rom *)*/mem(MEM_ROM);
747 //rom->inst_map->set(addr);
748 rom->set_cell_flag(addr, DD_TRUE, CELL_INST);
752 cl_uc::del_inst_at(t_addr addr)
754 class cl_mem/*rom*/ *rom= /*(class cl_rom *)*/mem(MEM_ROM);
757 //rom->inst_map->clear(addr);
758 rom->set_cell_flag(addr, DD_FALSE, CELL_INST);
762 cl_uc::there_is_inst(void)
764 class cl_mem/*rom*/ *rom= /*(class cl_rom *)*/mem(MEM_ROM);
768 //return(!(rom->inst_map->empty()));
771 for (addr= 0; addr < rom->size && !got; addr++)
772 got= rom->get_cell_flag(addr, CELL_INST);
778 * Manipulating HW elements of the CPU
779 *****************************************************************************
782 /* Register callback hw objects for mem read/write */
785 cl_uc::register_hw_read(enum mem_class type, t_addr addr, class cl_hw *hw)
790 if ((m= (class cl_mem*)mems->at(type)))
792 if ((l= m->read_locs->get_loc(addr)) == 0)
794 l= new cl_memloc(addr);
796 m->read_locs->add(l);
801 printf("cl_uc::register_hw_read TROUBLE\n");
805 cl_uc::register_hw_write(enum mem_class type, t_addr addr, class cl_hw *hw)
809 /* Looking for a specific HW element */
812 cl_uc::get_hw(enum hw_cath cath, int *idx)
819 for (; i < hws->count; i++)
821 hw= (class cl_hw *)(hws->at(i));
822 if (hw->cathegory == cath)
833 cl_uc::get_hw(char *id_string, int *idx)
840 for (; i < hws->count; i++)
842 hw= (class cl_hw *)(hws->at(i));
843 if (strstr(hw->id_string, id_string) == hw->id_string)
854 cl_uc::get_hw(enum hw_cath cath, int hwid, int *idx)
861 hw= get_hw(cath, &i);
866 hw= get_hw(cath, &i);
875 cl_uc::get_hw(char *id_string, int hwid, int *idx)
882 hw= get_hw(id_string, &i);
887 hw= get_hw(id_string, &i);
897 * Help of the command interpreter
903 static struct dis_entry empty= { 0, 0, 0, 0, NULL };
910 static struct name_entry empty= { 0, 0 };
917 static struct name_entry empty= { 0, 0 };
922 cl_uc::disass(t_addr addr, char *sep)
926 buf= (char*)malloc(100);
927 strcpy(buf, "uc::disass() unimplemented\n");
932 cl_uc::print_disass(t_addr addr, class cl_console *con)
937 class cl_mem *rom= mem(MEM_ROM);
938 t_mem code= get_mem(MEM_ROM, addr);
943 dis= disass(addr, NULL);
945 con->dd_printf("%c", (b->perm == brkFIX)?'F':'D');
948 con->dd_printf("%c ", inst_at(addr)?' ':'?');
949 con->dd_printf(rom->addr_format, addr); con->dd_printf(" ");
950 con->dd_printf(rom->data_format, code);
951 for (i= 1; i < inst_length(addr); i++)
954 con->dd_printf(rom->data_format, get_mem(MEM_ROM, addr+i));
956 int li= longest_inst();
960 j= rom->width/4 + ((rom->width%4)?1:0) + 1;
962 con->dd_printf(" "), j--;
965 con->dd_printf(" %s\n", dis);
970 cl_uc::print_regs(class cl_console *con)
972 con->dd_printf("No registers\n");
976 cl_uc::inst_length(t_addr addr)
978 struct dis_entry *tabl= dis_tbl();
982 code = get_mem(MEM_ROM, addr);
983 for (i= 0; tabl[i].mnemonic && (code & tabl[i].mask) != tabl[i].code; i++) ;
984 return(tabl[i].mnemonic?tabl[i].length:1);
988 cl_uc::inst_branch(t_addr addr)
990 struct dis_entry *tabl= dis_tbl();
994 code = get_mem(MEM_ROM, addr);
995 for (i= 0; tabl[i].mnemonic && (code & tabl[i].mask) != tabl[i].code; i++)
997 return tabl[i].branch;
1001 cl_uc::longest_inst(void)
1003 struct dis_entry *de= dis_tbl();
1009 if (de->length > max)
1017 cl_uc::get_name(t_addr addr, struct name_entry tab[], char *buf)
1022 while (tab[i].name &&
1023 (!(tab[i].cpu_type & type) ||
1024 (tab[i].addr != addr)))
1027 strcpy(buf, tab[i].name);
1028 return(tab[i].name != NULL);
1032 cl_uc::symbolic_bit_name(t_addr bit_address,
1041 while (bit_tbl()[i].name &&
1042 (bit_tbl()[i].addr != bit_address))
1044 if (bit_tbl()[i].name)
1046 sym_name= strdup(bit_tbl()[i].name);
1052 strstr(mem->class_name, "sfr") == mem->class_name)
1055 while (sfr_tbl()[i].name &&
1056 (sfr_tbl()[i].addr != mem_addr))
1058 if (sfr_tbl()[i].name)
1059 sym_name= strdup(sfr_tbl()[i].name);
1065 sym_name= (char *)malloc(16);
1066 sprintf(sym_name, mem?(mem->addr_format):"0x%06x", mem_addr);
1068 sym_name= (char *)realloc(sym_name, strlen(sym_name)+2);
1069 strcat(sym_name, ".");
1071 while (bit_mask > 1)
1077 sprintf(bitnumstr, "%1d", i);
1078 strcat(sym_name, bitnumstr);
1084 * Messages to broadcast
1088 cl_uc::mem_cell_changed(class cl_mem *mem, t_addr addr)
1091 hws->mem_cell_changed(mem, addr);
1093 printf("JAJ uc\n");//FIXME
1098 for (i= 0; i < mems->count; i++)
1110 cl_uc::error(class cl_error *error)
1113 if ((error->inst= inst_exec))
1118 cl_uc::check_errors(void)
1121 class cl_commander *c= sim->app->get_commander();
1125 for (i= 0; i < errors->count; i++)
1127 class cl_error *error= (class cl_error *)(errors->at(i));
1131 class cl_console *con;
1132 con= c->actual_console;
1134 con= c->frozen_console;
1136 print_disass(error->PC, con);
1142 fprintf(stderr, "no actual console, %d errors\n", errors->count);
1147 * Converting bit address into real memory
1151 cl_uc::bit2mem(t_addr bitaddr, t_addr *memaddr, t_mem *bitmask)
1156 *bitmask= 1 << (bitaddr & 0x7);
1157 return(0); // abstract...
1166 cl_uc::tick_hw(int cycles)
1169 int i;//, cpc= clock_per_cycle();
1172 for (i= 0; i < hws->count; i++)
1174 hw= (class cl_hw *)(hws->at(i));
1175 if (hw->flags & HWF_INSIDE)
1178 do_extra_hw(cycles);
1183 cl_uc::do_extra_hw(int cycles)
1187 cl_uc::tick(int cycles)
1190 int i, cpc= clock_per_cycle();
1193 ticks->tick(cycles * cpc);
1194 class it_level *il= (class it_level *)(it_levels->top());
1196 isr_ticks->tick(cycles * cpc);
1197 if (state == stIDLE)
1198 idle_ticks->tick(cycles * cpc);
1199 for (i= 0; i < counters->count; i++)
1201 class cl_ticker *t= (class cl_ticker *)(counters->at(i));
1204 if ((t->options&TICK_INISR) ||
1206 t->tick(cycles * cpc);
1210 // tick for hardwares
1211 inst_ticks+= cycles;
1216 cl_uc::get_counter(int nr)
1218 if (nr >= counters->count)
1220 return((class cl_ticker *)(counters->at(nr)));
1224 cl_uc::get_counter(char *name)
1230 for (i= 0; i < counters->count; i++)
1232 class cl_ticker *t= (class cl_ticker *)(counters->at(i));
1235 strcmp(t->name, name) == 0)
1242 cl_uc::add_counter(class cl_ticker *ticker, int nr)
1244 while (counters->count <= nr)
1246 counters->put_at(nr, ticker);
1250 cl_uc::add_counter(class cl_ticker *ticker, char */*name*/)
1254 if (counters->count < 1)
1256 for (i= 1; i < counters->count; i++)
1258 class cl_ticker *t= (class cl_ticker *)(counters->at(i));
1261 counters->put_at(i, ticker);
1265 counters->add(ticker);
1269 cl_uc::del_counter(int nr)
1273 if (nr >= counters->count)
1275 if ((t= (class cl_ticker *)(counters->at(0))) != 0)
1277 counters->put_at(nr, 0);
1281 cl_uc::del_counter(char *name)
1287 for (i= 0; i < counters->count; i++)
1289 class cl_ticker *t= (class cl_ticker *)(counters->at(i));
1292 strcmp(t->name, name) == 0)
1295 counters->put_at(i, 0);
1302 * Fetch without checking for breakpoint hit
1310 code= read_mem(MEM_ROM, PC);
1312 if (PC >= get_mem_size(MEM_ROM))
1318 * Fetch but checking for breakpoint hit first, returns TRUE if
1319 * a breakpoint is hit
1323 cl_uc::fetch(t_mem *code)
1330 if (sim->state & SIM_GO)
1332 if (mem(MEM_ROM)->get_cell_flag(PC, CELL_FETCH_BRK) &&
1333 (brk= fbrk->get_bp(PC, &idx)) &&
1336 if (brk->perm == brkDYNAMIC)
1346 cl_uc::do_inst(int step)
1365 cl_uc::pre_inst(void)
1369 events->disconn_all();
1373 cl_uc::exec_inst(void)
1380 cl_uc::post_inst(void)
1382 tick_hw(inst_ticks);
1387 inst_exec= DD_FALSE;
1392 * Time related functions
1396 cl_uc::get_rtime(void)
1400 d= (double)ticks/xtal;
1402 return(ticks->get_rtime(xtal));
1406 cl_uc::clock_per_cycle(void)
1413 * Stack tracking system
1417 cl_uc::st_push(class cl_stack_op *op)
1423 cl_uc::st_call(class cl_stack_op *op)
1429 cl_uc::st_pop(class cl_stack_op *op)
1431 class cl_stack_op *sop= (class cl_stack_op *)(st_ops->pop());
1439 cl_uc::st_ret(class cl_stack_op *op)
1441 class cl_stack_op *sop= (class cl_stack_op *)(st_ops->pop());
1450 * Breakpoint handling
1453 class cl_fetch_brk *
1454 cl_uc::fbrk_at(t_addr addr)
1458 return((class cl_fetch_brk *)(fbrk->get_bp(addr, &idx)));
1462 cl_uc::ebrk_at(t_addr addr, char *id)
1465 class cl_ev_brk *eb;
1467 for (i= 0; i < ebrk->count; i++)
1469 eb= (class cl_ev_brk *)(ebrk->at(i));
1470 if (eb->addr == addr &&
1471 !strcmp(eb->id, id))
1478 cl_uc::rm_fbrk(long addr)
1483 /* Get a breakpoint specified by its number */
1486 cl_uc::brk_by_nr(int nr)
1490 if ((bp= fbrk->get_bp(nr)))
1492 if ((bp= ebrk->get_bp(nr)))
1497 /* Get a breakpoint from the specified collection by its number */
1500 cl_uc::brk_by_nr(class brk_coll *bpcoll, int nr)
1504 if ((bp= bpcoll->get_bp(nr)))
1509 /* Remove an event breakpoint specified by its address and id */
1512 cl_uc::rm_ebrk(t_addr addr, char *id)
1515 class cl_ev_brk *eb;
1517 for (i= 0; i < ebrk->count; i++)
1519 eb= (class cl_ev_brk *)(ebrk->at(i));
1520 if (eb->addr == addr &&
1521 !strcmp(eb->id, id))
1526 /* Remove a breakpoint specified by its number */
1529 cl_uc::rm_brk(int nr)
1533 if ((bp= brk_by_nr(fbrk, nr)))
1535 fbrk->del_bp(bp->addr);
1538 else if ((bp= brk_by_nr(ebrk, nr)))
1540 ebrk->del_bp(ebrk->index_of(bp), 0);
1547 cl_uc::put_breaks(void)
1550 /* Remove all fetch and event breakpoints */
1553 cl_uc::remove_all_breaks(void)
1557 class cl_brk *brk= (class cl_brk *)(fbrk->at(0));
1558 fbrk->del_bp(brk->addr);
1561 ebrk->del_bp(ebrk->count-1, 0);
1565 cl_uc::make_new_brknr(void)
1567 if (brk_counter == 0)
1568 return(brk_counter= 1);
1569 if (fbrk->count == 0 &&
1571 return(brk_counter= 1);
1572 return(++brk_counter);
1576 cl_uc::mk_ebrk(enum brk_perm perm, class cl_mem *mem,
1577 char op, t_addr addr, int hit)
1582 b= new cl_ev_brk(mem, make_new_brknr(), addr, perm, hit, op);
1588 cl_uc::check_events(void)
1590 sim->stop(resBREAKPOINT);