2 * Simulator of microcontrollers (uc89c51r.cc)
4 * Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
6 * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu
10 /* This file is part of microcontroller simulator: ucsim.
12 UCSIM is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
17 UCSIM is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with UCSIM; see the file COPYING. If not, write to the Free
24 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
33 #include "uc89c51rcl.h"
39 cl_uc89c51r::cl_uc89c51r(int Itype, int Itech, class cl_sim *asim):
40 cl_uc51r(Itype, Itech, asim)
46 cl_uc89c51r::mk_hw_elements(void)
50 cl_uc52::mk_hw_elements();
51 hws->add(h= new cl_wdt(this, 0x3fff));
53 hws->add(h= new cl_pca(this, 0));
55 hws->add(h= new cl_89c51r_dummy_hw(this));
60 cl_uc89c51r::make_memories(void)
62 cl_uc52::make_memories();
67 cl_uc89c51r::reset(void)
70 sfr->set_bit1(CCAPM0, bmECOM);
71 sfr->set_bit1(CCAPM1, bmECOM);
72 sfr->set_bit1(CCAPM2, bmECOM);
73 sfr->set_bit1(CCAPM3, bmECOM);
74 sfr->set_bit1(CCAPM4, bmECOM);
76 dpl0= dph0= dpl1= dph1= 0;
81 cl_uc89c51r::it_priority(uchar ie_mask)
85 l= sfr->get(IP) & ie_mask;
86 h= sfr->get(IPH) & ie_mask;
99 cl_uc89c51r::pre_inst(void)
101 if (sfr->get(AUXR1) & bmDPS)
111 cl_uc51r::pre_inst();
115 cl_uc89c51r::post_inst(void)
117 if (sfr->get(AUXR1) & bmDPS)
127 cl_uc51r::post_inst();
134 cl_89c51r_dummy_hw::cl_89c51r_dummy_hw(class cl_uc *auc):
135 cl_hw(auc, HW_DUMMY, 0, "_89c51r_dummy")
139 cl_89c51r_dummy_hw::init(void)
141 class cl_address_space *sfr= uc->address_space(MEM_SFR_ID);
144 fprintf(stderr, "No SFR to register %s[%d] into\n", id_string, id);
146 //auxr= sfr->register_hw(AUXR, this, 0);
147 register_cell(sfr, AUXR, &auxr, wtd_restore);
152 cl_89c51r_dummy_hw::write(class cl_memory_cell *cell, t_mem *val)
155 auxr->set_bit0(0x04);
159 /* End of s51.src/uc89c51r.cc */