2 * Simulator of microcontrollers (uc89c51r.cc)
4 * Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
6 * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu
10 /* This file is part of microcontroller simulator: ucsim.
12 UCSIM is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
17 UCSIM is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with UCSIM; see the file COPYING. If not, write to the Free
24 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
33 #include "uc89c51rcl.h"
37 t_uc89c51r::t_uc89c51r(int Itype, int Itech, class cl_sim *asim):
38 t_uc51r(Itype, Itech, asim)
40 it_sources->add_at(4, new cl_it_src(bmEC, CCON, bmCCF4, 0x0033, false,
42 it_sources->add_at(4, new cl_it_src(bmEC, CCON, bmCCF3, 0x0033, false,
44 it_sources->add_at(4, new cl_it_src(bmEC, CCON, bmCCF2, 0x0033, false,
46 it_sources->add_at(4, new cl_it_src(bmEC, CCON, bmCCF1, 0x0033, false,
48 it_sources->add_at(4, new cl_it_src(bmEC, CCON, bmCCF0, 0x0033, false,
50 it_sources->add_at(4, new cl_it_src(bmEC, CCON, bmCF, 0x0033, false,
56 t_uc89c51r::reset(void)
59 mem(MEM_SFR)->set_bit1(CCAPM0, bmECOM);
60 mem(MEM_SFR)->set_bit1(CCAPM1, bmECOM);
61 mem(MEM_SFR)->set_bit1(CCAPM2, bmECOM);
62 mem(MEM_SFR)->set_bit1(CCAPM3, bmECOM);
63 mem(MEM_SFR)->set_bit1(CCAPM4, bmECOM);
65 dpl0= dph0= dpl1= dph1= 0;
66 set_mem(MEM_SFR, IPH, 0);
70 t_uc89c51r::proc_write(uchar *addr)
72 t_uc51r::proc_write(addr);
74 if (addr == &(/*MEM(MEM_SFR)*/sfr->umem8[CCAP0L]))
75 mem(MEM_SFR)->set_bit0(CCAPM0, bmECOM);
76 if (addr == &(/*MEM(MEM_SFR)*/sfr->umem8[CCAP0H]))
77 mem(MEM_SFR)->set_bit1(CCAPM0, bmECOM);
79 if (addr == &(/*MEM(MEM_SFR)*/sfr->umem8[CCAP1L]))
80 mem(MEM_SFR)->set_bit0(CCAPM1, bmECOM);
81 if (addr == &(/*MEM(MEM_SFR)*/sfr->umem8[CCAP1H]))
82 mem(MEM_SFR)->set_bit1(CCAPM1, bmECOM);
84 if (addr == &(/*MEM(MEM_SFR)*/sfr->umem8[CCAP2L]))
85 mem(MEM_SFR)->set_bit0(CCAPM2, bmECOM);
86 if (addr == &(/*MEM(MEM_SFR)*/sfr->umem8[CCAP2H]))
87 mem(MEM_SFR)->set_bit1(CCAPM2, bmECOM);
89 if (addr == &(/*MEM(MEM_SFR)*/sfr->umem8[CCAP3L]))
90 mem(MEM_SFR)->set_bit0(CCAPM3, bmECOM);
91 if (addr == &(/*MEM(MEM_SFR)*/sfr->umem8[CCAP3H]))
92 mem(MEM_SFR)->set_bit1(CCAPM3, bmECOM);
94 if (addr == &(/*MEM(MEM_SFR)*/sfr->umem8[CCAP4L]))
95 mem(MEM_SFR)->set_bit0(CCAPM4, bmECOM);
96 if (addr == &(/*MEM(MEM_SFR)*/sfr->umem8[CCAP4H]))
97 mem(MEM_SFR)->set_bit1(CCAPM4, bmECOM);
99 if (addr == &(/*MEM(MEM_SFR)*/sfr->umem8[AUXR]))
100 mem(MEM_SFR)->set_bit0(AUXR, 0x04);
104 t_uc89c51r::read(uchar *addr)
106 return(t_uc51r::read(addr));
110 t_uc89c51r::it_priority(uchar ie_mask)
114 l= get_mem(MEM_SFR, IP) & ie_mask;
115 h= get_mem(MEM_SFR, IPH) & ie_mask;
128 t_uc89c51r::pre_inst(void)
130 if (get_mem(MEM_SFR, AUXR1) & bmDPS)
132 set_mem(MEM_SFR, DPL, dpl1);
133 set_mem(MEM_SFR, DPH, dph1);
137 set_mem(MEM_SFR, DPL, dpl0);
138 set_mem(MEM_SFR, DPH, dph0);
143 t_uc89c51r::post_inst(void)
145 if (get_mem(MEM_SFR, AUXR1) & bmDPS)
147 dpl1= get_mem(MEM_SFR, DPL);
148 dph1= get_mem(MEM_SFR, DPH);
152 dpl0= get_mem(MEM_SFR, DPL);
153 dph0= get_mem(MEM_SFR, DPH);
161 * Calling inherited method to simulate timer #0, #1, #2 and then
162 * simulating Programmable Counter Array
166 t_uc89c51r::do_timers(int cycles)
170 if ((res= t_uc51r::do_timers(cycles)) != resGO)
172 return(do_pca(cycles));
176 t_uc89c51r::t0_overflow(void)
178 uchar cmod= get_mem(MEM_SFR, CMOD) & (bmCPS0|bmCPS1);
187 * Simulating Programmable Counter Array
191 t_uc89c51r::do_pca(int cycles)
194 uint ccon= get_mem(MEM_SFR, CCON);
198 if (state == stIDLE &&
202 switch (get_mem(MEM_SFR, CMOD) & (bmCPS1|bmCPS0))
205 ret= do_pca_counter(cycles);
208 ret= do_pca_counter(cycles*3);
211 ret= do_pca_counter(t0_overflows);
214 case (bmCPS0|bmCPS1):
215 if ((prev_p1 & bmECI) != 0 &
216 (get_mem(MEM_SFR, P1) & bmECI) == 0)
224 t_uc89c51r::do_pca_counter(int cycles)
228 if (/*++(MEM(MEM_SFR)[CL])*/sfr->add(CL, 1) == 0)
230 if (/*++(MEM(MEM_SFR)[CH])*/sfr->add(CH, 1) == 0)
233 mem(MEM_SFR)->set_bit1(CCON, bmCF);
246 t_uc89c51r::do_pca_module(int nr)
248 uchar CCAPM[5]= {0xda, 0xdb, 0xdc, 0xdd, 0xde};
249 uchar CCAPL[5]= {0xea, 0xeb, 0xec, 0xed, 0xee};
250 uchar CCAPH[5]= {0xfa, 0xfb, 0xfc, 0xfd, 0xfe};
251 uchar bmCEX[5]= {bmCEX0, bmCEX1, bmCEX2, bmCEX3, bmCEX4};
252 uchar bmCCF[5]= {bmCCF0, bmCCF1, bmCCF2, bmCCF3, bmCCF4};
253 uchar ccapm= get_mem(MEM_SFR, CCAPM[nr]);
254 uint p1= get_mem(MEM_SFR, P1);
258 (prev_p1 & bmCEX[nr]) == 0 &&
259 (p1 & bmCEX[nr]) != 0)
262 (prev_p1 & bmCEX[nr]) != 0 &&
263 (p1 & bmCEX[nr]) == 0)
267 //MEM(MEM_SFR)[CCAPL[nr]]= MEM(MEM_SFR)[CL];
268 sfr->set(CCAPL[nr], sfr->get(CL));
269 //MEM(MEM_SFR)[CCAPH[nr]]= MEM(MEM_SFR)[CH];
270 sfr->set(CCAPH[nr], sfr->get(CH));
271 mem(MEM_SFR)->set_bit1(CCON, bmCCF[nr]);
276 /* Comparator enabled */
277 /*if (MEM(MEM_SFR)[CL] == MEM(MEM_SFR)[CCAPL[nr]] &&
278 MEM(MEM_SFR)[CH] == MEM(MEM_SFR)[CCAPH[nr]])*/
279 if (sfr->get(CL) == sfr->get(CCAPL[nr]) &&
280 sfr->get(CH) == sfr->get(CCAPH[nr]))
284 (/*MEM(MEM_SFR)[CMOD]*/sfr->get(CMOD) & bmWDTE))
288 mem(MEM_SFR)->set_bit1(CCON, bmCCF[nr]);
292 //MEM(MEM_SFR)[P1]^= bmCEX[nr];
293 sfr->set(P1, sfr->get(P1) ^ bmCEX[nr]);
299 if (/*MEM(MEM_SFR)[CL]*/sfr->get(CL) == 0)
300 //MEM(MEM_SFR)[CCAPL[nr]]= MEM(MEM_SFR)[CCAPH[nr]];
301 sfr->set(CCAPL[nr], sfr->get(CCAPH[nr]));
302 if (/*MEM(MEM_SFR)[CL]*/sfr->get(CL) <
303 /*MEM(MEM_SFR)[CCAPL[nr]]*/sfr->get(CCAPL[nr]))
304 //MEM(MEM_SFR)[P1]&= ~(bmCEX[nr]);
305 sfr->set(P1, sfr->get(P1) & ~(bmCEX[nr]));
307 mem(MEM_SFR)->set_bit1(P1, bmCEX[nr]);
315 /* End of s51.src/uc89c51r.cc */