2 * Simulator of microcontrollers (mov.cc)
4 * Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
6 * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu
10 /* This file is part of microcontroller simulator: ucsim.
12 UCSIM is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
17 UCSIM is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with UCSIM; see the file COPYING. If not, write to the Free
24 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
28 /* Bugs fixed by Sandeep Dutta:
29 * source<->dest bug in "mov direct,direct"
30 * get register in "mov @ri,address"
46 * 0x74 2 12 MOV A,#data
47 *____________________________________________________________________________
52 cl_51core::inst_mov_a_Sdata(uchar code)
60 * 0x75 3 24 MOV addr,#data
61 *____________________________________________________________________________
66 cl_51core::inst_mov_addr_Sdata(uchar code)
68 class cl_memory_cell *cell;
70 cell= get_direct(fetch());
78 * 0x76-0x77 2 12 MOV @Ri,#data
79 *____________________________________________________________________________
84 cl_51core::inst_mov_Sri_Sdata(uchar code)
86 class cl_memory_cell *cell;
88 cell= iram->get_cell(get_reg(code & 0x01)->read());
96 * 0x78-0x7f 2 12 MOV Rn,#data
97 *____________________________________________________________________________
102 cl_51core::inst_mov_rn_Sdata(uchar code)
104 class cl_memory_cell *reg;
106 reg= get_reg(code & 0x07);
113 * 0x93 1 24 MOVC A,@A+DPTR
114 *____________________________________________________________________________
119 cl_51core::inst_movc_a_Sa_pc(uchar code)
121 acc->write(rom->read(PC + acc->read()));
128 * 0x85 3 24 MOV addr,addr
129 *____________________________________________________________________________
134 cl_51core::inst_mov_addr_addr(uchar code)
136 class cl_memory_cell *d, *s;
138 /* SD reversed s & d here */
139 s= get_direct(fetch());
140 d= get_direct(fetch());
148 * 0x86-0x87 2 24 MOV addr,@Ri
149 *____________________________________________________________________________
154 cl_51core::inst_mov_addr_Sri(uchar code)
156 class cl_memory_cell *d, *s;
158 d= get_direct(fetch());
159 s= iram->get_cell(get_reg(code & 0x01)->read());
167 * 0x88-0x8f 2 24 MOV addr,Rn
168 *____________________________________________________________________________
173 cl_51core::inst_mov_addr_rn(uchar code)
175 class cl_memory_cell *cell;
177 cell= get_direct(fetch());
178 cell->write(get_reg(code & 0x07)->read());
185 * 0x90 3 24 MOV DPTR,#data
186 *____________________________________________________________________________
191 cl_51core::inst_mov_dptr_Sdata(uchar code)
193 sfr->write(DPH, fetch());
194 sfr->write(DPL, fetch());
201 * 0x93 1 24 MOVC A,@A+DPTR
202 *____________________________________________________________________________
207 cl_51core::inst_movc_a_Sa_dptr(uchar code)
209 acc->write(rom->read(sfr->read(DPH)*256+sfr->read(DPL) + acc->read()));
216 * 0xa6-0xa7 2 24 MOV @Ri,addr
217 *____________________________________________________________________________
222 cl_51core::inst_mov_Sri_addr(uchar code)
224 class cl_memory_cell *d, *s;
226 d= iram->get_cell(get_reg(code & 0x01)->read());
227 s= get_direct(fetch());
235 * 0xa8-0xaf 2 24 MOV Rn,addr
236 *____________________________________________________________________________
241 cl_51core::inst_mov_rn_addr(uchar code)
243 class cl_memory_cell *reg, *cell;
245 reg = get_reg(code & 0x07);
246 cell= get_direct(fetch());
247 reg->write(cell->read());
254 * 0xc0 2 24 PUSH addr
255 *____________________________________________________________________________
260 cl_51core::inst_push(uchar code)
262 t_addr sp, sp_before/*, sp_after*/;
264 class cl_memory_cell *stck, *cell;
266 cell= get_direct(fetch());
267 sp_before= sfr->get(SP);
268 sp= /*sp_after= */sfr->wadd(SP, 1);
269 stck= iram->get_cell(sp);
270 stck->write(data= cell->read());
271 class cl_stack_op *so=
272 new cl_stack_push(instPC, data, sp_before, sp/*_after*/);
281 * 0xc5 2 12 XCH A,addr
282 *____________________________________________________________________________
287 cl_51core::inst_xch_a_addr(uchar code)
290 class cl_memory_cell *cell;
292 cell= get_direct(fetch());
294 acc->write(cell->read());
301 * 0xc6-0xc7 1 12 XCH A,@Ri
302 *____________________________________________________________________________
307 cl_51core::inst_xch_a_Sri(uchar code)
310 class cl_memory_cell *cell;
312 cell= iram->get_cell(get_reg(code & 0x01)->read());
314 acc->write(cell->read());
321 * 0xc8-0xcf 1 12 XCH A,Rn
322 *____________________________________________________________________________
327 cl_51core::inst_xch_a_rn(uchar code)
330 class cl_memory_cell *reg;
332 reg = get_reg(code & 0x07);
334 acc->write(reg->read());
342 *____________________________________________________________________________
347 cl_51core::inst_pop(uchar code)
349 t_addr sp, sp_before/*, sp_after*/;
351 class cl_memory_cell *cell, *stck;
353 sp_before= sfr->get(SP);
354 cell= get_direct(fetch());
355 stck= iram->get_cell(sfr->get(SP));
356 cell->write(data= stck->read());
357 sp= /*sp_after= */sfr->wadd(SP, -1);
359 class cl_stack_op *so=
360 new cl_stack_pop(instPC, data, sp_before, sp/*_after*/);
368 * 0xd6-0xd7 1 12 XCHD A,@Ri
369 *____________________________________________________________________________
374 cl_51core::inst_xchd_a_Sri(uchar code)
377 class cl_memory_cell *cell;
379 cell= iram->get_cell(get_reg(code & 0x01)->read());
380 temp= (d= cell->read()) & 0x0f;
381 cell->write((d & 0xf0) | (acc->read() & 0x0f));
382 acc->write((acc->get() & 0xf0) | temp);
388 * 0xe0 1 24 MOVX A,@DPTR
389 *____________________________________________________________________________
394 cl_51core::inst_movx_a_Sdptr(uchar code)
396 acc->write(xram->read(sfr->read(DPH)*256 + sfr->read(DPL)));
403 * 0xe2-0xe3 1 24 MOVX A,@Ri
404 *____________________________________________________________________________
409 cl_51core::inst_movx_a_Sri(uchar code)
413 d= get_reg(code & 0x01)->read();
414 acc->write(xram->read(sfr->read(P2)*256 + d));
421 * 0xe5 2 12 MOV A,addr
422 *____________________________________________________________________________
427 cl_51core::inst_mov_a_addr(uchar code)
429 class cl_memory_cell *cell;
430 t_addr address= fetch();
432 /* If this is ACC, it is an invalid instruction */
435 //sim->app->get_commander()->
436 //debug("Invalid Instruction : E5 E0 MOV A,ACC at %06x\n", PC);
441 cell= get_direct(address);
442 acc->write(cell->read());
449 * 0xe6-0xe7 1 12 MOV A,@Ri
450 *____________________________________________________________________________
455 cl_51core::inst_mov_a_Sri(uchar code)
457 class cl_memory_cell *cell;
459 cell= iram->get_cell(get_reg(code & 0x01)->read());
460 acc->write(cell->read());
466 * 0xe8-0xef 1 12 MOV A,Rn
467 *____________________________________________________________________________
472 cl_51core::inst_mov_a_rn(uchar code)
474 acc->write(get_reg(code & 0x07)->read());
480 * 0xf0 1 24 MOVX @DPTR,A
481 *____________________________________________________________________________
486 cl_51core::inst_movx_Sdptr_a(uchar code)
488 xram->write(sfr->read(DPH)*256 + sfr->read(DPL), acc->read());
495 * 0xf2-0xf3 1 24 MOVX @Ri,A
496 *____________________________________________________________________________
501 cl_51core::inst_movx_Sri_a(uchar code)
505 d= get_reg(code & 0x01)->read();
506 xram->write(sfr->read(P2)*256 + d, acc->read());
513 * 0xf5 2 12 MOV addr,A
514 *____________________________________________________________________________
519 cl_51core::inst_mov_addr_a(uchar code)
521 class cl_memory_cell *cell;
523 cell= get_direct(fetch());
524 cell->write(acc->read());
530 * 0xf6-0xf7 1 12 MOV @Ri,A
531 *____________________________________________________________________________
536 cl_51core::inst_mov_Sri_a(uchar code)
538 class cl_memory_cell *cell;
540 cell= iram->get_cell(get_reg(code & 0x01)->read());
541 cell->write(acc->read());
547 * 0xf8-0xff 1 12 MOV Rn,A
548 *____________________________________________________________________________
553 cl_51core::inst_mov_rn_a(uchar code)
555 class cl_memory_cell *reg;
557 reg= get_reg(code &0x07);
558 reg->write(acc->read());
563 /* End of s51.src/mov.cc */