2 * Simulator of microcontrollers (logic_inst.cc)
4 * Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
6 * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu
10 /* This file is part of microcontroller simulator: ucsim.
12 UCSIM is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
17 UCSIM is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with UCSIM; see the file COPYING. If not, write to the Free
24 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
33 * Logical OR with Immediate
34 * ORI Rd,K 16<=d<=31 0<=K<=255
36 *____________________________________________________________________________
40 cl_avr::ori_Rd_K(t_mem code)
46 K= ((code&0xf00)>>4)|(code&0xf);
47 data= K | ram->read(d);
48 ram->write(d+16, data);
55 * Logical AND with Immediate
56 * ANDI Rd,K 16<=d<=31 0<=K<=255
58 *____________________________________________________________________________
62 cl_avr::andi_Rd_K(t_mem code)
68 K= ((code&0xf00)>>4)|(code&0xf);
69 data= K & ram->read(d);
70 ram->write(d+16, data);
78 * AND Rd,Rr 0<=d<=31 0<=r<=31
80 *____________________________________________________________________________
84 cl_avr::and_Rd_Rr(t_mem code)
90 r= ((code&0x200)>>5)|(code&0xf);
91 data= ram->read(d) & ram->read(r);
100 * EOR Rd,Rr 0<=d<=31 0<=r<=31
101 * 0010 01rd dddd rrrr
102 *____________________________________________________________________________
106 cl_avr::eor_Rd_Rr(t_mem code)
112 r= ((code&0x200)>>5)|(code&0xf);
113 data= ram->read(d) ^ ram->read(r);
122 * OR Rd,Rr 0<=d<=31 0<=r<=31
123 * 0010 10rd dddd rrrr
124 *____________________________________________________________________________
128 cl_avr::or_Rd_Rr(t_mem code)
134 r= ((code&0x200)>>5)|(code&0xf);
135 data= ram->read(d) | ram->read(r);
142 /* End of avr.src/logic_inst.cc */