2 * Simulator of microcontrollers (jmp_inst.cc)
4 * Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
6 * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu
10 /* This file is part of microcontroller simulator: ucsim.
12 UCSIM is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
17 UCSIM is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with UCSIM; see the file COPYING. If not, write to the Free
24 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
36 *____________________________________________________________________________
40 cl_avr::ijmp(t_mem code)
44 z= ram->get(ZH)*256 + ram->get(ZL);
45 PC= ((PC & ~0xffff) | z) % rom->size;
52 cl_avr::eijmp(t_mem code)
59 * Indirect Call to Subroutine
62 *____________________________________________________________________________
66 cl_avr::icall(t_mem code)
75 PC= (PC & ~0xffff) | (z & 0xffff);
83 cl_avr::eicall(t_mem code)
90 * Return from Subroutine
93 *____________________________________________________________________________
97 cl_avr::ret(t_mem code)
109 * Return from Interrupt
111 * 1001 0101 0XX1 1000
112 *____________________________________________________________________________
116 cl_avr::reti(t_mem code)
122 t_mem sreg= ram->read(SREG);
124 ram->write(SREG, sreg);
133 * 1100 kkkk kkkk kkkk
134 *____________________________________________________________________________
138 cl_avr::rjmp_k(t_mem code)
140 long k= code & 0xfff, pc;
154 * Relative Call to Subroutine
156 * 1101 kkkk kkkk kkkk -1K<=k<=+1k
157 *____________________________________________________________________________
161 cl_avr::rcall_k(t_mem code)
169 PC= (signed)PC + (signed)k;
178 * Compare Skip if Equal
179 * CPSE Rd,Rr 0<=d<=31, 0<=r<=31
180 * 0001 00rd dddd rrrr
181 *____________________________________________________________________________
185 cl_avr::cpse_Rd_Rr(t_mem code)
190 r= ((code&0x200)>>5)|(code&0xf);
191 if (ram->read(r) == ram->read(d))
193 t_mem next_code= rom->get(PC);
195 struct dis_entry *dt= dis_tbl();
196 while ((next_code & dt[i].mask) != dt[i].code &&
199 if (dt[i].mnemonic != NULL)
201 PC= (PC + dt[i].length) % get_mem_size(MEM_ROM);
214 * 1001 010k kkkk 110k
215 * kkkk kkkk kkkk kkkk
216 *____________________________________________________________________________
220 cl_avr::jmp_k(t_mem code)
224 k= ((code&0x1f0)>>3)|(code&1);
233 * Long Call to a Subroutine
234 * CALL k 0<=k<=64k/4M
235 * 1001 010k kkkk 111k
236 * kkkk kkkk kkkk kkkk
237 *____________________________________________________________________________
241 cl_avr::call_k(t_mem code)
245 k= (((code&0x1f0)>>3)|(code&1))*0x10000;
255 * Branch if Bit in SREG is Set
256 * BRBS s,k 0<=s<=7, -64<=k<=+63
257 * 1111 00kk kkkk ksss
258 *____________________________________________________________________________
262 cl_avr::brbs_s_k(t_mem code)
268 t_mem sreg= ram->get(SREG);
274 PC= (PC+k) % rom->size;
282 * Branch if Bit in SREG is Cleared
283 * BRBC s,k 0<=s<=7, -64<=k<=+63
284 * 1111 01kk kkkk ksss
285 *____________________________________________________________________________
289 cl_avr::brbc_s_k(t_mem code)
295 t_mem sreg= ram->get(SREG);
301 PC= (PC+k) % rom->size;
309 * Skip if Bit in Register is Cleared
310 * SBRC Rr,b 0<=r<=31, 0<=b<=7
311 * 1111 110r rrrr Xbbb
312 *____________________________________________________________________________
316 cl_avr::sbrc_Rr_b(t_mem code)
318 t_addr r= (code&0x1f0)>>4;
321 if (!(ram->read(r) & mask))
323 t_mem next_code= rom->get(PC);
325 struct dis_entry *dt= dis_tbl();
326 while ((next_code & dt[i].mask) != dt[i].code &&
329 if (dt[i].mnemonic != NULL)
331 PC= (PC + dt[i].length) % rom->size;
342 * Skip if Bit in Register is Set
343 * SBRS Rr,b 0<=r<=31, 0<=b<=7
344 * 1111 111r rrrr Xbbb
345 *____________________________________________________________________________
349 cl_avr::sbrs_Rr_b(t_mem code)
351 t_addr r= (code&0x1f0)>>4;
354 if (ram->read(r) & mask)
356 t_mem next_code= rom->get(PC);
358 struct dis_entry *dt= dis_tbl();
359 while ((next_code & dt[i].mask) != dt[i].code &&
362 if (dt[i].mnemonic != NULL)
364 PC= (PC + dt[i].length) % rom->size;
375 * Skip if Bit in I/O Register is Clear
376 * SBIC P,b 0<=P<=31 0<=b<=7
377 * 1001 1001 pppp pbbb
378 *____________________________________________________________________________
382 cl_avr::sbic_P_b(t_mem code)
386 addr= ((code&0xf8)>>3)+0x20;
388 if (0 == (mask & ram->read(addr)))
391 int size= inst_length(code);
404 * Skip if Bit in I/O Register is Set
405 * SBIS P,b 0<=P<=31 0<=b<=7
406 * 1001 1011 pppp pbbb
407 *____________________________________________________________________________
411 cl_avr::sbis_P_b(t_mem code)
415 addr= ((code&0xf8)>>3)+0x20;
417 if (mask & ram->read(addr))
420 int size= inst_length(code);
432 /* End of avr.src/jump_inst.cc */