2 * Simulator of microcontrollers (bit_inst.cc)
4 * Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
6 * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu
10 /* This file is part of microcontroller simulator: ucsim.
12 UCSIM is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
17 UCSIM is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with UCSIM; see the file COPYING. If not, write to the Free
24 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
37 *----------------------------------------------------------------------------
41 cl_avr::sec(t_mem code)
43 t_mem d= BIT_C | ram->read(SREG);
53 *----------------------------------------------------------------------------
57 cl_avr::sen(t_mem code)
59 t_mem d= BIT_N | ram->read(SREG);
69 *----------------------------------------------------------------------------
73 cl_avr::sez(t_mem code)
75 t_mem d= BIT_Z | ram->read(SREG);
82 * Set Global Interrupt Flag
85 *----------------------------------------------------------------------------
89 cl_avr::sei(t_mem code)
91 t_mem d= BIT_I | ram->read(SREG);
100 * 1001 0100 0100 1000
101 *----------------------------------------------------------------------------
105 cl_avr::ses(t_mem code)
107 t_mem d= BIT_S | ram->read(SREG);
116 * 1001 0100 0011 1000
117 *----------------------------------------------------------------------------
121 cl_avr::sev(t_mem code)
123 t_mem d= BIT_V | ram->read(SREG);
132 * 1001 0100 0110 1000
133 *----------------------------------------------------------------------------
137 cl_avr::set(t_mem code)
139 t_mem d= BIT_T | ram->read(SREG);
146 * Set Half Carry Flag
148 * 1001 0100 0101 1000
149 *----------------------------------------------------------------------------
153 cl_avr::seh(t_mem code)
155 t_mem d= BIT_H | ram->read(SREG);
164 * 1001 0100 1000 1000
165 *----------------------------------------------------------------------------
169 cl_avr::clc(t_mem code)
171 t_mem d= ~BIT_C & ram->read(SREG);
178 * Clear Negative Flag
180 * 1001 0100 1010 1000
181 *----------------------------------------------------------------------------
185 cl_avr::cln(t_mem code)
187 t_mem d= ~BIT_N & ram->read(SREG);
196 * 1001 0100 1001 1000
197 *----------------------------------------------------------------------------
201 cl_avr::clz(t_mem code)
203 t_mem d= ~BIT_Z & ram->read(SREG);
210 * Global Interrupt Flag
212 * 1001 0100 1111 1000
213 *----------------------------------------------------------------------------
217 cl_avr::cli(t_mem code)
219 t_mem d= ~BIT_I & ram->read(SREG);
228 * 1001 0100 1100 1000
229 *----------------------------------------------------------------------------
233 cl_avr::cls(t_mem code)
235 t_mem d= ~BIT_S & ram->read(SREG);
242 * Clear Overflow Flag
244 * 1001 0100 1011 1000
245 *----------------------------------------------------------------------------
249 cl_avr::clv(t_mem code)
251 t_mem d= ~BIT_V & ram->read(SREG);
260 * 1001 0100 1110 1000
261 *----------------------------------------------------------------------------
265 cl_avr::clt(t_mem code)
267 t_mem d= ~BIT_T & ram->read(SREG);
274 * Clear Half Carry Flag
276 * 1001 0100 1101 1000
277 *----------------------------------------------------------------------------
281 cl_avr::clh(t_mem code)
283 t_mem d= ~BIT_H & ram->read(SREG);
290 * Clear Bit in I/O Register
291 * CBI P,b 0<=P<=31 0<=b<=7
292 * 1001 1000 pppp pbbb
293 *____________________________________________________________________________
297 cl_avr::cbi_A_b(t_mem code)
302 addr= ((code&0xf8)>>3)+0x20;
304 d= ~mask & ram->read(addr);
312 * Set Bit in I/O Register
313 * SBI P,b 0<=P<=31 0<=b<=7
314 * 1001 1010 pppp pbbb
315 *____________________________________________________________________________
319 cl_avr::sbi_A_b(t_mem code)
323 addr= ((code&0xf8)>>3)+0x20;
325 t_mem d= mask | ram->read(addr);
333 * Bit Load from the T Flag in SREG to a Bit in Register
334 * BLD Rd,b 0<=d<=31, 0<=b<=7
335 * 1111 100d dddd 0bbb
336 *____________________________________________________________________________
340 cl_avr::bld_Rd_b(t_mem code)
349 if (ram->read(SREG) & BIT_T)
350 data= ram->read(d) | mask;
352 data= ram->read(d) & ~mask;
359 * Bit Store from Bit in Register to T Flag in SREG
360 * BST Rd,b 0<=d<=31, 0<=b<=7
361 * 1111 101d dddd Xbbb
362 *____________________________________________________________________________
366 cl_avr::bst_Rd_b(t_mem code)
374 t_mem data= ram->read(d);
376 ram->set_bit1(SREG, BIT_T);
378 ram->set_bit0(SREG, BIT_T);
383 /* End of avr.src/bit_inst.cc */