4 #define STLINK_REG_CM3_CPUID 0xE000ED00
5 #define STLINK_REG_CM3_FP_CTRL 0xE0002000
6 #define STLINK_REG_CM3_FP_COMP0 0xE0002008
8 /* Cortex™-M3 Technical Reference Manual */
9 /* Debug Halting Control and Status Register */
10 #define STLINK_REG_DHCSR 0xe000edf0
11 #define STLINK_REG_DHCSR_DBGKEY 0xa05f0000
12 #define STLINK_REG_DCRSR 0xe000edf4
13 #define STLINK_REG_DCRDR 0xe000edf8
15 #endif /* STLINK_REG_H_ */