git.gag.com Git - debian/gnuradio/blob - grc/src/grc_gnuradio/usrp/dual_usrp.py

   1 # Copyright 2009 Free Software Foundation, Inc.
   2 #
   3 # This file is part of GNU Radio
   4 #
   5 # GNU Radio is free software; you can redistribute it and/or modify
   6 # it under the terms of the GNU General Public License as published by
   7 # the Free Software Foundation; either version 3, or (at your option)
   8 # any later version.
   9 #
  10 # GNU Radio is distributed in the hope that it will be useful,
  11 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13 # GNU General Public License for more details.
  14 #
  15 # You should have received a copy of the GNU General Public License
  16 # along with GNU Radio; see the file COPYING.  If not, write to
  17 # the Free Software Foundation, Inc., 51 Franklin Street,
  18 # Boston, MA 02110-1301, USA.
  19 #
  20
  21 import common
  22 from gnuradio import gr, usrp
  23
  24 ####################################################################
  25 # Dual USRP Source
  26 ####################################################################
  27 class _dual_source(gr.hier_block2):
  28         """A dual usrp source of IO type short or complex."""
  29
  30         def __init__(self, number, side_a='A', rx_ant_a='RXA', side_b='B', rx_ant_b='RXA'):
  31                 """
  32                 USRP dual source contructor.
  33                 @param number the unit number
  34                 @param side_a A or B
  35                 @param rx_ant_a the antenna choice
  36                 @param side_b A or B
  37                 @param rx_ant_b the antenna choice
  38                 """
  39                 #initialize hier2 block
  40                 gr.hier_block2.__init__(
  41                         self, 'usrp_dual_source',
  42                         gr.io_signature(0, 0, 0),
  43                         gr.io_signature(2, 2, self._get_io_size()),
  44                 )
  45                 #create usrp object
  46                 self._u = self._get_usrp_constructor()(number, nchan=2)
  47                 #get the mux for output A
  48                 subdev_spec_a = common.to_spec(side_a, rx_ant_a)
  49                 self._subdev_a = usrp.selected_subdev(self._u, subdev_spec_a)
  50                 mux_a = usrp.determine_rx_mux_value(self._u, subdev_spec_a)
  51                 #get the mux for output B
  52                 subdev_spec_b = common.to_spec(side_b, rx_ant_b)
  53                 self._subdev_b = usrp.selected_subdev(self._u, subdev_spec_b)
  54                 mux_b = usrp.determine_rx_mux_value(self._u, subdev_spec_b)
  55                 #move the lower byte of the mux b into the second byte of the mux a
  56                 self._u.set_mux(((mux_b & 0xff) << 8) | (mux_a - (mux_a & 0xff00)))
  57                 #connect
  58                 deinter = gr.deinterleave(self._get_io_size())
  59                 self.connect(self._u, deinter)
  60                 for i in range(2): self.connect((deinter, i), (self, i))
  61
  62         def set_decim_rate(self, decim): self._u.set_decim_rate(int(decim))
  63         def set_frequency_a(self, frequency, verbose=False):
  64                 common.set_frequency(
  65                         u=self._u,
  66                         which=0, #ddc0
  67                         subdev=self._subdev_a,
  68                         frequency=frequency,
  69                         verbose=verbose,
  70                 )
  71         def set_frequency_b(self, frequency, verbose=False):
  72                 common.set_frequency(
  73                         u=self._u,
  74                         which=1, #ddc1
  75                         subdev=self._subdev_b,
  76                         frequency=frequency,
  77                         verbose=verbose,
  78                 )
  79         def set_gain_a(self, gain): self._subdev_a.set_gain(gain)
  80         def set_gain_b(self, gain): self._subdev_b.set_gain(gain)
  81         def set_auto_tr_a(self, auto_tr): self._subdev_a.set_auto_tr(auto_tr)
  82         def set_auto_tr_b(self, auto_tr): self._subdev_b.set_auto_tr(auto_tr)
  83
  84 class dual_source_c(_dual_source, common.usrp_source_c): pass
  85 class dual_source_s(_dual_source, common.usrp_source_s): pass
  86
  87 ####################################################################
  88 # Dual USRP Sink
  89 ####################################################################
  90 class _dual_sink(gr.hier_block2):
  91         """A dual usrp sink of IO type short or complex."""
  92
  93         def __init__(self, number):
  94                 """
  95                 USRP simple sink contructor.
  96                 @param number the unit number
  97                 """
  98                 #initialize hier2 block
  99                 gr.hier_block2.__init__(
 100                         self, 'usrp_dual_sink',
 101                         gr.io_signature(2, 2, self._get_io_size()),
 102                         gr.io_signature(0, 0, 0),
 103                 )
 104                 #create usrp object
 105                 self._u = self._get_usrp_constructor()(number, nchan=2)
 106                 #get the mux for side A
 107                 subdev_spec_a = common.to_spec('A')
 108                 self._subdev_a = usrp.selected_subdev(self._u, subdev_spec_a)
 109                 mux_a = usrp.determine_tx_mux_value(self._u, subdev_spec_a)
 110                 #get the mux for side B
 111                 subdev_spec_b = common.to_spec('B')
 112                 self._subdev_b = usrp.selected_subdev(self._u, subdev_spec_b)
 113                 mux_b = usrp.determine_tx_mux_value(self._u, subdev_spec_b)
 114                 #set the mux
 115                 self._u.set_mux(mux_a | mux_b)
 116                 #connect
 117                 inter = gr.interleave(self._get_io_size())
 118                 self.connect(inter, self._u)
 119                 for i in range(2): self.connect((self, i), (inter, i))
 120
 121         def set_interp_rate(self, interp): self._u.set_interp_rate(int(interp))
 122         def set_frequency_a(self, frequency, verbose=False):
 123                 common.set_frequency(
 124                         u=self._u,
 125                         which=self._subdev_a.which(),
 126                         subdev=self._subdev_a,
 127                         frequency=frequency,
 128                         verbose=verbose,
 129                 )
 130         def set_frequency_b(self, frequency, verbose=False):
 131                 common.set_frequency(
 132                         u=self._u,
 133                         which=self._subdev_b.which(),
 134                         subdev=self._subdev_b,
 135                         frequency=frequency,
 136                         verbose=verbose,
 137                 )
 138         def set_gain_a(self, gain): self._subdev_a.set_gain(gain)
 139         def set_gain_b(self, gain): self._subdev_b.set_gain(gain)
 140         def set_enable_a(self, enable): self._subdev_a.set_enable(enable)
 141         def set_enable_b(self, enable): self._subdev_b.set_enable(enable)
 142         def set_auto_tr_a(self, auto_tr): self._subdev_a.set_auto_tr(auto_tr)
 143         def set_auto_tr_b(self, auto_tr): self._subdev_b.set_auto_tr(auto_tr)
 144
 145 class dual_sink_c(_dual_sink, common.usrp_sink_c): pass
 146 class dual_sink_s(_dual_sink, common.usrp_sink_s): pass