3 * Copyright 2008,2009 Free Software Foundation, Inc.
5 * This file is part of GNU Radio
7 * GNU Radio is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 3, or (at your option)
12 * GNU Radio is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with GNU Radio; see the file COPYING. If not, write to
19 * the Free Software Foundation, Inc., 51 Franklin Street,
20 * Boston, MA 02110-1301, USA.
23 %include "gnuradio.i" // the common stuff
27 #include "usrp2_source_16sc.h"
28 #include "usrp2_source_32fc.h"
29 #include "usrp2_sink_16sc.h"
30 #include "usrp2_sink_32fc.h"
33 %include <usrp2/tune_result.h>
34 %include <usrp2/mimo_config.h>
36 %template(uint32_t_vector) std::vector<uint32_t>;
38 // ----------------------------------------------------------------
40 class usrp2_base : public gr_sync_block
43 usrp2_base() throw (std::runtime_error);
48 std::string mac_addr() const;
49 std::string interface_name() const;
50 %rename(_real_fpga_master_clock_freq) fpga_master_clock_freq;
51 bool fpga_master_clock_freq(long *freq);
52 bool config_mimo(int flags);
54 bool sync_every_pps(bool enable);
55 std::vector<uint32_t> peek32(uint32_t addr, uint32_t words);
56 bool poke32(uint32_t addr, const std::vector<uint32_t> &data);
59 // ----------------------------------------------------------------
61 class usrp2_source_base : public usrp2_base
64 usrp2_source_base() throw (std::runtime_error);
69 bool set_antenna(int ant);
70 bool set_gain(double gain);
71 %rename(_real_set_center_freq) set_center_freq;
72 bool set_lo_offset(double frequency);
73 bool set_center_freq(double frequency, usrp2::tune_result *r);
74 bool set_decim(int decimation_factor);
75 bool set_scale_iq(int scale_i, int scale_q);
77 %rename(_real_adc_rate) adc_rate;
78 bool adc_rate(long *rate);
81 double gain_db_per_step();
84 %rename(_real_daughterboard_id) daughterboard_id;
85 bool daughterboard_id(int *dbid);
86 unsigned int overruns();
87 unsigned int missing();
88 bool set_gpio_ddr(uint16_t value, uint16_t mask);
89 bool set_gpio_sels(std::string sels);
90 bool write_gpio(uint16_t value, uint16_t mask);
91 %rename(_real_read_gpio) read_gpio;
92 bool read_gpio(uint16_t *value);
93 bool enable_gpio_streaming(int enable);
96 // ----------------------------------------------------------------
98 GR_SWIG_BLOCK_MAGIC(usrp2,source_32fc)
100 usrp2_source_32fc_sptr
101 usrp2_make_source_32fc(const std::string ifc="eth0",
102 const std::string mac="")
103 throw (std::runtime_error);
105 class usrp2_source_32fc : public usrp2_source_base
108 usrp2_source_32fc(const std::string &ifc, const std::string &mac);
111 ~usrp2_source_32fc();
114 // ----------------------------------------------------------------
116 GR_SWIG_BLOCK_MAGIC(usrp2,source_16sc)
118 usrp2_source_16sc_sptr
119 usrp2_make_source_16sc(const std::string ifc="eth0",
120 const std::string mac="")
121 throw (std::runtime_error);
123 class usrp2_source_16sc : public usrp2_source_base
126 usrp2_source_16sc(const std::string &ifc, const std::string &mac);
129 ~usrp2_source_16sc();
132 // ----------------------------------------------------------------
134 class usrp2_sink_base : public usrp2_base
137 usrp2_sink_base() throw (std::runtime_error);
142 bool set_antenna(int ant);
143 bool set_gain(double gain);
144 %rename(_real_set_center_freq) set_center_freq;
145 bool set_lo_offset(double frequency);
146 bool set_center_freq(double frequency, usrp2::tune_result *r);
147 bool set_interp(int interp_factor);
148 bool set_scale_iq(int scale_i, int scale_q);
150 %rename(_real_default_tx_scale_iq) default_scale_iq;
151 void default_scale_iq(int interp, int *scale_i, int *scale_q);
152 %rename(_real_dac_rate) dac_rate;
153 bool dac_rate(long *rate);
156 double gain_db_per_step();
159 %rename(_real_daughterboard_id) daughterboard_id;
160 bool daughterboard_id(int *dbid);
161 bool set_gpio_ddr(uint16_t value, uint16_t mask);
162 bool set_gpio_sels(std::string sels);
163 bool write_gpio(uint16_t value, uint16_t mask);
164 %rename(_real_read_gpio) read_gpio;
165 bool read_gpio(uint16_t *value);
168 // ----------------------------------------------------------------
170 GR_SWIG_BLOCK_MAGIC(usrp2,sink_32fc)
173 usrp2_make_sink_32fc(const std::string ifc="eth0",
174 const std::string mac="")
175 throw (std::runtime_error);
177 class usrp2_sink_32fc : public usrp2_sink_base
180 usrp2_sink_32fc(const std::string &ifc, const std::string &mac);
186 // ----------------------------------------------------------------
188 GR_SWIG_BLOCK_MAGIC(usrp2,sink_16sc)
191 usrp2_make_sink_16sc(const std::string ifc="eth0",
192 const std::string mac="")
193 throw (std::runtime_error);
195 class usrp2_sink_16sc : public usrp2_sink_base
198 usrp2_sink_16sc(const std::string &ifc, const std::string &mac);
204 // ----------------------------------------------------------------
206 // some utility functions to allow Python to deal with pointers
208 long *make_long_ptr() { return new long; }
209 long deref_long_ptr(long *l) { return *l; }
210 void free_long_ptr(long *l) { delete l; }
211 int *make_int_ptr() { return new int; }
212 int deref_int_ptr(int *l) { return *l; }
213 void free_int_ptr(int *l) { delete l; }
214 uint16_t *make_uint16_ptr() { return new uint16_t; }
215 int deref_uint16_ptr(uint16_t *l) { return *l; }
216 void free_uint16_ptr(uint16_t *l) { delete l; }
219 long *make_long_ptr();
220 long deref_long_ptr(long *l);
221 void free_long_ptr(long *l);
223 int deref_int_ptr(int *l);
224 void free_int_ptr(int *l);
225 uint16_t *make_uint16_ptr();
226 int deref_uint16_ptr(uint16_t *l);
227 void free_uint16_ptr(uint16_t *l);
229 // create a more pythonic interface
232 def __set_center_freq(self, freq):
234 r = self._real_set_center_freq(freq, tr)
240 def __fpga_master_clock_freq(self):
242 r = self._real_fpga_master_clock_freq(f)
244 result = deref_long_ptr(f)
250 def __adc_rate(self):
251 rate = make_long_ptr();
252 r = self._real_adc_rate(rate)
254 result = deref_long_ptr(rate)
260 def __dac_rate(self):
261 rate = make_long_ptr();
262 r = self._real_dac_rate(rate)
264 result = deref_long_ptr(rate)
270 def __gain_range(self):
271 return [self.gain_min(),
273 self.gain_db_per_step()]
275 # NOTE: USRP1 uses a length three tuple here (3rd value is 'freq step'),
276 # but it's not really useful. We let an index error happen here
277 # to identify code using it.
278 def __freq_range(self):
279 return [self.freq_min(),
282 def __daughterboard_id(self):
283 dbid = make_int_ptr()
284 r = self._real_daughterboard_id(dbid)
286 result = deref_int_ptr(dbid)
292 def __default_tx_scale_iq(self, interp):
293 scale_i = make_int_ptr()
294 scale_q = make_int_ptr()
295 self._real_default_tx_scale_iq(interp, scale_i, scale_q)
296 return (deref_int_ptr(scale_i), deref_int_ptr(scale_q))
298 def __read_gpio(self):
299 value = make_uint16_ptr()
300 r = self._real_read_gpio(value)
302 result = deref_uint16_ptr(value)
305 free_uint16_ptr(value)
309 usrp2_source_32fc_sptr.set_center_freq = __set_center_freq
310 usrp2_source_16sc_sptr.set_center_freq = __set_center_freq
311 usrp2_sink_32fc_sptr.set_center_freq = __set_center_freq
312 usrp2_sink_16sc_sptr.set_center_freq = __set_center_freq
314 usrp2_source_32fc_sptr.fpga_master_clock_freq = __fpga_master_clock_freq
315 usrp2_source_16sc_sptr.fpga_master_clock_freq = __fpga_master_clock_freq
316 usrp2_sink_32fc_sptr.fpga_master_clock_freq = __fpga_master_clock_freq
317 usrp2_sink_16sc_sptr.fpga_master_clock_freq = __fpga_master_clock_freq
319 usrp2_source_32fc_sptr.adc_rate = __adc_rate
320 usrp2_source_16sc_sptr.adc_rate = __adc_rate
321 usrp2_sink_32fc_sptr.dac_rate = __dac_rate
322 usrp2_sink_16sc_sptr.dac_rate = __dac_rate
324 usrp2_source_32fc_sptr.gain_range = __gain_range
325 usrp2_source_16sc_sptr.gain_range = __gain_range
326 usrp2_sink_32fc_sptr.gain_range = __gain_range
327 usrp2_sink_16sc_sptr.gain_range = __gain_range
329 usrp2_source_32fc_sptr.freq_range = __freq_range
330 usrp2_source_16sc_sptr.freq_range = __freq_range
331 usrp2_sink_32fc_sptr.freq_range = __freq_range
332 usrp2_sink_16sc_sptr.freq_range = __freq_range
334 usrp2_source_32fc_sptr.daughterboard_id = __daughterboard_id
335 usrp2_source_16sc_sptr.daughterboard_id = __daughterboard_id
336 usrp2_sink_32fc_sptr.daughterboard_id = __daughterboard_id
337 usrp2_sink_16sc_sptr.daughterboard_id = __daughterboard_id
339 usrp2_sink_32fc_sptr.default_scale_iq = __default_tx_scale_iq
340 usrp2_sink_16sc_sptr.default_scale_iq = __default_tx_scale_iq
342 usrp2_source_32fc_sptr.read_gpio = __read_gpio
343 usrp2_source_16sc_sptr.read_gpio = __read_gpio
344 usrp2_sink_32fc_sptr.read_gpio = __read_gpio
345 usrp2_sink_16sc_sptr.read_gpio = __read_gpio