3 * Copyright 2008,2009 Free Software Foundation, Inc.
5 * This file is part of GNU Radio
7 * GNU Radio is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 3, or (at your option)
12 * GNU Radio is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with GNU Radio; see the file COPYING. If not, write to
19 * the Free Software Foundation, Inc., 51 Franklin Street,
20 * Boston, MA 02110-1301, USA.
23 %include "gnuradio.i" // the common stuff
27 #include "usrp2_source_16sc.h"
28 #include "usrp2_source_32fc.h"
29 #include "usrp2_sink_16sc.h"
30 #include "usrp2_sink_32fc.h"
33 %include <usrp2/tune_result.h>
34 %include <usrp2/mimo_config.h>
35 %include <usrp2/metadata.h>
37 %template(uint32_t_vector) std::vector<uint32_t>;
39 // ----------------------------------------------------------------
41 class usrp2_base : public gr_sync_block
44 usrp2_base() throw (std::runtime_error);
49 std::string mac_addr() const;
50 std::string interface_name() const;
51 %rename(_real_fpga_master_clock_freq) fpga_master_clock_freq;
52 bool fpga_master_clock_freq(long *freq);
53 bool config_mimo(int flags);
55 bool sync_every_pps(bool enable);
56 std::vector<uint32_t> peek32(uint32_t addr, uint32_t words);
57 bool poke32(uint32_t addr, const std::vector<uint32_t> &data);
60 // ----------------------------------------------------------------
62 class usrp2_source_base : public usrp2_base
65 usrp2_source_base() throw (std::runtime_error);
70 bool set_antenna(int ant);
71 bool set_gain(double gain);
72 %rename(_real_set_center_freq) set_center_freq;
73 bool set_lo_offset(double frequency);
74 bool set_center_freq(double frequency, usrp2::tune_result *r);
75 bool set_decim(int decimation_factor);
76 bool set_scale_iq(int scale_i, int scale_q);
78 %rename(_real_adc_rate) adc_rate;
79 bool adc_rate(long *rate);
82 double gain_db_per_step();
85 %rename(_real_daughterboard_id) daughterboard_id;
86 bool daughterboard_id(int *dbid);
87 unsigned int overruns();
88 unsigned int missing();
89 bool set_gpio_ddr(uint16_t value, uint16_t mask);
90 bool set_gpio_sels(std::string sels);
91 bool write_gpio(uint16_t value, uint16_t mask);
92 %rename(_real_read_gpio) read_gpio;
93 bool read_gpio(uint16_t *value);
94 bool enable_gpio_streaming(int enable);
97 // ----------------------------------------------------------------
99 GR_SWIG_BLOCK_MAGIC(usrp2,source_32fc)
101 usrp2_source_32fc_sptr
102 usrp2_make_source_32fc(const std::string ifc="eth0",
103 const std::string mac="")
104 throw (std::runtime_error);
106 class usrp2_source_32fc : public usrp2_source_base
109 usrp2_source_32fc(const std::string &ifc, const std::string &mac);
112 ~usrp2_source_32fc();
115 // ----------------------------------------------------------------
117 GR_SWIG_BLOCK_MAGIC(usrp2,source_16sc)
119 usrp2_source_16sc_sptr
120 usrp2_make_source_16sc(const std::string ifc="eth0",
121 const std::string mac="")
122 throw (std::runtime_error);
124 class usrp2_source_16sc : public usrp2_source_base
127 usrp2_source_16sc(const std::string &ifc, const std::string &mac);
130 ~usrp2_source_16sc();
133 // ----------------------------------------------------------------
135 class usrp2_sink_base : public usrp2_base
138 usrp2_sink_base() throw (std::runtime_error);
143 bool set_antenna(int ant);
144 bool set_gain(double gain);
145 %rename(_real_set_center_freq) set_center_freq;
146 bool set_lo_offset(double frequency);
147 bool set_center_freq(double frequency, usrp2::tune_result *r);
148 bool set_interp(int interp_factor);
149 bool set_scale_iq(int scale_i, int scale_q);
151 %rename(_real_default_tx_scale_iq) default_scale_iq;
152 void default_scale_iq(int interp, int *scale_i, int *scale_q);
153 %rename(_real_dac_rate) dac_rate;
154 bool dac_rate(long *rate);
157 double gain_db_per_step();
160 %rename(_real_daughterboard_id) daughterboard_id;
161 bool daughterboard_id(int *dbid);
162 bool set_gpio_ddr(uint16_t value, uint16_t mask);
163 bool set_gpio_sels(std::string sels);
164 bool write_gpio(uint16_t value, uint16_t mask);
165 %rename(_real_read_gpio) read_gpio;
166 bool read_gpio(uint16_t *value);
167 bool start_streaming_at(usrp2::fpga_timestamp time);
170 // ----------------------------------------------------------------
172 GR_SWIG_BLOCK_MAGIC(usrp2,sink_32fc)
175 usrp2_make_sink_32fc(const std::string ifc="eth0",
176 const std::string mac="")
177 throw (std::runtime_error);
179 class usrp2_sink_32fc : public usrp2_sink_base
182 usrp2_sink_32fc(const std::string &ifc, const std::string &mac);
188 // ----------------------------------------------------------------
190 GR_SWIG_BLOCK_MAGIC(usrp2,sink_16sc)
193 usrp2_make_sink_16sc(const std::string ifc="eth0",
194 const std::string mac="")
195 throw (std::runtime_error);
197 class usrp2_sink_16sc : public usrp2_sink_base
200 usrp2_sink_16sc(const std::string &ifc, const std::string &mac);
206 // ----------------------------------------------------------------
208 // some utility functions to allow Python to deal with pointers
210 long *make_long_ptr() { return new long; }
211 long deref_long_ptr(long *l) { return *l; }
212 void free_long_ptr(long *l) { delete l; }
213 int *make_int_ptr() { return new int; }
214 int deref_int_ptr(int *l) { return *l; }
215 void free_int_ptr(int *l) { delete l; }
216 uint16_t *make_uint16_ptr() { return new uint16_t; }
217 int deref_uint16_ptr(uint16_t *l) { return *l; }
218 void free_uint16_ptr(uint16_t *l) { delete l; }
221 long *make_long_ptr();
222 long deref_long_ptr(long *l);
223 void free_long_ptr(long *l);
225 int deref_int_ptr(int *l);
226 void free_int_ptr(int *l);
227 uint16_t *make_uint16_ptr();
228 int deref_uint16_ptr(uint16_t *l);
229 void free_uint16_ptr(uint16_t *l);
231 // create a more pythonic interface
234 def __set_center_freq(self, freq):
236 r = self._real_set_center_freq(freq, tr)
242 def __fpga_master_clock_freq(self):
244 r = self._real_fpga_master_clock_freq(f)
246 result = deref_long_ptr(f)
252 def __adc_rate(self):
253 rate = make_long_ptr();
254 r = self._real_adc_rate(rate)
256 result = deref_long_ptr(rate)
262 def __dac_rate(self):
263 rate = make_long_ptr();
264 r = self._real_dac_rate(rate)
266 result = deref_long_ptr(rate)
272 def __gain_range(self):
273 return [self.gain_min(),
275 self.gain_db_per_step()]
277 # NOTE: USRP1 uses a length three tuple here (3rd value is 'freq step'),
278 # but it's not really useful. We let an index error happen here
279 # to identify code using it.
280 def __freq_range(self):
281 return [self.freq_min(),
284 def __daughterboard_id(self):
285 dbid = make_int_ptr()
286 r = self._real_daughterboard_id(dbid)
288 result = deref_int_ptr(dbid)
294 def __default_tx_scale_iq(self, interp):
295 scale_i = make_int_ptr()
296 scale_q = make_int_ptr()
297 self._real_default_tx_scale_iq(interp, scale_i, scale_q)
298 return (deref_int_ptr(scale_i), deref_int_ptr(scale_q))
300 def __read_gpio(self):
301 value = make_uint16_ptr()
302 r = self._real_read_gpio(value)
304 result = deref_uint16_ptr(value)
307 free_uint16_ptr(value)
311 usrp2_source_32fc_sptr.set_center_freq = __set_center_freq
312 usrp2_source_16sc_sptr.set_center_freq = __set_center_freq
313 usrp2_sink_32fc_sptr.set_center_freq = __set_center_freq
314 usrp2_sink_16sc_sptr.set_center_freq = __set_center_freq
316 usrp2_source_32fc_sptr.fpga_master_clock_freq = __fpga_master_clock_freq
317 usrp2_source_16sc_sptr.fpga_master_clock_freq = __fpga_master_clock_freq
318 usrp2_sink_32fc_sptr.fpga_master_clock_freq = __fpga_master_clock_freq
319 usrp2_sink_16sc_sptr.fpga_master_clock_freq = __fpga_master_clock_freq
321 usrp2_source_32fc_sptr.adc_rate = __adc_rate
322 usrp2_source_16sc_sptr.adc_rate = __adc_rate
323 usrp2_sink_32fc_sptr.dac_rate = __dac_rate
324 usrp2_sink_16sc_sptr.dac_rate = __dac_rate
326 usrp2_source_32fc_sptr.gain_range = __gain_range
327 usrp2_source_16sc_sptr.gain_range = __gain_range
328 usrp2_sink_32fc_sptr.gain_range = __gain_range
329 usrp2_sink_16sc_sptr.gain_range = __gain_range
331 usrp2_source_32fc_sptr.freq_range = __freq_range
332 usrp2_source_16sc_sptr.freq_range = __freq_range
333 usrp2_sink_32fc_sptr.freq_range = __freq_range
334 usrp2_sink_16sc_sptr.freq_range = __freq_range
336 usrp2_source_32fc_sptr.daughterboard_id = __daughterboard_id
337 usrp2_source_16sc_sptr.daughterboard_id = __daughterboard_id
338 usrp2_sink_32fc_sptr.daughterboard_id = __daughterboard_id
339 usrp2_sink_16sc_sptr.daughterboard_id = __daughterboard_id
341 usrp2_sink_32fc_sptr.default_scale_iq = __default_tx_scale_iq
342 usrp2_sink_16sc_sptr.default_scale_iq = __default_tx_scale_iq
344 usrp2_source_32fc_sptr.read_gpio = __read_gpio
345 usrp2_source_16sc_sptr.read_gpio = __read_gpio
346 usrp2_sink_32fc_sptr.read_gpio = __read_gpio
347 usrp2_sink_16sc_sptr.read_gpio = __read_gpio