3 * Copyright 2008,2009 Free Software Foundation, Inc.
5 * This file is part of GNU Radio
7 * GNU Radio is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 3, or (at your option)
12 * GNU Radio is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with GNU Radio; see the file COPYING. If not, write to
19 * the Free Software Foundation, Inc., 51 Franklin Street,
20 * Boston, MA 02110-1301, USA.
23 %include "gnuradio.i" // the common stuff
27 #include "usrp2_source_16sc.h"
28 #include "usrp2_source_32fc.h"
29 #include "usrp2_sink_16sc.h"
30 #include "usrp2_sink_32fc.h"
33 %include <usrp2/tune_result.h>
35 %template(uint32_t_vector) std::vector<uint32_t>;
37 // ----------------------------------------------------------------
39 class usrp2_base : public gr_sync_block
42 usrp2_base() throw (std::runtime_error);
47 std::string mac_addr() const;
48 std::string interface_name() const;
49 %rename(_real_fpga_master_clock_freq) fpga_master_clock_freq;
50 bool fpga_master_clock_freq(long *freq);
52 std::vector<uint32_t> peek32(uint32_t addr, uint32_t words);
53 bool poke32(uint32_t addr, const std::vector<uint32_t> &data);
56 // ----------------------------------------------------------------
58 class usrp2_source_base : public usrp2_base
61 usrp2_source_base() throw (std::runtime_error);
66 bool set_gain(double gain);
67 %rename(_real_set_center_freq) set_center_freq;
68 bool set_lo_offset(double frequency);
69 bool set_center_freq(double frequency, usrp2::tune_result *r);
70 bool set_decim(int decimation_factor);
71 bool set_scale_iq(int scale_i, int scale_q);
73 %rename(_real_adc_rate) adc_rate;
74 bool adc_rate(long *rate);
77 double gain_db_per_step();
80 %rename(_real_daughterboard_id) daughterboard_id;
81 bool daughterboard_id(int *dbid);
82 unsigned int overruns();
83 unsigned int missing();
86 // ----------------------------------------------------------------
88 GR_SWIG_BLOCK_MAGIC(usrp2,source_32fc)
90 usrp2_source_32fc_sptr
91 usrp2_make_source_32fc(const std::string ifc="eth0",
92 const std::string mac="")
93 throw (std::runtime_error);
95 class usrp2_source_32fc : public usrp2_source_base
98 usrp2_source_32fc(const std::string &ifc, const std::string &mac);
101 ~usrp2_source_32fc();
104 // ----------------------------------------------------------------
106 GR_SWIG_BLOCK_MAGIC(usrp2,source_16sc)
108 usrp2_source_16sc_sptr
109 usrp2_make_source_16sc(const std::string ifc="eth0",
110 const std::string mac="")
111 throw (std::runtime_error);
113 class usrp2_source_16sc : public usrp2_source_base
116 usrp2_source_16sc(const std::string &ifc, const std::string &mac);
119 ~usrp2_source_16sc();
122 // ----------------------------------------------------------------
124 class usrp2_sink_base : public usrp2_base
127 usrp2_sink_base() throw (std::runtime_error);
132 bool set_gain(double gain);
133 %rename(_real_set_center_freq) set_center_freq;
134 bool set_lo_offset(double frequency);
135 bool set_center_freq(double frequency, usrp2::tune_result *r);
136 bool set_interp(int interp_factor);
137 bool set_scale_iq(int scale_i, int scale_q);
139 %rename(_real_default_tx_scale_iq) default_scale_iq;
140 void default_scale_iq(int interp, int *scale_i, int *scale_q);
141 %rename(_real_dac_rate) dac_rate;
142 bool dac_rate(long *rate);
145 double gain_db_per_step();
148 %rename(_real_daughterboard_id) daughterboard_id;
149 bool daughterboard_id(int *dbid);
152 // ----------------------------------------------------------------
154 GR_SWIG_BLOCK_MAGIC(usrp2,sink_32fc)
157 usrp2_make_sink_32fc(const std::string ifc="eth0",
158 const std::string mac="")
159 throw (std::runtime_error);
161 class usrp2_sink_32fc : public usrp2_sink_base
164 usrp2_sink_32fc(const std::string &ifc, const std::string &mac);
170 // ----------------------------------------------------------------
172 GR_SWIG_BLOCK_MAGIC(usrp2,sink_16sc)
175 usrp2_make_sink_16sc(const std::string ifc="eth0",
176 const std::string mac="")
177 throw (std::runtime_error);
179 class usrp2_sink_16sc : public usrp2_sink_base
182 usrp2_sink_16sc(const std::string &ifc, const std::string &mac);
188 // ----------------------------------------------------------------
190 // some utility functions to allow Python to deal with pointers
192 long *make_long_ptr() { return (long *)malloc(sizeof(long)); }
193 long deref_long_ptr(long *l) { return *l; }
194 void free_long_ptr(long *l) { free(l); }
195 int *make_int_ptr() { return (int *)malloc(sizeof(int)); }
196 int deref_int_ptr(int *l) { return *l; }
197 void free_int_ptr(int *l) { free(l); }
200 long *make_long_ptr();
201 long deref_long_ptr(long *l);
202 void free_long_ptr(long *l);
204 int deref_int_ptr(int *l);
205 void free_int_ptr(int *l);
207 // create a more pythonic interface
210 def __set_center_freq(self, freq):
212 r = self._real_set_center_freq(freq, tr)
218 def __fpga_master_clock_freq(self):
220 r = self._real_fpga_master_clock_freq(f)
222 result = deref_long_ptr(f)
228 def __adc_rate(self):
229 rate = make_long_ptr();
230 r = self._real_adc_rate(rate)
232 result = deref_long_ptr(rate)
238 def __dac_rate(self):
239 rate = make_long_ptr();
240 r = self._real_dac_rate(rate)
242 result = deref_long_ptr(rate)
248 def __gain_range(self):
249 return [self.gain_min(),
251 self.gain_db_per_step()]
253 # NOTE: USRP1 uses a length three tuple here (3rd value is 'freq step'),
254 # but it's not really useful. We let an index error happen here
255 # to identify code using it.
256 def __freq_range(self):
257 return [self.freq_min(),
260 def __daughterboard_id(self):
261 dbid = make_int_ptr()
262 r = self._real_daughterboard_id(dbid)
264 result = deref_int_ptr(dbid)
270 def __default_tx_scale_iq(self, interp):
271 scale_i = make_int_ptr()
272 scale_q = make_int_ptr()
273 self._real_default_tx_scale_iq(interp, scale_i, scale_q)
274 return (deref_int_ptr(scale_i), deref_int_ptr(scale_q))
276 usrp2_source_32fc_sptr.set_center_freq = __set_center_freq
277 usrp2_source_16sc_sptr.set_center_freq = __set_center_freq
278 usrp2_sink_32fc_sptr.set_center_freq = __set_center_freq
279 usrp2_sink_16sc_sptr.set_center_freq = __set_center_freq
281 usrp2_source_32fc_sptr.fpga_master_clock_freq = __fpga_master_clock_freq
282 usrp2_source_16sc_sptr.fpga_master_clock_freq = __fpga_master_clock_freq
283 usrp2_sink_32fc_sptr.fpga_master_clock_freq = __fpga_master_clock_freq
284 usrp2_sink_16sc_sptr.fpga_master_clock_freq = __fpga_master_clock_freq
286 usrp2_source_32fc_sptr.adc_rate = __adc_rate
287 usrp2_source_16sc_sptr.adc_rate = __adc_rate
288 usrp2_sink_32fc_sptr.dac_rate = __dac_rate
289 usrp2_sink_16sc_sptr.dac_rate = __dac_rate
291 usrp2_source_32fc_sptr.gain_range = __gain_range
292 usrp2_source_16sc_sptr.gain_range = __gain_range
293 usrp2_sink_32fc_sptr.gain_range = __gain_range
294 usrp2_sink_16sc_sptr.gain_range = __gain_range
296 usrp2_source_32fc_sptr.freq_range = __freq_range
297 usrp2_source_16sc_sptr.freq_range = __freq_range
298 usrp2_sink_32fc_sptr.freq_range = __freq_range
299 usrp2_sink_16sc_sptr.freq_range = __freq_range
301 usrp2_source_32fc_sptr.daughterboard_id = __daughterboard_id
302 usrp2_source_16sc_sptr.daughterboard_id = __daughterboard_id
303 usrp2_sink_32fc_sptr.daughterboard_id = __daughterboard_id
304 usrp2_sink_16sc_sptr.daughterboard_id = __daughterboard_id
306 usrp2_sink_32fc_sptr.default_scale_iq = __default_tx_scale_iq
307 usrp2_sink_16sc_sptr.default_scale_iq = __default_tx_scale_iq