3 * Copyright 2004 Free Software Foundation, Inc.
5 * This file is part of GNU Radio
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8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2, or (at your option)
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13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with GNU Radio; see the file COPYING. If not, write to
19 * the Free Software Foundation, Inc., 59 Temple Place - Suite 330,
20 * Boston, MA 02111-1307, USA.
23 #ifndef INCLUDED_USRP1_SOURCE_BASE_H
24 #define INCLUDED_USRP1_SOURCE_BASE_H
26 #include <gr_sync_block.h>
29 class usrp_standard_rx;
32 * \brief abstract interface to Universal Software Radio Peripheral Rx path (Rev 1)
34 class usrp1_source_base : public gr_sync_block {
36 usrp_standard_rx *d_usrp;
40 usrp1_source_base (const std::string &name,
41 gr_io_signature_sptr output_signature,
43 unsigned int decim_rate,
49 const std::string fpga_filename,
50 const std::string firmware_filename
51 ) throw (std::runtime_error);
54 * \brief return number of usrp input bytes required to produce noutput items.
56 virtual int ninput_bytes_reqd_for_noutput_items (int noutput_items) = 0;
59 * \brief number of bytes in a low-level sample
61 unsigned int sizeof_basic_sample() const;
64 * \brief convert between native usrp format and output item format
66 * \param output_items[out] stream(s) of output items
67 * \param output_index[in] starting index in output_items
68 * \param output_items_available[in] number of empty items available at item[index]
69 * \param output_items_produced[out] number of items produced by copy
70 * \param usrp_buffer[in] source buffer
71 * \param usrp_buffer_length[in] number of bytes available in \p usrp_buffer
72 * \param bytes_read[out] number of bytes read from \p usrp_buffer
74 * The copy must consume all bytes available. That is, \p bytes_read must equal
75 * \p usrp_buffer_length.
77 virtual void copy_from_usrp_buffer (gr_vector_void_star &output_items,
79 int output_items_available,
80 int &output_items_produced,
81 const void *usrp_buffer,
82 int usrp_buffer_length,
86 //! magic value used on alternate register read interfaces
87 static const int READ_FAILED = -99999;
89 ~usrp1_source_base ();
91 int work (int noutput_items,
92 gr_vector_const_void_star &input_items,
93 gr_vector_void_star &output_items);
99 * \brief Set decimator rate. \p rate must be EVEN and in [8, 256].
101 * The final complex sample rate across the USB is
102 * adc_freq () / decim_rate ()
104 bool set_decim_rate (unsigned int rate);
105 bool set_nchannels (int nchan);
106 bool set_mux (int mux);
109 * \brief set the center frequency of the digital down converter.
111 * \p channel must be 0. \p freq is the center frequency in Hz.
112 * It must be in the range [-FIXME, FIXME]. The frequency specified is
113 * quantized. Use rx_freq to retrieve the actual value used.
115 bool set_rx_freq (int channel, double freq);
118 * \brief set fpga special modes
120 bool set_fpga_mode (int mode);
122 void set_verbose (bool verbose);
125 * \brief Set the digital down converter phase register.
127 * \param channel which ddc channel [0, 3]
128 * \param phase 32-bit integer phase value.
130 bool set_ddc_phase(int channel, int phase);
133 * \brief Set Programmable Gain Amplifier (PGA)
135 * \param which which A/D [0,3]
136 * \param gain_in_db gain value (linear in dB)
138 * gain is rounded to closest setting supported by hardware.
140 * \returns true iff sucessful.
142 * \sa pga_min(), pga_max(), pga_db_per_step()
144 bool set_pga (int which, double gain_in_db);
147 * \brief Return programmable gain amplifier gain setting in dB.
149 * \param which which A/D [0,3]
151 double pga (int which) const;
154 * \brief Return minimum legal PGA setting in dB.
156 double pga_min () const;
159 * \brief Return maximum legal PGA setting in dB.
161 double pga_max () const;
164 * \brief Return hardware step size of PGA (linear in dB).
166 double pga_db_per_step () const;
170 long fpga_master_clock_freq() const;
171 long converter_rate() const;
172 long adc_rate() const { return converter_rate(); } // alias
173 long adc_freq() const { return converter_rate(); } // deprecated alias
175 unsigned int decim_rate () const;
176 int nchannels () const;
178 double rx_freq (int channel) const;
179 int noverruns () const { return d_noverruns; }
182 * \brief Return daughterboard ID for given Rx daughterboard slot [0,1].
184 * \return daughterboard id >= 0 if successful
185 * \return -1 if no daugherboard
186 * \return -2 if invalid EEPROM on daughterboard
188 int daughterboard_id (int which_dboard) const;
191 * \brief Write auxiliary digital to analog converter.
193 * \param which_dboard [0,1] which d'board
194 * N.B., SLOT_TX_A and SLOT_RX_A share the same AUX DAC's.
195 * SLOT_TX_B and SLOT_RX_B share the same AUX DAC's.
196 * \param which_dac [2,3] TX slots must use only 2 and 3.
197 * \param value [0,4095]
198 * \returns true iff successful
200 bool write_aux_dac (int which_board, int which_dac, int value);
203 * \brief Read auxiliary analog to digital converter.
205 * \param which_dboard [0,1] which d'board
206 * \param which_adc [0,1]
207 * \returns value in the range [0,4095] if successful, else READ_FAILED.
209 int read_aux_adc (int which_dboard, int which_adc);
212 * \brief Write EEPROM on motherboard or any daughterboard.
213 * \param i2c_addr I2C bus address of EEPROM
214 * \param eeprom_offset byte offset in EEPROM to begin writing
215 * \param buf the data to write
216 * \returns true iff sucessful
218 bool write_eeprom (int i2c_addr, int eeprom_offset, const std::string buf);
221 * \brief Write EEPROM on motherboard or any daughterboard.
222 * \param i2c_addr I2C bus address of EEPROM
223 * \param eeprom_offset byte offset in EEPROM to begin reading
224 * \param len number of bytes to read
225 * \returns the data read if successful, else a zero length string.
227 std::string read_eeprom (int i2c_addr, int eeprom_offset, int len);
230 * \brief Write to I2C peripheral
231 * \param i2c_addr I2C bus address (7-bits)
232 * \param buf the data to write
233 * \returns true iff successful
234 * Writes are limited to a maximum of of 64 bytes.
236 bool write_i2c (int i2c_addr, const std::string buf);
239 * \brief Read from I2C peripheral
240 * \param i2c_addr I2C bus address (7-bits)
241 * \param len number of bytes to read
242 * \returns the data read if successful, else a zero length string.
243 * Reads are limited to a maximum of of 64 bytes.
245 std::string read_i2c (int i2c_addr, int len);
248 * \brief Set ADC offset correction
249 * \param which which ADC[0,3]: 0 = RX_A I, 1 = RX_A Q...
250 * \param offset 16-bit value to subtract from raw ADC input.
252 bool set_adc_offset (int which, int offset);
255 * \brief Set DAC offset correction
256 * \param which which DAC[0,3]: 0 = TX_A I, 1 = TX_A Q...
257 * \param offset 10-bit offset value (ambiguous format: See AD9862 datasheet).
258 * \param offset_pin 1-bit value. If 0 offset applied to -ve differential pin;
259 * If 1 offset applied to +ve differential pin.
261 bool set_dac_offset (int which, int offset, int offset_pin);
264 * \brief Control ADC input buffer
265 * \param which which ADC[0,3]
266 * \param bypass if non-zero, bypass input buffer and connect input
267 * directly to switched cap SHA input of RxPGA.
269 bool set_adc_buffer_bypass (int which, bool bypass);
272 * \brief return the usrp's serial number.
274 * \returns non-zero length string iff successful.
276 std::string serial_number();
279 * \brief Write direction register (output enables) for pins that go to daughterboard.
281 * \param which_dboard [0,1] which d'board
282 * \param value value to write into register
283 * \param mask which bits of value to write into reg
285 * Each d'board has 16-bits of general purpose i/o.
286 * Setting the bit makes it an output from the FPGA to the d'board.
288 * This register is initialized based on a value stored in the
289 * d'board EEPROM. In general, you shouldn't be using this routine
290 * without a very good reason. Using this method incorrectly will
291 * kill your USRP motherboard and/or daughterboard.
293 bool _write_oe (int which_dboard, int value, int mask);
296 * \brief Write daughterboard i/o pin value
298 * \param which_dboard [0,1] which d'board
299 * \param value value to write into register
300 * \param mask which bits of value to write into reg
302 bool write_io (int which_dboard, int value, int mask);
305 * \brief Read daughterboard i/o pin value
307 * \param which_dboard [0,1] which d'board
308 * \returns register value if successful, else READ_FAILED
310 int read_io (int which_dboard);
313 * \brief Enable/disable automatic DC offset removal control loop in FPGA
315 * \param bits which control loops to enable
316 * \param mask which \p bits to pay attention to
318 * If the corresponding bit is set, enable the automatic DC
319 * offset correction control loop.
322 * The 4 low bits are significant:
330 * By default the control loop is enabled on all ADC's.
332 bool set_dc_offset_cl_enable(int bits, int mask);
335 * \brief Specify Rx data format.
337 * \param format format specifier
339 * Rx data format control register
342 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
343 * +-----------------------------------------+-+-+---------+-------+
344 * | Reserved (Must be zero) |B|Q| WIDTH | SHIFT |
345 * +-----------------------------------------+-+-+---------+-------+
347 * SHIFT specifies arithmetic right shift [0, 15]
348 * WIDTH specifies bit-width of I & Q samples across the USB [1, 16] (not all valid)
349 * Q if set deliver both I & Q, else just I
350 * B if set bypass half-band filter.
352 * Right now the acceptable values are:
358 * More valid combos to come.
360 * Default value is 0x00000300 16-bits, 0 shift, deliver both I & Q.
362 bool set_format(unsigned int format);
365 * \brief return current format
367 unsigned int format () const;
369 static unsigned int make_format(int width=16, int shift=0,
370 bool want_q=true, bool bypass_halfband=false);
371 static int format_width(unsigned int format);
372 static int format_shift(unsigned int format);
373 static bool format_want_q(unsigned int format);
374 static bool format_bypass_halfband(unsigned int format);
376 // ----------------------------------------------------------------
377 // internal routines...
378 // You probably shouldn't be using these...
379 // ----------------------------------------------------------------
382 * \brief Write FPGA register.
383 * \param regno 7-bit register number
384 * \param value 32-bit value
385 * \returns true iff successful
387 bool _write_fpga_reg (int regno, int value); //< 7-bit regno, 32-bit value
390 * \brief Write FPGA register masked.
391 * \param regno 7-bit register number
392 * \param value 16-bit value
393 * \param mask 16-bit mask
394 * \returns true iff successful
396 bool _write_fpga_reg_masked (int regno, int value, int mask); //< 7-bit regno, 16-bit value, 16-bit mask
399 * \brief Read FPGA register.
400 * \param regno 7-bit register number
401 * \returns register value if successful, else READ_FAILED
403 int _read_fpga_reg (int regno);
406 * \brief Write AD9862 register.
407 * \param which_codec 0 or 1
408 * \param regno 6-bit register number
409 * \param value 8-bit value
410 * \returns true iff successful
412 bool _write_9862 (int which_codec, int regno, unsigned char value);
415 * \brief Read AD9862 register.
416 * \param which_codec 0 or 1
417 * \param regno 6-bit register number
418 * \returns register value if successful, else READ_FAILED
420 int _read_9862 (int which_codec, int regno) const;
423 * \brief Write data to SPI bus peripheral.
425 * \param optional_header 0,1 or 2 bytes to write before buf.
426 * \param enables bitmask of peripherals to write. See usrp_spi_defs.h
427 * \param format transaction format. See usrp_spi_defs.h SPI_FMT_*
428 * \param buf the data to write
429 * \returns true iff successful
430 * Writes are limited to a maximum of 64 bytes.
432 * If \p format specifies that optional_header bytes are present, they are
433 * written to the peripheral immediately prior to writing \p buf.
435 bool _write_spi (int optional_header, int enables, int format, std::string buf);
438 * \brief Read data from SPI bus peripheral.
440 * \param optional_header 0,1 or 2 bytes to write before buf.
441 * \param enables bitmask of peripheral to read. See usrp_spi_defs.h
442 * \param format transaction format. See usrp_spi_defs.h SPI_FMT_*
443 * \param len number of bytes to read. Must be in [0,64].
444 * \returns the data read if sucessful, else a zero length string.
446 * Reads are limited to a maximum of 64 bytes.
448 * If \p format specifies that optional_header bytes are present, they
449 * are written to the peripheral first. Then \p len bytes are read from
450 * the peripheral and returned.
452 std::string _read_spi (int optional_header, int enables, int format, int len);
455 #endif /* INCLUDED_USRP1_SOURCE_BASE_H */