3 * Copyright 2004 Free Software Foundation, Inc.
5 * This file is part of GNU Radio
7 * GNU Radio is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2, or (at your option)
12 * GNU Radio is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with GNU Radio; see the file COPYING. If not, write to
19 * the Free Software Foundation, Inc., 51 Franklin Street,
20 * Boston, MA 02110-1301, USA.
27 #include <usrp1_source_base.h>
28 #include <gr_io_signature.h>
29 #include <usrp_standard.h>
32 static const int OUTPUT_MULTIPLE_BYTES = 4 * 1024;
34 usrp1_source_base::usrp1_source_base (const std::string &name,
35 gr_io_signature_sptr output_signature,
37 unsigned int decim_rate,
43 const std::string fpga_filename,
44 const std::string firmware_filename
45 ) throw (std::runtime_error)
46 : gr_sync_block (name,
47 gr_make_io_signature (0, 0, 0),
51 d_usrp = usrp_standard_rx::make (which_board, decim_rate,
58 throw std::runtime_error ("can't open usrp1");
60 // All calls to d_usrp->read must be multiples of 512 bytes.
61 // We jack this up to 4k to reduce overhead.
63 set_output_multiple (OUTPUT_MULTIPLE_BYTES / output_signature->sizeof_stream_item (0));
66 usrp1_source_base::~usrp1_source_base ()
72 usrp1_source_base::sizeof_basic_sample() const
74 return usrp_standard_rx::format_width(d_usrp->format()) / 8;
78 usrp1_source_base::start()
80 return d_usrp->start();
84 usrp1_source_base::stop()
86 return d_usrp->stop();
90 usrp1_source_base::work (int noutput_items,
91 gr_vector_const_void_star &input_items,
92 gr_vector_void_star &output_items)
94 static const int BUFSIZE = 4 * OUTPUT_MULTIPLE_BYTES;
95 unsigned char buf[BUFSIZE];
97 int output_items_produced;
101 while (output_index < noutput_items){
102 int nbytes = ninput_bytes_reqd_for_noutput_items (noutput_items - output_index);
103 nbytes = std::min (nbytes, BUFSIZE);
105 int result_nbytes = d_usrp->read (buf, nbytes, &overrun);
107 // fprintf (stderr, "usrp1_source: overrun\n");
108 fputs ("uO", stderr);
112 if (result_nbytes < 0) // We've got a problem. Usually board unplugged or powered down.
113 return -1; // Indicate we're done.
115 if (result_nbytes != nbytes){ // not really an error, but unexpected
116 fprintf (stderr, "usrp1_source: short read. Expected %d, got %d\n",
117 nbytes, result_nbytes);
120 copy_from_usrp_buffer (output_items,
122 noutput_items - output_index, // output_items_available
123 output_items_produced, // [out]
125 result_nbytes, // usrp_buffer_length
126 bytes_read); // [out]
128 assert (output_index + output_items_produced <= noutput_items);
129 assert (bytes_read == result_nbytes);
131 output_index += output_items_produced;
134 return noutput_items;
139 usrp1_source_base::set_decim_rate (unsigned int rate)
141 return d_usrp->set_decim_rate (rate);
145 usrp1_source_base::set_nchannels (int nchan)
147 return d_usrp->set_nchannels (nchan);
151 usrp1_source_base::set_mux (int mux)
153 return d_usrp->set_mux (mux);
157 usrp1_source_base::set_rx_freq (int channel, double freq)
159 return d_usrp->set_rx_freq (channel, freq);
163 usrp1_source_base::fpga_master_clock_freq() const
165 return d_usrp->fpga_master_clock_freq();
169 usrp1_source_base::converter_rate() const
171 return d_usrp->converter_rate();
175 usrp1_source_base::decim_rate () const
177 return d_usrp->decim_rate ();
181 usrp1_source_base::nchannels () const
183 return d_usrp->nchannels ();
187 usrp1_source_base::mux () const
189 return d_usrp->mux ();
193 usrp1_source_base::rx_freq (int channel) const
195 return d_usrp->rx_freq (channel);
199 usrp1_source_base::set_fpga_mode (int mode)
201 return d_usrp->set_fpga_mode (mode);
205 usrp1_source_base::set_ddc_phase (int channel, int phase)
207 return d_usrp->set_ddc_phase(channel, phase);
211 usrp1_source_base::set_dc_offset_cl_enable(int bits, int mask)
213 return d_usrp->set_dc_offset_cl_enable(bits, mask);
217 usrp1_source_base::set_verbose (bool verbose)
219 d_usrp->set_verbose (verbose);
223 usrp1_source_base::write_aux_dac (int which_dboard, int which_dac, int value)
225 return d_usrp->write_aux_dac (which_dboard, which_dac, value);
229 usrp1_source_base::read_aux_adc (int which_dboard, int which_adc)
231 return d_usrp->read_aux_adc (which_dboard, which_adc);
235 usrp1_source_base::write_eeprom (int i2c_addr, int eeprom_offset, const std::string buf)
237 return d_usrp->write_eeprom (i2c_addr, eeprom_offset, buf);
241 usrp1_source_base::read_eeprom (int i2c_addr, int eeprom_offset, int len)
243 return d_usrp->read_eeprom (i2c_addr, eeprom_offset, len);
247 usrp1_source_base::write_i2c (int i2c_addr, const std::string buf)
249 return d_usrp->write_i2c (i2c_addr, buf);
253 usrp1_source_base::read_i2c (int i2c_addr, int len)
255 return d_usrp->read_i2c (i2c_addr, len);
259 usrp1_source_base::set_pga (int which, double gain)
261 return d_usrp->set_pga (which, gain);
265 usrp1_source_base::pga (int which) const
267 return d_usrp->pga (which);
271 usrp1_source_base::pga_min () const
273 return d_usrp->pga_min ();
277 usrp1_source_base::pga_max () const
279 return d_usrp->pga_max ();
283 usrp1_source_base::pga_db_per_step () const
285 return d_usrp->pga_db_per_step ();
289 usrp1_source_base::daughterboard_id (int which) const
291 return d_usrp->daughterboard_id (which);
296 usrp1_source_base::set_adc_offset (int which, int offset)
298 return d_usrp->set_adc_offset (which, offset);
302 usrp1_source_base::set_dac_offset (int which, int offset, int offset_pin)
304 return d_usrp->set_dac_offset (which, offset, offset_pin);
308 usrp1_source_base::set_adc_buffer_bypass (int which, bool bypass)
310 return d_usrp->set_adc_buffer_bypass (which, bypass);
314 usrp1_source_base::serial_number()
316 return d_usrp->serial_number();
320 usrp1_source_base::_write_oe (int which_dboard, int value, int mask)
322 return d_usrp->_write_oe (which_dboard, value, mask);
326 usrp1_source_base::write_io (int which_dboard, int value, int mask)
328 return d_usrp->write_io (which_dboard, value, mask);
332 usrp1_source_base::read_io (int which_dboard)
334 return d_usrp->read_io (which_dboard);
340 // internal routines...
343 usrp1_source_base::_write_fpga_reg (int regno, int value)
345 return d_usrp->_write_fpga_reg (regno, value);
349 usrp1_source_base::_write_fpga_reg_masked (int regno, int value, int mask)
351 return d_usrp->_write_fpga_reg_masked (regno, value, mask);
355 usrp1_source_base::_read_fpga_reg (int regno)
357 return d_usrp->_read_fpga_reg (regno);
361 usrp1_source_base::_write_9862 (int which_codec, int regno, unsigned char value)
363 return d_usrp->_write_9862 (which_codec, regno, value);
367 usrp1_source_base::_read_9862 (int which_codec, int regno) const
369 return d_usrp->_read_9862 (which_codec, regno);
373 usrp1_source_base::_write_spi (int optional_header, int enables,
374 int format, std::string buf)
376 return d_usrp->_write_spi (optional_header, enables, format, buf);
380 usrp1_source_base::_read_spi (int optional_header, int enables, int format, int len)
382 return d_usrp->_read_spi (optional_header, enables, format, len);
386 usrp1_source_base::set_format(unsigned int format)
388 return d_usrp->set_format(format);
392 usrp1_source_base::format() const
394 return d_usrp->format();
398 usrp1_source_base::make_format(int width, int shift, bool want_q, bool bypass_halfband)
400 return usrp_standard_rx::make_format(width, shift, want_q, bypass_halfband);
404 usrp1_source_base::format_width(unsigned int format)
406 return usrp_standard_rx::format_width(format);
410 usrp1_source_base::format_shift(unsigned int format)
412 return usrp_standard_rx::format_shift(format);
416 usrp1_source_base::format_want_q(unsigned int format)
418 return usrp_standard_rx::format_want_q(format);
422 usrp1_source_base::format_bypass_halfband(unsigned int format)
424 return usrp_standard_rx::format_bypass_halfband(format);