3 // USRP - Universal Software Radio Peripheral
5 // Copyright (C) 2007 Corgan Enterprises LLC
7 // This program is free software; you can redistribute it and/or modify
8 // it under the terms of the GNU General Public License as published by
9 // the Free Software Foundation; either version 2 of the License, or
10 // (at your option) any later version.
12 // This program is distributed in the hope that it will be useful,
13 // but WITHOUT ANY WARRANTY; without even the implied warranty of
14 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 // GNU General Public License for more details.
17 // You should have received a copy of the GNU General Public License
18 // along with this program; if not, write to the Free Software
19 // Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA
22 `include "../../../../usrp/firmware/include/fpga_regs_common.v"
23 `include "../../../../usrp/firmware/include/fpga_regs_standard.v"
25 module sounder_ctrl(clk_i,rst_i,saddr_i,sdata_i,s_strobe_i,
26 reset_o,transmit_o,receive_o,loopback_o,
27 degree_o,ampl_o,mask_o,
28 tx_strobe_o,rx_strobe_o,sum_strobe_o,ref_strobe_o);
30 input clk_i; // Master clock @ 64 MHz
31 input rst_i; // Master synchronous reset
32 input [6:0] saddr_i; // Configuration bus address
33 input [31:0] sdata_i; // Configuration bus data
34 input s_strobe_i; // Configuration bus write
39 output [4:0] degree_o;
47 setting_reg #(`FR_USER_0) sr_mode
48 ( .clock(clk_i),.reset(1'b0),.strobe(s_strobe_i),.addr(saddr_i),.in(sdata_i),
49 .out({loopback_o,receive_o,transmit_o,reset_o}) );
51 setting_reg #(`FR_USER_1) sr_lfsr_degree
52 ( .clock(clk_i),.reset(1'b0),.strobe(s_strobe_i),.addr(saddr_i),.in(sdata_i),
55 setting_reg #(`FR_USER_2) sr_lfsr_ampl
56 ( .clock(clk_i),.reset(1'b0),.strobe(s_strobe_i),.addr(saddr_i),.in(sdata_i),
60 lfsr_constants constants
61 (.clk_i(clk_i),.rst_i(rst_i),.degree_i(degree_o),.mask_o(mask_o),
65 assign tx_strobe_o = ~phase[0];
66 assign ref_strobe_o = tx_strobe_o & !(phase>>1 == len>>1);
67 assign sum_strobe_o = (phase == len);
70 always @(posedge clk_i)
80 rx_strobe_o <= #5 1'b1;
84 phase <= #5 phase + 16'b1;
97 endmodule // sounder_ctrl