3 // USRP - Universal Software Radio Peripheral
5 // Copyright (C) 2007 Corgan Enterprises LLC
7 // This program is free software; you can redistribute it and/or modify
8 // it under the terms of the GNU General Public License as published by
9 // the Free Software Foundation; either version 2 of the License, or
10 // (at your option) any later version.
12 // This program is distributed in the hope that it will be useful,
13 // but WITHOUT ANY WARRANTY; without even the implied warranty of
14 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 // GNU General Public License for more details.
17 // You should have received a copy of the GNU General Public License
18 // along with this program; if not, write to the Free Software
19 // Foundation, Inc., 51 Franklin Street, Boston, MA 02110-1301 USA
22 `include "../../../../usrp/firmware/include/fpga_regs_common.v"
23 `include "../../../../usrp/firmware/include/fpga_regs_standard.v"
25 module radar_rx(clk_i,rst_i,ena_i,dbg_i,pulse_num_i,rx_in_i_i,
26 rx_in_q_i,rx_i_o,rx_q_o,rx_strobe_o);
33 input [15:0] rx_in_i_i;
34 input [15:0] rx_in_q_i;
35 input [15:0] pulse_num_i;
39 output reg rx_strobe_o;
43 always @(posedge clk_i)
47 count <= count + 16'b1;
49 wire [31:0] fifo_inp = dbg_i ? {count[15:0],pulse_num_i[15:0]} : {rx_in_i_i,rx_in_q_i};
51 // Buffer incoming samples every clock
56 // Use model if simulating, otherwise Altera Megacell
58 fifo_1clk #(32, 2048) buffer(.clock(clk_i),.sclr(rst_i),
59 .data(fifo_inp),.wrreq(ena_i),
60 .rdreq(fifo_ack),.q(fifo_out),
63 fifo32_2k buffer(.clock(clk_i),.sclr(rst_i),
64 .data(fifo_inp),.wrreq(ena_i),
65 .rdreq(fifo_ack),.q(fifo_out),
69 // Write samples to rx_fifo every third clock
70 `define ST_FIFO_IDLE 3'b001
71 `define ST_FIFO_STROBE 3'b010
72 `define ST_FIFO_ACK 3'b100
76 always @(posedge clk_i)
79 state <= `ST_FIFO_IDLE;
88 // Tell rx_fifo sample is ready
90 state <= `ST_FIFO_STROBE;
97 state <= `ST_FIFO_ACK;
102 state <= `ST_FIFO_IDLE;
104 endcase // case(state)
106 assign rx_i_o = fifo_out[31:16];
107 assign rx_q_o = fifo_out[15:0];
109 endmodule // radar_rx