3 from gnuradio import gr, gru, eng_notation
4 from gnuradio import usrp
5 from gnuradio.eng_option import eng_option
6 from gnuradio import eng_notation
7 from gnuradio import optfir
8 from optparse import OptionParser
9 from usrpm import usrp_dbid
14 # required FPGA that can do 4 rx channels.
17 class my_graph(gr.top_block):
20 gr.top_block.__init__(self)
22 parser = OptionParser (option_class=eng_option)
23 #parser.add_option("-S", "--subdev", type="subdev", default=(0, None),
24 # help="select USRP Rx side A or B (default=A)")
25 parser.add_option("-d", "--decim", type="int", default=128,
26 help="set fgpa decimation rate to DECIM [default=%default]")
27 parser.add_option("-f", "--freq", type="eng_float", default=146.585e6,
28 help="set frequency to FREQ [default=%default])", metavar="FREQ")
29 parser.add_option("-g", "--gain", type="eng_float", default=20,
30 help="set gain in dB [default=%default]")
31 parser.add_option("-F", "--filter", action="store_true", default=True,
32 help="Enable channel filter")
33 parser.add_option("-o", "--output", type="string", default=None,
34 help="set output basename")
35 (options, args) = parser.parse_args()
41 if options.output is None:
43 sys.stderr.write("You must provide an output filename base with -o OUTPUT\n")
46 basename = options.output
56 self.u = usrp.source_c(0, options.decim, fpga_filename="std_4rx_0tx.rbf")
57 if self.u.nddcs() < nchan:
58 sys.stderr.write('This code requires an FPGA build with %d DDCs. This FPGA has only %d.\n' % (
59 nchan, self.u.nddcs()))
62 if not self.u.set_nchannels(nchan):
63 sys.stderr.write('set_nchannels(%d) failed\n' % (nchan,))
66 input_rate = self.u.adc_freq() / self.u.decim_rate()
67 print "USB data rate = %s" % (eng_notation.num_to_str(input_rate),)
68 sink_data_rate = input_rate/sw_decim
69 print "Scope data rate = %s" % (eng_notation.num_to_str(sink_data_rate),)
71 self.subdev = self.u.db(0) + self.u.db(1)
73 if (len(self.subdev) < 4 or
74 self.u.db(0, 0).dbid() != usrp_dbid.BASIC_RX or
75 self.u.db(1, 0).dbid() != usrp_dbid.BASIC_RX):
76 sys.stderr.write('This code requires a Basic Rx board on Sides A & B\n')
79 self.u.set_mux(gru.hexint(0xf3f2f1f0))
81 # collect 1 second worth of data
82 limit = int(nsecs * input_rate * nchan)
83 print "limit = ", limit
84 head = gr.head(gr.sizeof_gr_complex, limit)
86 # deinterleave four channels from FPGA
87 di = gr.deinterleave(gr.sizeof_gr_complex)
89 self.connect(self.u, head, di)
91 # taps for channel filter
92 chan_filt_coeffs = optfir.low_pass (1, # gain
93 input_rate, # sampling rate
94 80e3, # passband cutoff
95 115e3, # stopband cutoff
96 0.1, # passband ripple
97 60) # stopband attenuation
98 #print len(chan_filt_coeffs)
100 for i in range(nchan):
102 sink = gr.file_sink(gr.sizeof_gr_complex,
103 basename + ("-%s-%d.dat" % (eng_notation.num_to_str(sink_data_rate), i)))
105 chan_filt = gr.fir_filter_ccf(sw_decim, chan_filt_coeffs)
106 self.connect((di, i), chan_filt, sink)
108 self.connect((di, i), sink)
111 self.set_gain(options.gain)
112 self.set_freq(options.freq)
114 def set_gain(self, gain):
115 for i in range(len(self.subdev)):
116 self.subdev[i].set_gain(gain)
118 def set_freq(self, target_freq):
120 for i in range(len(self.subdev)):
121 r = usrp.tune(self.u, i, self.subdev[i], target_freq)
124 print "set_freq: failed to set subdev[%d] freq to %f" % (
133 if __name__ == '__main__':