1 /* -*- tab-width:8 -*- */
4 Copyright (C) 2011 Peter Zotov <whitequark@whitequark.org>
5 Use of this source code is governed by a BSD-style
6 license that can be found in the LICENSE file.
13 #include <sys/types.h>
14 #include <sys/socket.h>
15 #include <netinet/in.h>
16 #include <arpa/inet.h>
19 #include <stlink-common.h>
21 #include "gdb-remote.h"
23 #define FLASH_BASE 0x08000000
24 #define FLASH_PAGE (sl->flash_pgsz)
25 #define FLASH_PAGE_MASK (~((1 << 10) - 1))
26 #define FLASH_SIZE (FLASH_PAGE * 128)
28 volatile int do_exit = 0;
34 static const char hex[] = "0123456789abcdef";
36 static const char* current_memory_map = NULL;
39 * Chip IDs are explained in the appropriate programming manual for the
40 * DBGMCU_IDCODE register (0xE0042000)
43 #define CORE_M3_R1 0x1BA00477
44 #define CORE_M3_R2 0x4BA00477
45 #define CORE_M4_R0 0x2BA01477
50 uint32_t flash_size_reg;
51 uint32_t max_flash_size, flash_pagesize;
53 uint32_t bootrom_base, bootrom_size;
55 { 0x410, "F1 Medium-density device", 0x1ffff7e0,
56 0x20000, 0x400, 0x5000, 0x1ffff000, 0x800 }, // table 2, pm0063
57 { 0x411, "F2 device", 0, /* No flash size register found in the docs*/
58 0x100000, 0x20000, 0x20000, 0x1fff0000, 0x7800 }, // table 1, pm0059
59 { 0x412, "F1 Low-density device", 0x1ffff7e0,
60 0x8000, 0x400, 0x2800, 0x1ffff000, 0x800 }, // table 1, pm0063
61 { 0x413, "F4 device", 0x1FFF7A10,
62 0x100000, 0x20000, 0x30000, 0x1fff0000, 0x7800 }, // table 1, pm0081
63 { 0x414, "F1 High-density device", 0x1ffff7e0,
64 0x80000, 0x800, 0x10000, 0x1ffff000, 0x800 }, // table 3 pm0063
65 // This ignores the EEPROM! (and uses the page erase size,
66 // not the sector write protection...)
67 { 0x416, "L1 Med-density device", 0x1FF8004C, // table 1, pm0062
68 0x20000, 0x100, 0x4000, 0x1ff00000, 0x1000 },
69 { 0x418, "F1 Connectivity line device", 0x1ffff7e0,
70 0x40000, 0x800, 0x10000, 0x1fffb000, 0x4800 },
71 { 0x420, "F1 Medium-density value line device", 0x1ffff7e0,
72 0x20000, 0x400, 0x2000, 0x1ffff000, 0x800 },
73 { 0x428, "F1 High-density value line device", 0x1ffff7e0,
74 0x80000, 0x800, 0x8000, 0x1ffff000, 0x800 },
75 { 0x430, "F1 XL-density device", 0x1ffff7e0, // pm0068
76 0x100000, 0x800, 0x18000, 0x1fffe000, 0x1800 },
80 int serve(stlink_t *sl, int port);
81 char* make_memory_map(const struct chip_params *params, uint32_t flash_size);
83 int main(int argc, char** argv) {
87 const char * HelpStr = "Usage:\n"
88 "\t st-util port [/dev/sgX]\n"
90 "\t st-util --help\n";
95 fprintf(stderr, HelpStr, NULL);
100 //sl = stlink_quirk_open(argv[2], 0);
101 // FIXME - hardcoded to usb....
102 sl = stlink_open_usb(10);
103 if(sl == NULL) return 1;
108 if (strcmp(argv[1], "--help") == 0) {
109 fprintf(stdout, HelpStr, NULL);
114 case 1 : { // Search ST-LINK (from /dev/sg0 to /dev/sg99)
115 const int DevNumMax = 99;
116 int ExistDevCount = 0;
118 for(int DevNum = 0; DevNum <= DevNumMax; DevNum++)
121 char DevName[] = "/dev/sgX";
122 const int X_index = 7;
123 DevName[X_index] = DevNum + '0';
124 if ( !access(DevName, F_OK) ) {
125 sl = stlink_quirk_open(DevName, 0);
129 else if(DevNum < 100) {
130 char DevName[] = "/dev/sgXY";
131 const int X_index = 7;
132 const int Y_index = 8;
133 DevName[X_index] = DevNum/10 + '0';
134 DevName[Y_index] = DevNum%10 + '0';
135 if ( !access(DevName, F_OK) ) {
136 sl = stlink_quirk_open(DevName, 0);
140 if(sl != NULL) break;
144 fprintf(stdout, "\nNumber of /dev/sgX devices found: %i \n",
146 fprintf(stderr, "ST-LINK not found\n");
153 if (stlink_current_mode(sl) == STLINK_DEV_DFU_MODE) {
154 stlink_exit_dfu_mode(sl);
157 if(stlink_current_mode(sl) != STLINK_DEV_DEBUG_MODE) {
158 stlink_enter_swd_mode(sl);
161 uint32_t chip_id = stlink_chip_id(sl);
162 uint32_t core_id = stlink_core_id(sl);
164 /* Fix chip_id for F4 */
165 if (((chip_id & 0xFFF) == 0x411) && (core_id == CORE_M4_R0)) {
166 printf("Fixing wrong chip_id for STM32F4 Rev A errata\n");
170 printf("Chip ID is %08x, Core ID is %08x.\n", chip_id, core_id);
172 const struct chip_params* params = NULL;
174 for(int i = 0; i < sizeof(devices) / sizeof(devices[0]); i++) {
175 if(devices[i].chip_id == (chip_id & 0xFFF)) {
176 params = &devices[i];
182 fprintf(stderr, "Cannot recognize the connected device!\n");
186 printf("Device connected: %s\n", params->description);
187 printf("Device parameters: SRAM: 0x%x bytes, Flash: up to 0x%x bytes in pages of 0x%x bytes\n",
188 params->sram_size, params->max_flash_size, params->flash_pagesize);
190 FLASH_PAGE = params->flash_pagesize;
194 stlink_read_mem32(sl, params->flash_size_reg, 4);
195 flash_size = sl->q_buf[0] | (sl->q_buf[1] << 8);
197 printf("Flash size is %d KiB.\n", flash_size);
198 // memory map is in 1k blocks.
199 current_memory_map = make_memory_map(params, flash_size * 0x400);
203 while(serve(sl, port) == 0);
205 /* Switch back to mass storage mode before closing. */
207 stlink_exit_debug_mode(sl);
213 static const char* const memory_map_template =
214 "<?xml version=\"1.0\"?>"
215 "<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
216 " \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
218 " <memory type=\"rom\" start=\"0x00000000\" length=\"0x%x\"/>" // code = sram, bootrom or flash; flash is bigger
219 " <memory type=\"ram\" start=\"0x20000000\" length=\"0x%x\"/>" // sram 8k
220 " <memory type=\"flash\" start=\"0x08000000\" length=\"0x%x\">"
221 " <property name=\"blocksize\">0x%x</property>"
223 " <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
224 " <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
225 " <memory type=\"rom\" start=\"0x%08x\" length=\"0x%x\"/>" // bootrom
226 " <memory type=\"rom\" start=\"0x1ffff800\" length=\"0x8\"/>" // option byte area
229 char* make_memory_map(const struct chip_params *params, uint32_t flash_size) {
230 /* This will be freed in serve() */
231 char* map = malloc(4096);
234 snprintf(map, 4096, memory_map_template,
237 flash_size, params->flash_pagesize,
238 params->bootrom_base, params->bootrom_size);
245 * DWT_COMP0 0xE0001020
246 * DWT_MASK0 0xE0001024
247 * DWT_FUNCTION0 0xE0001028
248 * DWT_COMP1 0xE0001030
249 * DWT_MASK1 0xE0001034
250 * DWT_FUNCTION1 0xE0001038
251 * DWT_COMP2 0xE0001040
252 * DWT_MASK2 0xE0001044
253 * DWT_FUNCTION2 0xE0001048
254 * DWT_COMP3 0xE0001050
255 * DWT_MASK3 0xE0001054
256 * DWT_FUNCTION3 0xE0001058
259 #define DATA_WATCH_NUM 4
261 enum watchfun { WATCHDISABLED = 0, WATCHREAD = 5, WATCHWRITE = 6, WATCHACCESS = 7 };
263 struct code_hw_watchpoint {
269 struct code_hw_watchpoint data_watches[DATA_WATCH_NUM];
271 static void init_data_watchpoints(stlink_t *sl) {
273 printf("init watchpoints\n");
276 // set trcena in debug command to turn on dwt unit
277 stlink_read_mem32(sl, 0xE000EDFC, 4);
279 stlink_write_mem32(sl, 0xE000EDFC, 4);
281 // make sure all watchpoints are cleared
282 memset(sl->q_buf, 0, 4);
283 for(int i = 0; i < DATA_WATCH_NUM; i++) {
284 data_watches[i].fun = WATCHDISABLED;
285 stlink_write_mem32(sl, 0xe0001028 + i * 16, 4);
289 static int add_data_watchpoint(stlink_t *sl, enum watchfun wf, stm32_addr_t addr, unsigned int len)
295 // find a free watchpoint
305 if((mask != -1) && (mask < 16)) {
306 for(i = 0; i < DATA_WATCH_NUM; i++) {
307 // is this an empty slot ?
308 if(data_watches[i].fun == WATCHDISABLED) {
310 printf("insert watchpoint %d addr %x wf %u mask %u len %d\n", i, addr, wf, mask, len);
313 data_watches[i].fun = wf;
314 data_watches[i].addr = addr;
315 data_watches[i].mask = mask;
317 // insert comparator address
318 sl->q_buf[0] = (addr & 0xff);
319 sl->q_buf[1] = ((addr >> 8) & 0xff);
320 sl->q_buf[2] = ((addr >> 16) & 0xff);
321 sl->q_buf[3] = ((addr >> 24) & 0xff);
323 stlink_write_mem32(sl, 0xE0001020 + i * 16, 4);
326 memset(sl->q_buf, 0, 4);
328 stlink_write_mem32(sl, 0xE0001024 + i * 16, 4);
331 memset(sl->q_buf, 0, 4);
333 stlink_write_mem32(sl, 0xE0001028 + i * 16, 4);
335 // just to make sure the matched bit is clear !
336 stlink_read_mem32(sl, 0xE0001028 + i * 16, 4);
343 printf("failure: add watchpoints addr %x wf %u len %u\n", addr, wf, len);
348 static int delete_data_watchpoint(stlink_t *sl, stm32_addr_t addr)
352 for(i = 0 ; i < DATA_WATCH_NUM; i++) {
353 if((data_watches[i].addr == addr) && (data_watches[i].fun != WATCHDISABLED)) {
355 printf("delete watchpoint %d addr %x\n", i, addr);
358 memset(sl->q_buf, 0, 4);
359 data_watches[i].fun = WATCHDISABLED;
360 stlink_write_mem32(sl, 0xe0001028 + i * 16, 4);
367 printf("failure: delete watchpoint addr %x\n", addr);
373 #define CODE_BREAK_NUM 6
374 #define CODE_BREAK_LOW 0x01
375 #define CODE_BREAK_HIGH 0x02
377 struct code_hw_breakpoint {
382 struct code_hw_breakpoint code_breaks[CODE_BREAK_NUM];
384 static void init_code_breakpoints(stlink_t *sl) {
385 memset(sl->q_buf, 0, 4);
386 sl->q_buf[0] = 0x03; // KEY | ENABLE
387 stlink_write_mem32(sl, CM3_REG_FP_CTRL, 4);
388 printf("KARL - should read back as 0x03, not 60 02 00 00\n");
389 stlink_read_mem32(sl, CM3_REG_FP_CTRL, 4);
391 memset(sl->q_buf, 0, 4);
392 for(int i = 0; i < CODE_BREAK_NUM; i++) {
393 code_breaks[i].type = 0;
394 stlink_write_mem32(sl, CM3_REG_FP_COMP0 + i * 4, 4);
398 static int update_code_breakpoint(stlink_t *sl, stm32_addr_t addr, int set) {
399 stm32_addr_t fpb_addr = addr & ~0x3;
400 int type = addr & 0x2 ? CODE_BREAK_HIGH : CODE_BREAK_LOW;
403 fprintf(stderr, "update_code_breakpoint: unaligned address %08x\n", addr);
408 for(int i = 0; i < CODE_BREAK_NUM; i++) {
409 if(fpb_addr == code_breaks[i].addr ||
410 (set && code_breaks[i].type == 0)) {
417 if(set) return -1; // Free slot not found
418 else return 0; // Breakpoint is already removed
421 struct code_hw_breakpoint* brk = &code_breaks[id];
423 brk->addr = fpb_addr;
425 if(set) brk->type |= type;
426 else brk->type &= ~type;
428 memset(sl->q_buf, 0, 4);
432 printf("clearing hw break %d\n", id);
435 stlink_write_mem32(sl, 0xe0002008 + id * 4, 4);
437 sl->q_buf[0] = ( brk->addr & 0xff) | 1;
438 sl->q_buf[1] = ((brk->addr >> 8) & 0xff);
439 sl->q_buf[2] = ((brk->addr >> 16) & 0xff);
440 sl->q_buf[3] = ((brk->addr >> 24) & 0xff) | (brk->type << 6);
443 printf("setting hw break %d at %08x (%d)\n",
444 id, brk->addr, brk->type);
445 printf("reg %02x %02x %02x %02x\n",
446 sl->q_buf[3], sl->q_buf[2], sl->q_buf[1], sl->q_buf[0]);
449 stlink_write_mem32(sl, 0xe0002008 + id * 4, 4);
461 struct flash_block* next;
464 static struct flash_block* flash_root;
466 static int flash_add_block(stm32_addr_t addr, unsigned length,
468 if(addr < FLASH_BASE || addr + length > FLASH_BASE + FLASH_SIZE) {
469 fprintf(stderr, "flash_add_block: incorrect bounds\n");
473 if(addr % FLASH_PAGE != 0 || length % FLASH_PAGE != 0) {
474 fprintf(stderr, "flash_add_block: unaligned block\n");
478 struct flash_block* new = malloc(sizeof(struct flash_block));
479 new->next = flash_root;
482 new->length = length;
483 new->data = calloc(length, 1);
490 static int flash_populate(stm32_addr_t addr, uint8_t* data, unsigned length) {
491 int fit_blocks = 0, fit_length = 0;
493 for(struct flash_block* fb = flash_root; fb; fb = fb->next) {
494 /* Block: ------X------Y--------
498 * Block intersects with data, if:
502 unsigned X = fb->addr, Y = fb->addr + fb->length;
503 unsigned a = addr, b = addr + length;
505 // from start of the block
506 unsigned start = (a > X ? a : X) - X;
507 unsigned end = (b > Y ? Y : b) - X;
509 memcpy(fb->data + start, data, end - start);
512 fit_length += end - start;
516 if(fit_blocks == 0) {
517 fprintf(stderr, "Unfit data block %08x -> %04x\n", addr, length);
521 if(fit_length != length) {
522 fprintf(stderr, "warning: data block %08x -> %04x truncated to %04x\n",
523 addr, length, fit_length);
524 fprintf(stderr, "(this is not an error, just a GDB glitch)\n");
530 static int flash_go(stlink_t *sl) {
533 // Some kinds of clock settings do not allow writing to flash.
536 for(struct flash_block* fb = flash_root; fb; fb = fb->next) {
538 printf("flash_do: block %08x -> %04x\n", fb->addr, fb->length);
541 unsigned length = fb->length;
542 for(stm32_addr_t page = fb->addr; page < fb->addr + fb->length; page += FLASH_PAGE) {
544 printf("flash_do: page %08x\n", page);
547 stlink_erase_flash_page(sl, page);
549 if(stlink_write_flash(sl, page, fb->data + (page - fb->addr),
550 length > FLASH_PAGE ? FLASH_PAGE : length) < 0)
561 for(struct flash_block* fb = flash_root, *next; fb; fb = next) {
572 int serve(stlink_t *sl, int port) {
573 int sock = socket(AF_INET, SOCK_STREAM, 0);
579 unsigned int val = 1;
580 setsockopt(sock, SOL_SOCKET, SO_REUSEADDR, &val, sizeof(val));
582 struct sockaddr_in serv_addr = {0};
583 serv_addr.sin_family = AF_INET;
584 serv_addr.sin_addr.s_addr = inet_addr("127.0.0.1");
585 serv_addr.sin_port = htons(port);
587 if(bind(sock, (struct sockaddr *) &serv_addr, sizeof(serv_addr)) < 0) {
592 if(listen(sock, 5) < 0) {
597 stlink_force_debug(sl);
599 init_code_breakpoints(sl);
600 init_data_watchpoints(sl);
602 printf("Listening at *:%d...\n", port);
604 (void) signal (SIGINT, ctrl_c);
605 int client = accept(sock, NULL, NULL);
606 signal (SIGINT, SIG_DFL);
614 printf("GDB connected.\n");
617 * To allow resetting the chip from GDB it is required to
618 * emulate attaching and detaching to target.
620 unsigned int attached = 1;
625 int status = gdb_recv_packet(client, &packet);
627 fprintf(stderr, "cannot recv: %d\n", status);
632 printf("recv: %s\n", packet);
640 if(packet[1] == 'P' || packet[1] == 'C' || packet[1] == 'L') {
645 char *separator = strstr(packet, ":"), *params = "";
646 if(separator == NULL) {
647 separator = packet + strlen(packet);
649 params = separator + 1;
652 unsigned queryNameLength = (separator - &packet[1]);
653 char* queryName = calloc(queryNameLength + 1, 1);
654 strncpy(queryName, &packet[1], queryNameLength);
657 printf("query: %s;%s\n", queryName, params);
660 if(!strcmp(queryName, "Supported")) {
661 reply = strdup("PacketSize=3fff;qXfer:memory-map:read+");
662 } else if(!strcmp(queryName, "Xfer")) {
663 char *type, *op, *s_addr, *s_length;
665 char *annex __attribute__((unused));
667 type = strsep(&tok, ":");
668 op = strsep(&tok, ":");
669 annex = strsep(&tok, ":");
670 s_addr = strsep(&tok, ",");
673 unsigned addr = strtoul(s_addr, NULL, 16),
674 length = strtoul(s_length, NULL, 16);
677 printf("Xfer: type:%s;op:%s;annex:%s;addr:%d;length:%d\n",
678 type, op, annex, addr, length);
681 const char* data = NULL;
683 if(!strcmp(type, "memory-map") && !strcmp(op, "read"))
684 data = current_memory_map;
687 unsigned data_length = strlen(data);
688 if(addr + length > data_length)
689 length = data_length - addr;
694 reply = calloc(length + 2, 1);
696 strncpy(&reply[1], data, length);
711 char *cmdName = strtok_r(packet, ":;", ¶ms);
713 cmdName++; // vCommand -> Command
715 if(!strcmp(cmdName, "FlashErase")) {
716 char *s_addr, *s_length;
719 s_addr = strsep(&tok, ",");
722 unsigned addr = strtoul(s_addr, NULL, 16),
723 length = strtoul(s_length, NULL, 16);
726 printf("FlashErase: addr:%08x,len:%04x\n",
730 if(flash_add_block(addr, length, sl) < 0) {
731 reply = strdup("E00");
733 reply = strdup("OK");
735 } else if(!strcmp(cmdName, "FlashWrite")) {
739 s_addr = strsep(&tok, ":");
742 unsigned addr = strtoul(s_addr, NULL, 16);
743 unsigned data_length = status - (data - packet);
745 // Length of decoded data cannot be more than
746 // encoded, as escapes are removed.
747 // Additional byte is reserved for alignment fix.
748 uint8_t *decoded = calloc(data_length + 1, 1);
749 unsigned dec_index = 0;
750 for(int i = 0; i < data_length; i++) {
751 if(data[i] == 0x7d) {
753 decoded[dec_index++] = data[i] ^ 0x20;
755 decoded[dec_index++] = data[i];
760 if(dec_index % 2 != 0)
764 printf("binary packet %d -> %d\n", data_length, dec_index);
767 if(flash_populate(addr, decoded, dec_index) < 0) {
768 reply = strdup("E00");
770 reply = strdup("OK");
772 } else if(!strcmp(cmdName, "FlashDone")) {
773 if(flash_go(sl) < 0) {
774 reply = strdup("E00");
776 reply = strdup("OK");
778 } else if(!strcmp(cmdName, "Kill")) {
781 reply = strdup("OK");
794 int status = gdb_check_for_interrupt(client);
796 fprintf(stderr, "cannot check for int: %d\n", status);
801 stlink_force_debug(sl);
806 if(sl->core_stat == STLINK_CORE_HALTED) {
813 reply = strdup("S05"); // TRAP
819 reply = strdup("S05"); // TRAP
824 reply = strdup("S05"); // TRAP
826 /* Stub shall reply OK if not attached. */
827 reply = strdup("OK");
832 stlink_read_all_regs(sl, ®p);
834 reply = calloc(8 * 16 + 1, 1);
835 for(int i = 0; i < 16; i++)
836 sprintf(&reply[i * 8], "%08x", htonl(regp.r[i]));
841 unsigned id = strtoul(&packet[1], NULL, 16);
842 unsigned myreg = 0xDEADDEAD;
845 stlink_read_reg(sl, id, ®p);
846 myreg = htonl(regp.r[id]);
847 } else if(id == 0x19) {
848 stlink_read_reg(sl, 16, ®p);
849 myreg = htonl(regp.xpsr);
851 reply = strdup("E00");
854 reply = calloc(8 + 1, 1);
855 sprintf(reply, "%08x", myreg);
861 char* s_reg = &packet[1];
862 char* s_value = strstr(&packet[1], "=") + 1;
864 unsigned reg = strtoul(s_reg, NULL, 16);
865 unsigned value = strtoul(s_value, NULL, 16);
868 stlink_write_reg(sl, ntohl(value), reg);
869 } else if(reg == 0x19) {
870 stlink_write_reg(sl, ntohl(value), 16);
872 reply = strdup("E00");
876 reply = strdup("OK");
883 for(int i = 0; i < 16; i++) {
885 strncpy(str, &packet[1 + i * 8], 8);
886 uint32_t reg = strtoul(str, NULL, 16);
887 stlink_write_reg(sl, ntohl(reg), i);
890 reply = strdup("OK");
894 char* s_start = &packet[1];
895 char* s_count = strstr(&packet[1], ",") + 1;
897 stm32_addr_t start = strtoul(s_start, NULL, 16);
898 unsigned count = strtoul(s_count, NULL, 16);
900 unsigned adj_start = start % 4;
902 stlink_read_mem32(sl, start - adj_start, (count % 4 == 0) ?
903 count : count + 4 - (count % 4));
905 reply = calloc(count * 2 + 1, 1);
906 for(int i = 0; i < count; i++) {
907 reply[i * 2 + 0] = hex[sl->q_buf[i + adj_start] >> 4];
908 reply[i * 2 + 1] = hex[sl->q_buf[i + adj_start] & 0xf];
915 char* s_start = &packet[1];
916 char* s_count = strstr(&packet[1], ",") + 1;
917 char* hexdata = strstr(packet, ":") + 1;
919 stm32_addr_t start = strtoul(s_start, NULL, 16);
920 unsigned count = strtoul(s_count, NULL, 16);
922 for(int i = 0; i < count; i ++) {
923 char hex[3] = { hexdata[i*2], hexdata[i*2+1], 0 };
924 uint8_t byte = strtoul(hex, NULL, 16);
928 if((count % 4) == 0 && (start % 4) == 0) {
929 stlink_write_mem32(sl, start, count);
931 stlink_write_mem8(sl, start, count);
934 reply = strdup("OK");
941 stm32_addr_t addr = strtoul(&packet[3], &endptr, 16);
942 stm32_addr_t len = strtoul(&endptr[1], NULL, 16);
946 if(update_code_breakpoint(sl, addr, 1) < 0) {
947 reply = strdup("E00");
949 reply = strdup("OK");
953 case '2': // insert write watchpoint
954 case '3': // insert read watchpoint
955 case '4': // insert access watchpoint
958 if(packet[1] == '2') {
960 } else if(packet[1] == '3') {
964 if(add_data_watchpoint(sl, wf, addr, len) < 0) {
965 reply = strdup("E00");
967 reply = strdup("OK");
980 stm32_addr_t addr = strtoul(&packet[3], &endptr, 16);
981 //stm32_addr_t len = strtoul(&endptr[1], NULL, 16);
984 case '1': // remove breakpoint
985 update_code_breakpoint(sl, addr, 0);
986 reply = strdup("OK");
989 case '2' : // remove write watchpoint
990 case '3' : // remove read watchpoint
991 case '4' : // remove access watchpoint
992 if(delete_data_watchpoint(sl, addr) < 0) {
993 reply = strdup("E00");
995 reply = strdup("OK");
1007 * Enter extended mode which allows restarting.
1008 * We do support that always.
1011 reply = strdup("OK");
1017 /* Reset the core. */
1020 init_code_breakpoints(sl);
1021 init_data_watchpoints(sl);
1025 reply = strdup("OK");
1036 printf("send: %s\n", reply);
1039 int result = gdb_send_packet(client, reply);
1041 fprintf(stderr, "cannot send: %d\n", result);