1 /* Adopted from STM AN4065 stm32f0xx_flash.c:FLASH_ProgramWord */
4 ldr r4, STM32_FLASH_BASE
5 mov r5, #1 /* FLASH_CR_PG, FLASH_SR_BUSY */
8 ldr r3, [r4, #16] /* FLASH->CR */
10 str r3, [r4, #16] /* FLASH->CR |= FLASH_CR_PG */
11 ldrh r3, [r0] /* r3 = *sram */
12 strh r3, [r1] /* *flash = r3 */
14 ldr r3, [r4, #12] /* FLASH->SR */
15 tst r3, r5 /* FLASH_SR_BUSY */
18 tst r3, r6 /* PGERR */
21 add r0, r0, #2 /* sram += 2 */
22 add r1, r1, #2 /* flash += 2 */
23 sub r2, r2, #0x01 /* count-- */
27 ldr r3, [r4, #16] /* FLASH->CR */
29 str r3, [r4, #16] /* FLASH->CR &= ~FLASH_CR_PG */
32 STM32_FLASH_BASE: .word 0x40022000