2 ******************************************************************************
3 * @file stm32f4xx_iwdg.c
4 * @author MCD Application Team
7 * @brief This file provides firmware functions to manage the following
8 * functionalities of the Independent watchdog (IWDG) peripheral:
9 * - Prescaler and Counter configuration
15 * ===================================================================
17 * ===================================================================
19 * The IWDG can be started by either software or hardware (configurable
20 * through option byte).
22 * The IWDG is clocked by its own dedicated low-speed clock (LSI) and
23 * thus stays active even if the main clock fails.
24 * Once the IWDG is started, the LSI is forced ON and cannot be disabled
25 * (LSI cannot be disabled too), and the counter starts counting down from
26 * the reset value of 0xFFF. When it reaches the end of count value (0x000)
27 * a system reset is generated.
28 * The IWDG counter should be reloaded at regular intervals to prevent
31 * The IWDG is implemented in the VDD voltage domain that is still functional
32 * in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).
34 * IWDGRST flag in RCC_CSR register can be used to inform when a IWDG
37 * Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
38 * The IWDG timeout may vary due to LSI frequency dispersion. STM32F4xx
39 * devices provide the capability to measure the LSI frequency (LSI clock
40 * connected internally to TIM5 CH4 input capture). The measured value
41 * can be used to have an IWDG timeout with an acceptable accuracy.
42 * For more information, please refer to the STM32F4xx Reference manual
45 * ===================================================================
46 * How to use this driver
47 * ===================================================================
48 * 1. Enable write access to IWDG_PR and IWDG_RLR registers using
49 * IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable) function
51 * 2. Configure the IWDG prescaler using IWDG_SetPrescaler() function
53 * 3. Configure the IWDG counter value using IWDG_SetReload() function.
54 * This value will be loaded in the IWDG counter each time the counter
55 * is reloaded, then the IWDG will start counting down from this value.
57 * 4. Start the IWDG using IWDG_Enable() function, when the IWDG is used
58 * in software mode (no need to enable the LSI, it will be enabled
61 * 5. Then the application program must reload the IWDG counter at regular
62 * intervals during normal operation to prevent an MCU reset, using
63 * IWDG_ReloadCounter() function.
67 ******************************************************************************
70 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
71 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
72 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
73 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
74 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
75 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
77 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
78 ******************************************************************************
81 /* Includes ------------------------------------------------------------------*/
82 #include "stm32f4xx_iwdg.h"
84 /** @addtogroup STM32F4xx_StdPeriph_Driver
89 * @brief IWDG driver modules
93 /* Private typedef -----------------------------------------------------------*/
94 /* Private define ------------------------------------------------------------*/
96 /* KR register bit mask */
97 #define KR_KEY_RELOAD ((uint16_t)0xAAAA)
98 #define KR_KEY_ENABLE ((uint16_t)0xCCCC)
100 /* Private macro -------------------------------------------------------------*/
101 /* Private variables ---------------------------------------------------------*/
102 /* Private function prototypes -----------------------------------------------*/
103 /* Private functions ---------------------------------------------------------*/
105 /** @defgroup IWDG_Private_Functions
109 /** @defgroup IWDG_Group1 Prescaler and Counter configuration functions
110 * @brief Prescaler and Counter configuration functions
113 ===============================================================================
114 Prescaler and Counter configuration functions
115 ===============================================================================
122 * @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers.
123 * @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.
124 * This parameter can be one of the following values:
125 * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers
126 * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers
129 void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
131 /* Check the parameters */
132 assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));
133 IWDG->KR = IWDG_WriteAccess;
137 * @brief Sets IWDG Prescaler value.
138 * @param IWDG_Prescaler: specifies the IWDG Prescaler value.
139 * This parameter can be one of the following values:
140 * @arg IWDG_Prescaler_4: IWDG prescaler set to 4
141 * @arg IWDG_Prescaler_8: IWDG prescaler set to 8
142 * @arg IWDG_Prescaler_16: IWDG prescaler set to 16
143 * @arg IWDG_Prescaler_32: IWDG prescaler set to 32
144 * @arg IWDG_Prescaler_64: IWDG prescaler set to 64
145 * @arg IWDG_Prescaler_128: IWDG prescaler set to 128
146 * @arg IWDG_Prescaler_256: IWDG prescaler set to 256
149 void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
151 /* Check the parameters */
152 assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));
153 IWDG->PR = IWDG_Prescaler;
157 * @brief Sets IWDG Reload value.
158 * @param Reload: specifies the IWDG Reload value.
159 * This parameter must be a number between 0 and 0x0FFF.
162 void IWDG_SetReload(uint16_t Reload)
164 /* Check the parameters */
165 assert_param(IS_IWDG_RELOAD(Reload));
170 * @brief Reloads IWDG counter with value defined in the reload register
171 * (write access to IWDG_PR and IWDG_RLR registers disabled).
175 void IWDG_ReloadCounter(void)
177 IWDG->KR = KR_KEY_RELOAD;
184 /** @defgroup IWDG_Group2 IWDG activation function
185 * @brief IWDG activation function
188 ===============================================================================
189 IWDG activation function
190 ===============================================================================
197 * @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).
201 void IWDG_Enable(void)
203 IWDG->KR = KR_KEY_ENABLE;
210 /** @defgroup IWDG_Group3 Flag management function
211 * @brief Flag management function
214 ===============================================================================
215 Flag management function
216 ===============================================================================
223 * @brief Checks whether the specified IWDG flag is set or not.
224 * @param IWDG_FLAG: specifies the flag to check.
225 * This parameter can be one of the following values:
226 * @arg IWDG_FLAG_PVU: Prescaler Value Update on going
227 * @arg IWDG_FLAG_RVU: Reload Value Update on going
228 * @retval The new state of IWDG_FLAG (SET or RESET).
230 FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)
232 FlagStatus bitstatus = RESET;
233 /* Check the parameters */
234 assert_param(IS_IWDG_FLAG(IWDG_FLAG));
235 if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)
243 /* Return the flag status */
263 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/