2 ******************************************************************************
3 * @file stm32f4xx_spi.h
4 * @author MCD Application Team
7 * @brief This file contains all the functions prototypes for the SPI
9 ******************************************************************************
12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
19 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
20 ******************************************************************************
23 /* Define to prevent recursive inclusion -------------------------------------*/
24 #ifndef __STM32F4xx_SPI_H
25 #define __STM32F4xx_SPI_H
31 /* Includes ------------------------------------------------------------------*/
32 #include "stm32f4xx.h"
34 /** @addtogroup STM32F4xx_StdPeriph_Driver
42 /* Exported types ------------------------------------------------------------*/
45 * @brief SPI Init structure definition
50 uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
51 This parameter can be a value of @ref SPI_data_direction */
53 uint16_t SPI_Mode; /*!< Specifies the SPI operating mode.
54 This parameter can be a value of @ref SPI_mode */
56 uint16_t SPI_DataSize; /*!< Specifies the SPI data size.
57 This parameter can be a value of @ref SPI_data_size */
59 uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state.
60 This parameter can be a value of @ref SPI_Clock_Polarity */
62 uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.
63 This parameter can be a value of @ref SPI_Clock_Phase */
65 uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by
66 hardware (NSS pin) or by software using the SSI bit.
67 This parameter can be a value of @ref SPI_Slave_Select_management */
69 uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
70 used to configure the transmit and receive SCK clock.
71 This parameter can be a value of @ref SPI_BaudRate_Prescaler
72 @note The communication clock is derived from the master
73 clock. The slave clock does not need to be set. */
75 uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
76 This parameter can be a value of @ref SPI_MSB_LSB_transmission */
78 uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */
82 * @brief I2S Init structure definition
88 uint16_t I2S_Mode; /*!< Specifies the I2S operating mode.
89 This parameter can be a value of @ref I2S_Mode */
91 uint16_t I2S_Standard; /*!< Specifies the standard used for the I2S communication.
92 This parameter can be a value of @ref I2S_Standard */
94 uint16_t I2S_DataFormat; /*!< Specifies the data format for the I2S communication.
95 This parameter can be a value of @ref I2S_Data_Format */
97 uint16_t I2S_MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
98 This parameter can be a value of @ref I2S_MCLK_Output */
100 uint32_t I2S_AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
101 This parameter can be a value of @ref I2S_Audio_Frequency */
103 uint16_t I2S_CPOL; /*!< Specifies the idle state of the I2S clock.
104 This parameter can be a value of @ref I2S_Clock_Polarity */
107 /* Exported constants --------------------------------------------------------*/
109 /** @defgroup SPI_Exported_Constants
113 #define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
114 ((PERIPH) == SPI2) || \
117 #define IS_SPI_ALL_PERIPH_EXT(PERIPH) (((PERIPH) == SPI1) || \
118 ((PERIPH) == SPI2) || \
119 ((PERIPH) == SPI3) || \
120 ((PERIPH) == I2S2ext) || \
121 ((PERIPH) == I2S3ext))
123 #define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \
126 #define IS_SPI_23_PERIPH_EXT(PERIPH) (((PERIPH) == SPI2) || \
127 ((PERIPH) == SPI3) || \
128 ((PERIPH) == I2S2ext) || \
129 ((PERIPH) == I2S3ext))
131 #define IS_I2S_EXT_PERIPH(PERIPH) (((PERIPH) == I2S2ext) || \
132 ((PERIPH) == I2S2ext))
135 /** @defgroup SPI_data_direction
139 #define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
140 #define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
141 #define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
142 #define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
143 #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
144 ((MODE) == SPI_Direction_2Lines_RxOnly) || \
145 ((MODE) == SPI_Direction_1Line_Rx) || \
146 ((MODE) == SPI_Direction_1Line_Tx))
151 /** @defgroup SPI_mode
155 #define SPI_Mode_Master ((uint16_t)0x0104)
156 #define SPI_Mode_Slave ((uint16_t)0x0000)
157 #define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
158 ((MODE) == SPI_Mode_Slave))
163 /** @defgroup SPI_data_size
167 #define SPI_DataSize_16b ((uint16_t)0x0800)
168 #define SPI_DataSize_8b ((uint16_t)0x0000)
169 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
170 ((DATASIZE) == SPI_DataSize_8b))
175 /** @defgroup SPI_Clock_Polarity
179 #define SPI_CPOL_Low ((uint16_t)0x0000)
180 #define SPI_CPOL_High ((uint16_t)0x0002)
181 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
182 ((CPOL) == SPI_CPOL_High))
187 /** @defgroup SPI_Clock_Phase
191 #define SPI_CPHA_1Edge ((uint16_t)0x0000)
192 #define SPI_CPHA_2Edge ((uint16_t)0x0001)
193 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
194 ((CPHA) == SPI_CPHA_2Edge))
199 /** @defgroup SPI_Slave_Select_management
203 #define SPI_NSS_Soft ((uint16_t)0x0200)
204 #define SPI_NSS_Hard ((uint16_t)0x0000)
205 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
206 ((NSS) == SPI_NSS_Hard))
211 /** @defgroup SPI_BaudRate_Prescaler
215 #define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
216 #define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
217 #define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
218 #define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
219 #define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
220 #define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
221 #define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
222 #define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
223 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
224 ((PRESCALER) == SPI_BaudRatePrescaler_4) || \
225 ((PRESCALER) == SPI_BaudRatePrescaler_8) || \
226 ((PRESCALER) == SPI_BaudRatePrescaler_16) || \
227 ((PRESCALER) == SPI_BaudRatePrescaler_32) || \
228 ((PRESCALER) == SPI_BaudRatePrescaler_64) || \
229 ((PRESCALER) == SPI_BaudRatePrescaler_128) || \
230 ((PRESCALER) == SPI_BaudRatePrescaler_256))
235 /** @defgroup SPI_MSB_LSB_transmission
239 #define SPI_FirstBit_MSB ((uint16_t)0x0000)
240 #define SPI_FirstBit_LSB ((uint16_t)0x0080)
241 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
242 ((BIT) == SPI_FirstBit_LSB))
247 /** @defgroup SPI_I2S_Mode
251 #define I2S_Mode_SlaveTx ((uint16_t)0x0000)
252 #define I2S_Mode_SlaveRx ((uint16_t)0x0100)
253 #define I2S_Mode_MasterTx ((uint16_t)0x0200)
254 #define I2S_Mode_MasterRx ((uint16_t)0x0300)
255 #define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
256 ((MODE) == I2S_Mode_SlaveRx) || \
257 ((MODE) == I2S_Mode_MasterTx)|| \
258 ((MODE) == I2S_Mode_MasterRx))
264 /** @defgroup SPI_I2S_Standard
268 #define I2S_Standard_Phillips ((uint16_t)0x0000)
269 #define I2S_Standard_MSB ((uint16_t)0x0010)
270 #define I2S_Standard_LSB ((uint16_t)0x0020)
271 #define I2S_Standard_PCMShort ((uint16_t)0x0030)
272 #define I2S_Standard_PCMLong ((uint16_t)0x00B0)
273 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
274 ((STANDARD) == I2S_Standard_MSB) || \
275 ((STANDARD) == I2S_Standard_LSB) || \
276 ((STANDARD) == I2S_Standard_PCMShort) || \
277 ((STANDARD) == I2S_Standard_PCMLong))
282 /** @defgroup SPI_I2S_Data_Format
286 #define I2S_DataFormat_16b ((uint16_t)0x0000)
287 #define I2S_DataFormat_16bextended ((uint16_t)0x0001)
288 #define I2S_DataFormat_24b ((uint16_t)0x0003)
289 #define I2S_DataFormat_32b ((uint16_t)0x0005)
290 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
291 ((FORMAT) == I2S_DataFormat_16bextended) || \
292 ((FORMAT) == I2S_DataFormat_24b) || \
293 ((FORMAT) == I2S_DataFormat_32b))
298 /** @defgroup SPI_I2S_MCLK_Output
302 #define I2S_MCLKOutput_Enable ((uint16_t)0x0200)
303 #define I2S_MCLKOutput_Disable ((uint16_t)0x0000)
304 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
305 ((OUTPUT) == I2S_MCLKOutput_Disable))
310 /** @defgroup SPI_I2S_Audio_Frequency
314 #define I2S_AudioFreq_192k ((uint32_t)192000)
315 #define I2S_AudioFreq_96k ((uint32_t)96000)
316 #define I2S_AudioFreq_48k ((uint32_t)48000)
317 #define I2S_AudioFreq_44k ((uint32_t)44100)
318 #define I2S_AudioFreq_32k ((uint32_t)32000)
319 #define I2S_AudioFreq_22k ((uint32_t)22050)
320 #define I2S_AudioFreq_16k ((uint32_t)16000)
321 #define I2S_AudioFreq_11k ((uint32_t)11025)
322 #define I2S_AudioFreq_8k ((uint32_t)8000)
323 #define I2S_AudioFreq_Default ((uint32_t)2)
325 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && \
326 ((FREQ) <= I2S_AudioFreq_192k)) || \
327 ((FREQ) == I2S_AudioFreq_Default))
332 /** @defgroup SPI_I2S_Clock_Polarity
336 #define I2S_CPOL_Low ((uint16_t)0x0000)
337 #define I2S_CPOL_High ((uint16_t)0x0008)
338 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
339 ((CPOL) == I2S_CPOL_High))
344 /** @defgroup SPI_I2S_DMA_transfer_requests
348 #define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)
349 #define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)
350 #define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
355 /** @defgroup SPI_NSS_internal_software_management
359 #define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
360 #define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
361 #define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
362 ((INTERNAL) == SPI_NSSInternalSoft_Reset))
367 /** @defgroup SPI_CRC_Transmit_Receive
371 #define SPI_CRC_Tx ((uint8_t)0x00)
372 #define SPI_CRC_Rx ((uint8_t)0x01)
373 #define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
378 /** @defgroup SPI_direction_transmit_receive
382 #define SPI_Direction_Rx ((uint16_t)0xBFFF)
383 #define SPI_Direction_Tx ((uint16_t)0x4000)
384 #define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
385 ((DIRECTION) == SPI_Direction_Tx))
390 /** @defgroup SPI_I2S_interrupts_definition
394 #define SPI_I2S_IT_TXE ((uint8_t)0x71)
395 #define SPI_I2S_IT_RXNE ((uint8_t)0x60)
396 #define SPI_I2S_IT_ERR ((uint8_t)0x50)
397 #define I2S_IT_UDR ((uint8_t)0x53)
398 #define SPI_I2S_IT_TIFRFE ((uint8_t)0x58)
400 #define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
401 ((IT) == SPI_I2S_IT_RXNE) || \
402 ((IT) == SPI_I2S_IT_ERR))
404 #define SPI_I2S_IT_OVR ((uint8_t)0x56)
405 #define SPI_IT_MODF ((uint8_t)0x55)
406 #define SPI_IT_CRCERR ((uint8_t)0x54)
408 #define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
410 #define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE)|| ((IT) == SPI_I2S_IT_TXE) || \
411 ((IT) == SPI_IT_CRCERR) || ((IT) == SPI_IT_MODF) || \
412 ((IT) == SPI_I2S_IT_OVR) || ((IT) == I2S_IT_UDR) ||\
413 ((IT) == SPI_I2S_IT_TIFRFE))
418 /** @defgroup SPI_I2S_flags_definition
422 #define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
423 #define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
424 #define I2S_FLAG_CHSIDE ((uint16_t)0x0004)
425 #define I2S_FLAG_UDR ((uint16_t)0x0008)
426 #define SPI_FLAG_CRCERR ((uint16_t)0x0010)
427 #define SPI_FLAG_MODF ((uint16_t)0x0020)
428 #define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
429 #define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
430 #define SPI_I2S_FLAG_TIFRFE ((uint16_t)0x0100)
432 #define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
433 #define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
434 ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
435 ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
436 ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE)|| \
437 ((FLAG) == SPI_I2S_FLAG_TIFRFE))
442 /** @defgroup SPI_CRC_polynomial
446 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
451 /** @defgroup SPI_I2S_Legacy
455 #define SPI_DMAReq_Tx SPI_I2S_DMAReq_Tx
456 #define SPI_DMAReq_Rx SPI_I2S_DMAReq_Rx
457 #define SPI_IT_TXE SPI_I2S_IT_TXE
458 #define SPI_IT_RXNE SPI_I2S_IT_RXNE
459 #define SPI_IT_ERR SPI_I2S_IT_ERR
460 #define SPI_IT_OVR SPI_I2S_IT_OVR
461 #define SPI_FLAG_RXNE SPI_I2S_FLAG_RXNE
462 #define SPI_FLAG_TXE SPI_I2S_FLAG_TXE
463 #define SPI_FLAG_OVR SPI_I2S_FLAG_OVR
464 #define SPI_FLAG_BSY SPI_I2S_FLAG_BSY
465 #define SPI_DeInit SPI_I2S_DeInit
466 #define SPI_ITConfig SPI_I2S_ITConfig
467 #define SPI_DMACmd SPI_I2S_DMACmd
468 #define SPI_SendData SPI_I2S_SendData
469 #define SPI_ReceiveData SPI_I2S_ReceiveData
470 #define SPI_GetFlagStatus SPI_I2S_GetFlagStatus
471 #define SPI_ClearFlag SPI_I2S_ClearFlag
472 #define SPI_GetITStatus SPI_I2S_GetITStatus
473 #define SPI_ClearITPendingBit SPI_I2S_ClearITPendingBit
482 /* Exported macro ------------------------------------------------------------*/
483 /* Exported functions --------------------------------------------------------*/
485 /* Function used to set the SPI configuration to the default reset state *****/
486 void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
488 /* Initialization and Configuration functions *********************************/
489 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
490 void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
491 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
492 void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
493 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
494 void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
495 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
496 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
497 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
498 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
499 void SPI_TIModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
501 void I2S_FullDuplexConfig(SPI_TypeDef* I2Sxext, I2S_InitTypeDef* I2S_InitStruct);
503 /* Data transfers functions ***************************************************/
504 void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
505 uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
507 /* Hardware CRC Calculation functions *****************************************/
508 void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
509 void SPI_TransmitCRC(SPI_TypeDef* SPIx);
510 uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
511 uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
513 /* DMA transfers management functions *****************************************/
514 void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
516 /* Interrupts and flags management functions **********************************/
517 void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
518 FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
519 void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
520 ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
521 void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
527 #endif /*__STM32F4xx_SPI_H */
537 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/