2 ******************************************************************************
3 * @file startup_stm32f4xx.s
4 * @author MCD Application Team
7 * @brief STM32F4xx Devices vector table for Atollic TrueSTUDIO toolchain.
8 * This module performs:
10 * - Set the initial PC == Reset_Handler,
11 * - Set the vector table entries with the exceptions ISR address
12 * - Configure the clock system and the external SRAM mounted on
13 * STM3220F-EVAL board to be used as data memory (optional,
14 * to be enabled by user)
15 * - Branches to main in the C library (which eventually
17 * After Reset the Cortex-M4 processor is in Thread mode,
18 * priority is Privileged, and the Stack is set to Main.
19 ******************************************************************************
22 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
23 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
24 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
25 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
26 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
27 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
29 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
30 ******************************************************************************
39 .global Default_Handler
41 /* start address for the initialization values of the .data section.
42 defined in linker script */
44 /* start address for the .data section. defined in linker script */
46 /* end address for the .data section. defined in linker script */
48 /* start address for the .bss section. defined in linker script */
50 /* end address for the .bss section. defined in linker script */
52 /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
55 * @brief This is the code that gets called when the processor first
56 * starts execution following a reset event. Only the absolutely
57 * necessary set is performed, after which the application
58 * supplied main() routine is called.
63 .section .text.Reset_Handler
65 .type Reset_Handler, %function
68 /* Copy the data segment initializers from flash to SRAM */
86 /* Zero fill the bss segment. */
98 ldr r0, =0xE000ED88 // Enable CP10,CP11
100 orr r1,r1,#(0xF << 20)
103 /* Call the clock system intitialization function.*/
105 /* Call static constructors */
107 /* Call the application's entry point.*/
110 .size Reset_Handler, .-Reset_Handler
113 * @brief This is the code that gets called when the processor receives an
114 * unexpected interrupt. This simply enters an infinite loop, preserving
115 * the system state for examination by a debugger.
119 .section .text.Default_Handler,"ax",%progbits
123 .size Default_Handler, .-Default_Handler
124 /******************************************************************************
126 * The minimal vector table for a Cortex M3. Note that the proper constructs
127 * must be placed on this to ensure that it ends up at physical address
130 *******************************************************************************/
131 .section .isr_vector,"a",%progbits
132 .type g_pfnVectors, %object
133 .size g_pfnVectors, .-g_pfnVectors
140 .word HardFault_Handler
141 .word MemManage_Handler
142 .word BusFault_Handler
143 .word UsageFault_Handler
149 .word DebugMon_Handler
152 .word SysTick_Handler
154 /* External Interrupts */
155 .word WWDG_IRQHandler /* Window WatchDog */
156 .word PVD_IRQHandler /* PVD through EXTI Line detection */
157 .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
158 .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
159 .word FLASH_IRQHandler /* FLASH */
160 .word RCC_IRQHandler /* RCC */
161 .word EXTI0_IRQHandler /* EXTI Line0 */
162 .word EXTI1_IRQHandler /* EXTI Line1 */
163 .word EXTI2_IRQHandler /* EXTI Line2 */
164 .word EXTI3_IRQHandler /* EXTI Line3 */
165 .word EXTI4_IRQHandler /* EXTI Line4 */
166 .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
167 .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
168 .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
169 .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
170 .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
171 .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
172 .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
173 .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
174 .word CAN1_TX_IRQHandler /* CAN1 TX */
175 .word CAN1_RX0_IRQHandler /* CAN1 RX0 */
176 .word CAN1_RX1_IRQHandler /* CAN1 RX1 */
177 .word CAN1_SCE_IRQHandler /* CAN1 SCE */
178 .word EXTI9_5_IRQHandler /* External Line[9:5]s */
179 .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
180 .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
181 .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
182 .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
183 .word TIM2_IRQHandler /* TIM2 */
184 .word TIM3_IRQHandler /* TIM3 */
185 .word TIM4_IRQHandler /* TIM4 */
186 .word I2C1_EV_IRQHandler /* I2C1 Event */
187 .word I2C1_ER_IRQHandler /* I2C1 Error */
188 .word I2C2_EV_IRQHandler /* I2C2 Event */
189 .word I2C2_ER_IRQHandler /* I2C2 Error */
190 .word SPI1_IRQHandler /* SPI1 */
191 .word SPI2_IRQHandler /* SPI2 */
192 .word USART1_IRQHandler /* USART1 */
193 .word USART2_IRQHandler /* USART2 */
194 .word USART3_IRQHandler /* USART3 */
195 .word EXTI15_10_IRQHandler /* External Line[15:10]s */
196 .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
197 .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
198 .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
199 .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
200 .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
201 .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
202 .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
203 .word FSMC_IRQHandler /* FSMC */
204 .word SDIO_IRQHandler /* SDIO */
205 .word TIM5_IRQHandler /* TIM5 */
206 .word SPI3_IRQHandler /* SPI3 */
207 .word UART4_IRQHandler /* UART4 */
208 .word UART5_IRQHandler /* UART5 */
209 .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
210 .word TIM7_IRQHandler /* TIM7 */
211 .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
212 .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
213 .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
214 .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
215 .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
216 .word ETH_IRQHandler /* Ethernet */
217 .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
218 .word CAN2_TX_IRQHandler /* CAN2 TX */
219 .word CAN2_RX0_IRQHandler /* CAN2 RX0 */
220 .word CAN2_RX1_IRQHandler /* CAN2 RX1 */
221 .word CAN2_SCE_IRQHandler /* CAN2 SCE */
222 .word OTG_FS_IRQHandler /* USB OTG FS */
223 .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
224 .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
225 .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
226 .word USART6_IRQHandler /* USART6 */
227 .word I2C3_EV_IRQHandler /* I2C3 event */
228 .word I2C3_ER_IRQHandler /* I2C3 error */
229 .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
230 .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
231 .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
232 .word OTG_HS_IRQHandler /* USB OTG HS */
233 .word DCMI_IRQHandler /* DCMI */
234 .word CRYP_IRQHandler /* CRYP crypto */
235 .word HASH_RNG_IRQHandler /* Hash and Rng */
236 .word FPU_IRQHandler /* FPU */
239 /*******************************************************************************
241 * Provide weak aliases for each Exception handler to the Default_Handler.
242 * As they are weak aliases, any function with the same name will override
245 *******************************************************************************/
247 .thumb_set NMI_Handler,Default_Handler
249 .weak HardFault_Handler
250 .thumb_set HardFault_Handler,Default_Handler
252 .weak MemManage_Handler
253 .thumb_set MemManage_Handler,Default_Handler
255 .weak BusFault_Handler
256 .thumb_set BusFault_Handler,Default_Handler
258 .weak UsageFault_Handler
259 .thumb_set UsageFault_Handler,Default_Handler
262 .thumb_set SVC_Handler,Default_Handler
264 .weak DebugMon_Handler
265 .thumb_set DebugMon_Handler,Default_Handler
268 .thumb_set PendSV_Handler,Default_Handler
270 .weak SysTick_Handler
271 .thumb_set SysTick_Handler,Default_Handler
273 .weak WWDG_IRQHandler
274 .thumb_set WWDG_IRQHandler,Default_Handler
277 .thumb_set PVD_IRQHandler,Default_Handler
279 .weak TAMP_STAMP_IRQHandler
280 .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
282 .weak RTC_WKUP_IRQHandler
283 .thumb_set RTC_WKUP_IRQHandler,Default_Handler
285 .weak FLASH_IRQHandler
286 .thumb_set FLASH_IRQHandler,Default_Handler
289 .thumb_set RCC_IRQHandler,Default_Handler
291 .weak EXTI0_IRQHandler
292 .thumb_set EXTI0_IRQHandler,Default_Handler
294 .weak EXTI1_IRQHandler
295 .thumb_set EXTI1_IRQHandler,Default_Handler
297 .weak EXTI2_IRQHandler
298 .thumb_set EXTI2_IRQHandler,Default_Handler
300 .weak EXTI3_IRQHandler
301 .thumb_set EXTI3_IRQHandler,Default_Handler
303 .weak EXTI4_IRQHandler
304 .thumb_set EXTI4_IRQHandler,Default_Handler
306 .weak DMA1_Stream0_IRQHandler
307 .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
309 .weak DMA1_Stream1_IRQHandler
310 .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
312 .weak DMA1_Stream2_IRQHandler
313 .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
315 .weak DMA1_Stream3_IRQHandler
316 .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
318 .weak DMA1_Stream4_IRQHandler
319 .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
321 .weak DMA1_Stream5_IRQHandler
322 .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
324 .weak DMA1_Stream6_IRQHandler
325 .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
328 .thumb_set ADC_IRQHandler,Default_Handler
330 .weak CAN1_TX_IRQHandler
331 .thumb_set CAN1_TX_IRQHandler,Default_Handler
333 .weak CAN1_RX0_IRQHandler
334 .thumb_set CAN1_RX0_IRQHandler,Default_Handler
336 .weak CAN1_RX1_IRQHandler
337 .thumb_set CAN1_RX1_IRQHandler,Default_Handler
339 .weak CAN1_SCE_IRQHandler
340 .thumb_set CAN1_SCE_IRQHandler,Default_Handler
342 .weak EXTI9_5_IRQHandler
343 .thumb_set EXTI9_5_IRQHandler,Default_Handler
345 .weak TIM1_BRK_TIM9_IRQHandler
346 .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
348 .weak TIM1_UP_TIM10_IRQHandler
349 .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
351 .weak TIM1_TRG_COM_TIM11_IRQHandler
352 .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
354 .weak TIM1_CC_IRQHandler
355 .thumb_set TIM1_CC_IRQHandler,Default_Handler
357 .weak TIM2_IRQHandler
358 .thumb_set TIM2_IRQHandler,Default_Handler
360 .weak TIM3_IRQHandler
361 .thumb_set TIM3_IRQHandler,Default_Handler
363 .weak TIM4_IRQHandler
364 .thumb_set TIM4_IRQHandler,Default_Handler
366 .weak I2C1_EV_IRQHandler
367 .thumb_set I2C1_EV_IRQHandler,Default_Handler
369 .weak I2C1_ER_IRQHandler
370 .thumb_set I2C1_ER_IRQHandler,Default_Handler
372 .weak I2C2_EV_IRQHandler
373 .thumb_set I2C2_EV_IRQHandler,Default_Handler
375 .weak I2C2_ER_IRQHandler
376 .thumb_set I2C2_ER_IRQHandler,Default_Handler
378 .weak SPI1_IRQHandler
379 .thumb_set SPI1_IRQHandler,Default_Handler
381 .weak SPI2_IRQHandler
382 .thumb_set SPI2_IRQHandler,Default_Handler
384 .weak USART1_IRQHandler
385 .thumb_set USART1_IRQHandler,Default_Handler
387 .weak USART2_IRQHandler
388 .thumb_set USART2_IRQHandler,Default_Handler
390 .weak USART3_IRQHandler
391 .thumb_set USART3_IRQHandler,Default_Handler
393 .weak EXTI15_10_IRQHandler
394 .thumb_set EXTI15_10_IRQHandler,Default_Handler
396 .weak RTC_Alarm_IRQHandler
397 .thumb_set RTC_Alarm_IRQHandler,Default_Handler
399 .weak OTG_FS_WKUP_IRQHandler
400 .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
402 .weak TIM8_BRK_TIM12_IRQHandler
403 .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
405 .weak TIM8_UP_TIM13_IRQHandler
406 .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
408 .weak TIM8_TRG_COM_TIM14_IRQHandler
409 .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
411 .weak TIM8_CC_IRQHandler
412 .thumb_set TIM8_CC_IRQHandler,Default_Handler
414 .weak DMA1_Stream7_IRQHandler
415 .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
417 .weak FSMC_IRQHandler
418 .thumb_set FSMC_IRQHandler,Default_Handler
420 .weak SDIO_IRQHandler
421 .thumb_set SDIO_IRQHandler,Default_Handler
423 .weak TIM5_IRQHandler
424 .thumb_set TIM5_IRQHandler,Default_Handler
426 .weak SPI3_IRQHandler
427 .thumb_set SPI3_IRQHandler,Default_Handler
429 .weak UART4_IRQHandler
430 .thumb_set UART4_IRQHandler,Default_Handler
432 .weak UART5_IRQHandler
433 .thumb_set UART5_IRQHandler,Default_Handler
435 .weak TIM6_DAC_IRQHandler
436 .thumb_set TIM6_DAC_IRQHandler,Default_Handler
438 .weak TIM7_IRQHandler
439 .thumb_set TIM7_IRQHandler,Default_Handler
441 .weak DMA2_Stream0_IRQHandler
442 .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
444 .weak DMA2_Stream1_IRQHandler
445 .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
447 .weak DMA2_Stream2_IRQHandler
448 .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
450 .weak DMA2_Stream3_IRQHandler
451 .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
453 .weak DMA2_Stream4_IRQHandler
454 .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
457 .thumb_set ETH_IRQHandler,Default_Handler
459 .weak ETH_WKUP_IRQHandler
460 .thumb_set ETH_WKUP_IRQHandler,Default_Handler
462 .weak CAN2_TX_IRQHandler
463 .thumb_set CAN2_TX_IRQHandler,Default_Handler
465 .weak CAN2_RX0_IRQHandler
466 .thumb_set CAN2_RX0_IRQHandler,Default_Handler
468 .weak CAN2_RX1_IRQHandler
469 .thumb_set CAN2_RX1_IRQHandler,Default_Handler
471 .weak CAN2_SCE_IRQHandler
472 .thumb_set CAN2_SCE_IRQHandler,Default_Handler
474 .weak OTG_FS_IRQHandler
475 .thumb_set OTG_FS_IRQHandler,Default_Handler
477 .weak DMA2_Stream5_IRQHandler
478 .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
480 .weak DMA2_Stream6_IRQHandler
481 .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
483 .weak DMA2_Stream7_IRQHandler
484 .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
486 .weak USART6_IRQHandler
487 .thumb_set USART6_IRQHandler,Default_Handler
489 .weak I2C3_EV_IRQHandler
490 .thumb_set I2C3_EV_IRQHandler,Default_Handler
492 .weak I2C3_ER_IRQHandler
493 .thumb_set I2C3_ER_IRQHandler,Default_Handler
495 .weak OTG_HS_EP1_OUT_IRQHandler
496 .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
498 .weak OTG_HS_EP1_IN_IRQHandler
499 .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
501 .weak OTG_HS_WKUP_IRQHandler
502 .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
504 .weak OTG_HS_IRQHandler
505 .thumb_set OTG_HS_IRQHandler,Default_Handler
507 .weak DCMI_IRQHandler
508 .thumb_set DCMI_IRQHandler,Default_Handler
510 .weak CRYP_IRQHandler
511 .thumb_set CRYP_IRQHandler,Default_Handler
513 .weak HASH_RNG_IRQHandler
514 .thumb_set HASH_RNG_IRQHandler,Default_Handler
517 .thumb_set FPU_IRQHandler,Default_Handler
519 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/