1 /**************************************************************************//**
3 * @brief CMSIS Cortex-M Core Function Access Header File
8 * Copyright (C) 2009-2011 ARM Limited. All rights reserved.
11 * ARM Limited (ARM) is supplying this software for use with Cortex-M
12 * processor based microcontrollers. This file can be freely distributed
13 * within development tools that are supporting such ARM based processors.
16 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
17 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
19 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
20 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 ******************************************************************************/
24 #ifndef __CORE_CMFUNC_H
25 #define __CORE_CMFUNC_H
28 /* ########################### Core Function Access ########################### */
29 /** \ingroup CMSIS_Core_FunctionInterface
30 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
34 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
35 /* ARM armcc specific functions */
37 #if (__ARMCC_VERSION < 400677)
38 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
41 /* intrinsic void __enable_irq(); */
42 /* intrinsic void __disable_irq(); */
44 /** \brief Get Control Register
46 This function returns the content of the Control Register.
48 \return Control Register value
50 static __INLINE uint32_t __get_CONTROL(void)
52 register uint32_t __regControl __ASM("control");
57 /** \brief Set Control Register
59 This function writes the given value to the Control Register.
61 \param [in] control Control Register value to set
63 static __INLINE void __set_CONTROL(uint32_t control)
65 register uint32_t __regControl __ASM("control");
66 __regControl = control;
70 /** \brief Get ISPR Register
72 This function returns the content of the ISPR Register.
74 \return ISPR Register value
76 static __INLINE uint32_t __get_IPSR(void)
78 register uint32_t __regIPSR __ASM("ipsr");
83 /** \brief Get APSR Register
85 This function returns the content of the APSR Register.
87 \return APSR Register value
89 static __INLINE uint32_t __get_APSR(void)
91 register uint32_t __regAPSR __ASM("apsr");
96 /** \brief Get xPSR Register
98 This function returns the content of the xPSR Register.
100 \return xPSR Register value
102 static __INLINE uint32_t __get_xPSR(void)
104 register uint32_t __regXPSR __ASM("xpsr");
109 /** \brief Get Process Stack Pointer
111 This function returns the current value of the Process Stack Pointer (PSP).
113 \return PSP Register value
115 static __INLINE uint32_t __get_PSP(void)
117 register uint32_t __regProcessStackPointer __ASM("psp");
118 return(__regProcessStackPointer);
122 /** \brief Set Process Stack Pointer
124 This function assigns the given value to the Process Stack Pointer (PSP).
126 \param [in] topOfProcStack Process Stack Pointer value to set
128 static __INLINE void __set_PSP(uint32_t topOfProcStack)
130 register uint32_t __regProcessStackPointer __ASM("psp");
131 __regProcessStackPointer = topOfProcStack;
135 /** \brief Get Main Stack Pointer
137 This function returns the current value of the Main Stack Pointer (MSP).
139 \return MSP Register value
141 static __INLINE uint32_t __get_MSP(void)
143 register uint32_t __regMainStackPointer __ASM("msp");
144 return(__regMainStackPointer);
148 /** \brief Set Main Stack Pointer
150 This function assigns the given value to the Main Stack Pointer (MSP).
152 \param [in] topOfMainStack Main Stack Pointer value to set
154 static __INLINE void __set_MSP(uint32_t topOfMainStack)
156 register uint32_t __regMainStackPointer __ASM("msp");
157 __regMainStackPointer = topOfMainStack;
161 /** \brief Get Priority Mask
163 This function returns the current state of the priority mask bit from the Priority Mask Register.
165 \return Priority Mask value
167 static __INLINE uint32_t __get_PRIMASK(void)
169 register uint32_t __regPriMask __ASM("primask");
170 return(__regPriMask);
174 /** \brief Set Priority Mask
176 This function assigns the given value to the Priority Mask Register.
178 \param [in] priMask Priority Mask
180 static __INLINE void __set_PRIMASK(uint32_t priMask)
182 register uint32_t __regPriMask __ASM("primask");
183 __regPriMask = (priMask);
187 #if (__CORTEX_M >= 0x03)
189 /** \brief Enable FIQ
191 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
192 Can only be executed in Privileged modes.
194 #define __enable_fault_irq __enable_fiq
197 /** \brief Disable FIQ
199 This function disables FIQ interrupts by setting the F-bit in the CPSR.
200 Can only be executed in Privileged modes.
202 #define __disable_fault_irq __disable_fiq
205 /** \brief Get Base Priority
207 This function returns the current value of the Base Priority register.
209 \return Base Priority register value
211 static __INLINE uint32_t __get_BASEPRI(void)
213 register uint32_t __regBasePri __ASM("basepri");
214 return(__regBasePri);
218 /** \brief Set Base Priority
220 This function assigns the given value to the Base Priority register.
222 \param [in] basePri Base Priority value to set
224 static __INLINE void __set_BASEPRI(uint32_t basePri)
226 register uint32_t __regBasePri __ASM("basepri");
227 __regBasePri = (basePri & 0xff);
231 /** \brief Get Fault Mask
233 This function returns the current value of the Fault Mask register.
235 \return Fault Mask register value
237 static __INLINE uint32_t __get_FAULTMASK(void)
239 register uint32_t __regFaultMask __ASM("faultmask");
240 return(__regFaultMask);
244 /** \brief Set Fault Mask
246 This function assigns the given value to the Fault Mask register.
248 \param [in] faultMask Fault Mask value to set
250 static __INLINE void __set_FAULTMASK(uint32_t faultMask)
252 register uint32_t __regFaultMask __ASM("faultmask");
253 __regFaultMask = (faultMask & (uint32_t)1);
256 #endif /* (__CORTEX_M >= 0x03) */
259 #if (__CORTEX_M == 0x04)
263 This function returns the current value of the Floating Point Status/Control register.
265 \return Floating Point Status/Control register value
267 static __INLINE uint32_t __get_FPSCR(void)
269 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
270 register uint32_t __regfpscr __ASM("fpscr");
280 This function assigns the given value to the Floating Point Status/Control register.
282 \param [in] fpscr Floating Point Status/Control value to set
284 static __INLINE void __set_FPSCR(uint32_t fpscr)
286 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
287 register uint32_t __regfpscr __ASM("fpscr");
288 __regfpscr = (fpscr);
292 #endif /* (__CORTEX_M == 0x04) */
295 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
296 /* IAR iccarm specific functions */
298 #include <cmsis_iar.h>
300 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
301 /* GNU gcc specific functions */
303 /** \brief Enable IRQ Interrupts
305 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
306 Can only be executed in Privileged modes.
308 __attribute__( ( always_inline ) ) static __INLINE void __enable_irq(void)
310 __ASM volatile ("cpsie i");
314 /** \brief Disable IRQ Interrupts
316 This function disables IRQ interrupts by setting the I-bit in the CPSR.
317 Can only be executed in Privileged modes.
319 __attribute__( ( always_inline ) ) static __INLINE void __disable_irq(void)
321 __ASM volatile ("cpsid i");
325 /** \brief Get Control Register
327 This function returns the content of the Control Register.
329 \return Control Register value
331 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_CONTROL(void)
335 __ASM volatile ("MRS %0, control" : "=r" (result) );
340 /** \brief Set Control Register
342 This function writes the given value to the Control Register.
344 \param [in] control Control Register value to set
346 __attribute__( ( always_inline ) ) static __INLINE void __set_CONTROL(uint32_t control)
348 __ASM volatile ("MSR control, %0" : : "r" (control) );
352 /** \brief Get ISPR Register
354 This function returns the content of the ISPR Register.
356 \return ISPR Register value
358 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_IPSR(void)
362 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
367 /** \brief Get APSR Register
369 This function returns the content of the APSR Register.
371 \return APSR Register value
373 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_APSR(void)
377 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
382 /** \brief Get xPSR Register
384 This function returns the content of the xPSR Register.
386 \return xPSR Register value
388 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_xPSR(void)
392 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
397 /** \brief Get Process Stack Pointer
399 This function returns the current value of the Process Stack Pointer (PSP).
401 \return PSP Register value
403 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_PSP(void)
405 register uint32_t result;
407 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
412 /** \brief Set Process Stack Pointer
414 This function assigns the given value to the Process Stack Pointer (PSP).
416 \param [in] topOfProcStack Process Stack Pointer value to set
418 __attribute__( ( always_inline ) ) static __INLINE void __set_PSP(uint32_t topOfProcStack)
420 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) );
424 /** \brief Get Main Stack Pointer
426 This function returns the current value of the Main Stack Pointer (MSP).
428 \return MSP Register value
430 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_MSP(void)
432 register uint32_t result;
434 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
439 /** \brief Set Main Stack Pointer
441 This function assigns the given value to the Main Stack Pointer (MSP).
443 \param [in] topOfMainStack Main Stack Pointer value to set
445 __attribute__( ( always_inline ) ) static __INLINE void __set_MSP(uint32_t topOfMainStack)
447 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) );
451 /** \brief Get Priority Mask
453 This function returns the current state of the priority mask bit from the Priority Mask Register.
455 \return Priority Mask value
457 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_PRIMASK(void)
461 __ASM volatile ("MRS %0, primask" : "=r" (result) );
466 /** \brief Set Priority Mask
468 This function assigns the given value to the Priority Mask Register.
470 \param [in] priMask Priority Mask
472 __attribute__( ( always_inline ) ) static __INLINE void __set_PRIMASK(uint32_t priMask)
474 __ASM volatile ("MSR primask, %0" : : "r" (priMask) );
478 #if (__CORTEX_M >= 0x03)
480 /** \brief Enable FIQ
482 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
483 Can only be executed in Privileged modes.
485 __attribute__( ( always_inline ) ) static __INLINE void __enable_fault_irq(void)
487 __ASM volatile ("cpsie f");
491 /** \brief Disable FIQ
493 This function disables FIQ interrupts by setting the F-bit in the CPSR.
494 Can only be executed in Privileged modes.
496 __attribute__( ( always_inline ) ) static __INLINE void __disable_fault_irq(void)
498 __ASM volatile ("cpsid f");
502 /** \brief Get Base Priority
504 This function returns the current value of the Base Priority register.
506 \return Base Priority register value
508 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_BASEPRI(void)
512 __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
517 /** \brief Set Base Priority
519 This function assigns the given value to the Base Priority register.
521 \param [in] basePri Base Priority value to set
523 __attribute__( ( always_inline ) ) static __INLINE void __set_BASEPRI(uint32_t value)
525 __ASM volatile ("MSR basepri, %0" : : "r" (value) );
529 /** \brief Get Fault Mask
531 This function returns the current value of the Fault Mask register.
533 \return Fault Mask register value
535 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_FAULTMASK(void)
539 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
544 /** \brief Set Fault Mask
546 This function assigns the given value to the Fault Mask register.
548 \param [in] faultMask Fault Mask value to set
550 __attribute__( ( always_inline ) ) static __INLINE void __set_FAULTMASK(uint32_t faultMask)
552 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
555 #endif /* (__CORTEX_M >= 0x03) */
558 #if (__CORTEX_M == 0x04)
562 This function returns the current value of the Floating Point Status/Control register.
564 \return Floating Point Status/Control register value
566 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_FPSCR(void)
568 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
571 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
581 This function assigns the given value to the Floating Point Status/Control register.
583 \param [in] fpscr Floating Point Status/Control value to set
585 __attribute__( ( always_inline ) ) static __INLINE void __set_FPSCR(uint32_t fpscr)
587 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
588 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) );
592 #endif /* (__CORTEX_M == 0x04) */
595 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
596 /* TASKING carm specific functions */
599 * The CMSIS functions have been implemented as intrinsics in the compiler.
600 * Please use "carm -?i" to get an up to date list of all instrinsics,
601 * Including the CMSIS ones.
606 /*@} end of CMSIS_Core_RegAccFunctions */
609 #endif /* __CORE_CMFUNC_H */