2 ******************************************************************************
4 * @author MCD Application Team
7 * @brief Peripheral Device Interface Layer
8 ******************************************************************************
11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
19 ******************************************************************************
22 /* Includes ------------------------------------------------------------------*/
27 /** @addtogroup USB_OTG_DRIVER
32 * @brief This file is the interface between EFSL ans Host mass-storage class
37 /** @defgroup USB_DCD_Private_Defines
45 /** @defgroup USB_DCD_Private_TypesDefinitions
54 /** @defgroup USB_DCD_Private_Macros
62 /** @defgroup USB_DCD_Private_Variables
70 /** @defgroup USB_DCD_Private_FunctionPrototypes
79 /** @defgroup USB_DCD_Private_Functions
85 void DCD_Init(USB_OTG_CORE_HANDLE *pdev ,
86 USB_OTG_CORE_ID_TypeDef coreID)
91 USB_OTG_SelectCore (pdev , coreID);
93 pdev->dev.device_status = USB_OTG_DEFAULT;
94 pdev->dev.device_address = 0;
96 /* Init ep structure */
97 for (i = 0; i < pdev->cfg.dev_endpoints ; i++)
99 ep = &pdev->dev.in_ep[i];
100 /* Init ep structure */
104 /* Control until ep is actvated */
105 ep->type = EP_TYPE_CTRL;
106 ep->maxpacket = USB_OTG_MAX_EP0_SIZE;
111 for (i = 0; i < pdev->cfg.dev_endpoints; i++)
113 ep = &pdev->dev.out_ep[i];
114 /* Init ep structure */
118 /* Control until ep is activated */
119 ep->type = EP_TYPE_CTRL;
120 ep->maxpacket = USB_OTG_MAX_EP0_SIZE;
125 USB_OTG_DisableGlobalInt(pdev);
127 /*Init the Core (common init.) */
128 USB_OTG_CoreInit(pdev);
131 /* Force Device Mode*/
132 USB_OTG_SetCurrentMode(pdev, DEVICE_MODE);
135 USB_OTG_CoreInitDev(pdev);
138 /* Enable USB Global interrupt */
139 USB_OTG_EnableGlobalInt(pdev);
144 * @brief Configure an EP
145 * @param pdev : Device instance
146 * @param epdesc : Endpoint Descriptor
149 uint32_t DCD_EP_Open(USB_OTG_CORE_HANDLE *pdev ,
156 if ((ep_addr & 0x80) == 0x80)
158 ep = &pdev->dev.in_ep[ep_addr & 0x7F];
162 ep = &pdev->dev.out_ep[ep_addr & 0x7F];
164 ep->num = ep_addr & 0x7F;
166 ep->is_in = (0x80 & ep_addr) != 0;
167 ep->maxpacket = ep_mps;
171 /* Assign a Tx FIFO */
172 ep->tx_fifo_num = ep->num;
174 /* Set initial data PID. */
175 if (ep_type == USB_OTG_EP_BULK )
177 ep->data_pid_start = 0;
179 USB_OTG_EPActivate(pdev , ep );
183 * @brief called when an EP is disabled
184 * @param pdev: device instance
185 * @param ep_addr: endpoint address
188 uint32_t DCD_EP_Close(USB_OTG_CORE_HANDLE *pdev , uint8_t ep_addr)
192 if ((ep_addr&0x80) == 0x80)
194 ep = &pdev->dev.in_ep[ep_addr & 0x7F];
198 ep = &pdev->dev.out_ep[ep_addr & 0x7F];
200 ep->num = ep_addr & 0x7F;
201 ep->is_in = (0x80 & ep_addr) != 0;
202 USB_OTG_EPDeactivate(pdev , ep );
208 * @brief DCD_EP_PrepareRx
209 * @param pdev: device instance
210 * @param ep_addr: endpoint address
211 * @param pbuf: pointer to Rx buffer
212 * @param buf_len: data length
215 uint32_t DCD_EP_PrepareRx( USB_OTG_CORE_HANDLE *pdev,
222 ep = &pdev->dev.out_ep[ep_addr & 0x7F];
224 /*setup and start the Xfer */
225 ep->xfer_buff = pbuf;
226 ep->xfer_len = buf_len;
229 ep->num = ep_addr & 0x7F;
231 if (pdev->cfg.dma_enable == 1)
233 ep->dma_addr = (uint32_t)pbuf;
238 USB_OTG_EP0StartXfer(pdev , ep);
242 USB_OTG_EPStartXfer(pdev, ep );
248 * @brief Transmit data over USB
249 * @param pdev: device instance
250 * @param ep_addr: endpoint address
251 * @param pbuf: pointer to Tx buffer
252 * @param buf_len: data length
255 uint32_t DCD_EP_Tx ( USB_OTG_CORE_HANDLE *pdev,
262 ep = &pdev->dev.in_ep[ep_addr & 0x7F];
264 /* Setup and start the Transfer */
266 ep->num = ep_addr & 0x7F;
267 ep->xfer_buff = pbuf;
268 ep->dma_addr = (uint32_t)pbuf;
270 ep->xfer_len = buf_len;
274 USB_OTG_EP0StartXfer(pdev , ep);
278 USB_OTG_EPStartXfer(pdev, ep );
285 * @brief Stall an endpoint.
286 * @param pdev: device instance
287 * @param epnum: endpoint address
290 uint32_t DCD_EP_Stall (USB_OTG_CORE_HANDLE *pdev, uint8_t epnum)
293 if ((0x80 & epnum) == 0x80)
295 ep = &pdev->dev.in_ep[epnum & 0x7F];
299 ep = &pdev->dev.out_ep[epnum];
303 ep->num = epnum & 0x7F;
304 ep->is_in = ((epnum & 0x80) == 0x80);
306 USB_OTG_EPSetStall(pdev , ep);
312 * @brief Clear stall condition on endpoints.
313 * @param pdev: device instance
314 * @param epnum: endpoint address
317 uint32_t DCD_EP_ClrStall (USB_OTG_CORE_HANDLE *pdev, uint8_t epnum)
320 if ((0x80 & epnum) == 0x80)
322 ep = &pdev->dev.in_ep[epnum & 0x7F];
326 ep = &pdev->dev.out_ep[epnum];
330 ep->num = epnum & 0x7F;
331 ep->is_in = ((epnum & 0x80) == 0x80);
333 USB_OTG_EPClearStall(pdev , ep);
339 * @brief This Function flushes the FIFOs.
340 * @param pdev: device instance
341 * @param epnum: endpoint address
344 uint32_t DCD_EP_Flush (USB_OTG_CORE_HANDLE *pdev , uint8_t epnum)
347 if ((epnum & 0x80) == 0x80)
349 USB_OTG_FlushTxFifo(pdev, epnum & 0x7F);
353 USB_OTG_FlushRxFifo(pdev);
361 * @brief This Function set USB device address
362 * @param pdev: device instance
363 * @param address: new device address
366 void DCD_EP_SetAddress (USB_OTG_CORE_HANDLE *pdev, uint8_t address)
368 USB_OTG_DCFG_TypeDef dcfg;
370 dcfg.b.devaddr = address;
371 USB_OTG_MODIFY_REG32( &pdev->regs.DREGS->DCFG, 0, dcfg.d32);
375 * @brief Connect device (enable internal pull-up)
376 * @param pdev: device instance
379 void DCD_DevConnect (USB_OTG_CORE_HANDLE *pdev)
382 USB_OTG_DCTL_TypeDef dctl;
383 dctl.d32 = USB_OTG_READ_REG32(&pdev->regs.DREGS->DCTL);
385 dctl.b.sftdiscon = 0;
386 USB_OTG_WRITE_REG32(&pdev->regs.DREGS->DCTL, dctl.d32);
387 USB_OTG_BSP_mDelay(3);
393 * @brief Disconnect device (disable internal pull-up)
394 * @param pdev: device instance
397 void DCD_DevDisconnect (USB_OTG_CORE_HANDLE *pdev)
400 USB_OTG_DCTL_TypeDef dctl;
401 dctl.d32 = USB_OTG_READ_REG32(&pdev->regs.DREGS->DCTL);
402 /* Disconnect device for 3ms */
403 dctl.b.sftdiscon = 1;
404 USB_OTG_WRITE_REG32(&pdev->regs.DREGS->DCTL, dctl.d32);
405 USB_OTG_BSP_mDelay(3);
411 * @brief returns the EP Status
412 * @param pdev : Selected device
413 * epnum : endpoint address
414 * @retval : EP status
417 uint32_t DCD_GetEPStatus(USB_OTG_CORE_HANDLE *pdev ,uint8_t epnum)
422 if ((0x80 & epnum) == 0x80)
424 ep = &pdev->dev.in_ep[epnum & 0x7F];
428 ep = &pdev->dev.out_ep[epnum];
431 Status = USB_OTG_GetEPStatus(pdev ,ep);
433 /* Return the current status */
438 * @brief Set the EP Status
439 * @param pdev : Selected device
440 * Status : new Status
444 void DCD_SetEPStatus (USB_OTG_CORE_HANDLE *pdev , uint8_t epnum , uint32_t Status)
448 if ((0x80 & epnum) == 0x80)
450 ep = &pdev->dev.in_ep[epnum & 0x7F];
454 ep = &pdev->dev.out_ep[epnum];
457 USB_OTG_SetEPStatus(pdev ,ep , Status);
472 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/