2 ******************************************************************************
4 * @author MCD Application Team
7 * @brief hardware registers
8 ******************************************************************************
11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
19 ******************************************************************************
22 /* Define to prevent recursive inclusion -------------------------------------*/
23 #ifndef __USB_OTG_REGS_H__
24 #define __USB_OTG_REGS_H__
26 /* Includes ------------------------------------------------------------------*/
30 /** @addtogroup USB_OTG_DRIVER
34 /** @defgroup USB_REGS
35 * @brief This file is the
40 /** @defgroup USB_REGS_Exported_Defines
44 #define USB_OTG_HS_BASE_ADDR 0x40040000
45 #define USB_OTG_FS_BASE_ADDR 0x50000000
47 #define USB_OTG_CORE_GLOBAL_REGS_OFFSET 0x000
48 #define USB_OTG_DEV_GLOBAL_REG_OFFSET 0x800
49 #define USB_OTG_DEV_IN_EP_REG_OFFSET 0x900
50 #define USB_OTG_EP_REG_OFFSET 0x20
51 #define USB_OTG_DEV_OUT_EP_REG_OFFSET 0xB00
52 #define USB_OTG_HOST_GLOBAL_REG_OFFSET 0x400
53 #define USB_OTG_HOST_PORT_REGS_OFFSET 0x440
54 #define USB_OTG_HOST_CHAN_REGS_OFFSET 0x500
55 #define USB_OTG_CHAN_REGS_OFFSET 0x20
56 #define USB_OTG_PCGCCTL_OFFSET 0xE00
57 #define USB_OTG_DATA_FIFO_OFFSET 0x1000
58 #define USB_OTG_DATA_FIFO_SIZE 0x1000
61 #define USB_OTG_MAX_TX_FIFOS 15
63 #define USB_OTG_HS_MAX_PACKET_SIZE 512
64 #define USB_OTG_FS_MAX_PACKET_SIZE 64
65 #define USB_OTG_MAX_EP0_SIZE 64
70 /** @defgroup USB_REGS_Exported_Types
74 /** @defgroup __USB_OTG_Core_register
77 typedef struct _USB_OTG_GREGS //000h
79 __IO uint32_t GOTGCTL; /* USB_OTG Control and Status Register 000h*/
80 __IO uint32_t GOTGINT; /* USB_OTG Interrupt Register 004h*/
81 __IO uint32_t GAHBCFG; /* Core AHB Configuration Register 008h*/
82 __IO uint32_t GUSBCFG; /* Core USB Configuration Register 00Ch*/
83 __IO uint32_t GRSTCTL; /* Core Reset Register 010h*/
84 __IO uint32_t GINTSTS; /* Core Interrupt Register 014h*/
85 __IO uint32_t GINTMSK; /* Core Interrupt Mask Register 018h*/
86 __IO uint32_t GRXSTSR; /* Receive Sts Q Read Register 01Ch*/
87 __IO uint32_t GRXSTSP; /* Receive Sts Q Read & POP Register 020h*/
88 __IO uint32_t GRXFSIZ; /* Receive FIFO Size Register 024h*/
89 __IO uint32_t DIEPTXF0_HNPTXFSIZ; /* EP0 / Non Periodic Tx FIFO Size Register 028h*/
90 __IO uint32_t HNPTXSTS; /* Non Periodic Tx FIFO/Queue Sts reg 02Ch*/
91 __IO uint32_t GI2CCTL; /* I2C Access Register 030h*/
92 uint32_t Reserved34; /* PHY Vendor Control Register 034h*/
93 __IO uint32_t GCCFG; /* General Purpose IO Register 038h*/
94 __IO uint32_t CID; /* User ID Register 03Ch*/
95 uint32_t Reserved40[48]; /* Reserved 040h-0FFh*/
96 __IO uint32_t HPTXFSIZ; /* Host Periodic Tx FIFO Size Reg 100h*/
97 __IO uint32_t DIEPTXF[USB_OTG_MAX_TX_FIFOS];/* dev Periodic Transmit FIFO */
105 /** @defgroup __device_Registers
108 typedef struct _USB_OTG_DREGS // 800h
110 __IO uint32_t DCFG; /* dev Configuration Register 800h*/
111 __IO uint32_t DCTL; /* dev Control Register 804h*/
112 __IO uint32_t DSTS; /* dev Status Register (RO) 808h*/
113 uint32_t Reserved0C; /* Reserved 80Ch*/
114 __IO uint32_t DIEPMSK; /* dev IN Endpoint Mask 810h*/
115 __IO uint32_t DOEPMSK; /* dev OUT Endpoint Mask 814h*/
116 __IO uint32_t DAINT; /* dev All Endpoints Itr Reg 818h*/
117 __IO uint32_t DAINTMSK; /* dev All Endpoints Itr Mask 81Ch*/
118 uint32_t Reserved20; /* Reserved 820h*/
119 uint32_t Reserved9; /* Reserved 824h*/
120 __IO uint32_t DVBUSDIS; /* dev VBUS discharge Register 828h*/
121 __IO uint32_t DVBUSPULSE; /* dev VBUS Pulse Register 82Ch*/
122 __IO uint32_t DTHRCTL; /* dev thr 830h*/
123 __IO uint32_t DIEPEMPMSK; /* dev empty msk 834h*/
124 __IO uint32_t DEACHINT; /* dedicated EP interrupt 838h*/
125 __IO uint32_t DEACHMSK; /* dedicated EP msk 83Ch*/
126 uint32_t Reserved40; /* dedicated EP mask 840h*/
127 __IO uint32_t DINEP1MSK; /* dedicated EP mask 844h*/
128 uint32_t Reserved44[15]; /* Reserved 844-87Ch*/
129 __IO uint32_t DOUTEP1MSK; /* dedicated EP msk 884h*/
137 /** @defgroup __IN_Endpoint-Specific_Register
140 typedef struct _USB_OTG_INEPREGS
142 __IO uint32_t DIEPCTL; /* dev IN Endpoint Control Reg 900h + (ep_num * 20h) + 00h*/
143 uint32_t Reserved04; /* Reserved 900h + (ep_num * 20h) + 04h*/
144 __IO uint32_t DIEPINT; /* dev IN Endpoint Itr Reg 900h + (ep_num * 20h) + 08h*/
145 uint32_t Reserved0C; /* Reserved 900h + (ep_num * 20h) + 0Ch*/
146 __IO uint32_t DIEPTSIZ; /* IN Endpoint Txfer Size 900h + (ep_num * 20h) + 10h*/
147 __IO uint32_t DIEPDMA; /* IN Endpoint DMA Address Reg 900h + (ep_num * 20h) + 14h*/
148 __IO uint32_t DTXFSTS;/*IN Endpoint Tx FIFO Status Reg 900h + (ep_num * 20h) + 18h*/
149 uint32_t Reserved18; /* Reserved 900h+(ep_num*20h)+1Ch-900h+ (ep_num * 20h) + 1Ch*/
157 /** @defgroup __OUT_Endpoint-Specific_Registers
160 typedef struct _USB_OTG_OUTEPREGS
162 __IO uint32_t DOEPCTL; /* dev OUT Endpoint Control Reg B00h + (ep_num * 20h) + 00h*/
163 __IO uint32_t DOUTEPFRM; /* dev OUT Endpoint Frame number B00h + (ep_num * 20h) + 04h*/
164 __IO uint32_t DOEPINT; /* dev OUT Endpoint Itr Reg B00h + (ep_num * 20h) + 08h*/
165 uint32_t Reserved0C; /* Reserved B00h + (ep_num * 20h) + 0Ch*/
166 __IO uint32_t DOEPTSIZ; /* dev OUT Endpoint Txfer Size B00h + (ep_num * 20h) + 10h*/
167 __IO uint32_t DOEPDMA; /* dev OUT Endpoint DMA Address B00h + (ep_num * 20h) + 14h*/
168 uint32_t Reserved18[2]; /* Reserved B00h + (ep_num * 20h) + 18h - B00h + (ep_num * 20h) + 1Ch*/
176 /** @defgroup __Host_Mode_Register_Structures
179 typedef struct _USB_OTG_HREGS
181 __IO uint32_t HCFG; /* Host Configuration Register 400h*/
182 __IO uint32_t HFIR; /* Host Frame Interval Register 404h*/
183 __IO uint32_t HFNUM; /* Host Frame Nbr/Frame Remaining 408h*/
184 uint32_t Reserved40C; /* Reserved 40Ch*/
185 __IO uint32_t HPTXSTS; /* Host Periodic Tx FIFO/ Queue Status 410h*/
186 __IO uint32_t HAINT; /* Host All Channels Interrupt Register 414h*/
187 __IO uint32_t HAINTMSK; /* Host All Channels Interrupt Mask 418h*/
195 /** @defgroup __Host_Channel_Specific_Registers
198 typedef struct _USB_OTG_HC_REGS
200 __IO uint32_t HCCHAR;
201 __IO uint32_t HCSPLT;
203 __IO uint32_t HCGINTMSK;
204 __IO uint32_t HCTSIZ;
206 uint32_t Reserved[2];
214 /** @defgroup __otg_Core_registers
217 typedef struct USB_OTG_core_regs //000h
219 USB_OTG_GREGS *GREGS;
220 USB_OTG_DREGS *DREGS;
221 USB_OTG_HREGS *HREGS;
222 USB_OTG_INEPREGS *INEP_REGS[USB_OTG_MAX_TX_FIFOS];
223 USB_OTG_OUTEPREGS *OUTEP_REGS[USB_OTG_MAX_TX_FIFOS];
224 USB_OTG_HC_REGS *HC_REGS[USB_OTG_MAX_TX_FIFOS];
225 __IO uint32_t *HPRT0;
226 __IO uint32_t *DFIFO[USB_OTG_MAX_TX_FIFOS];
227 __IO uint32_t *PCGCCTL;
229 USB_OTG_CORE_REGS , *PUSB_OTG_CORE_REGS;
230 typedef union _USB_OTG_OTGCTL_TypeDef
239 uint32_t Reserved2_7 :
245 uint32_t hstsethnpen :
249 uint32_t Reserved12_15 :
253 uint32_t Reserved17 :
261 uint32_t Reserved21_31 :
265 } USB_OTG_OTGCTL_TypeDef ;
266 typedef union _USB_OTG_GOTGINT_TypeDef
271 uint32_t Reserved0_1 :
275 uint32_t Reserved3_7 :
277 uint32_t sesreqsucstschng :
279 uint32_t hstnegsucstschng :
281 uint32_t reserver10_16 :
285 uint32_t adevtoutchng :
289 uint32_t Reserved31_20 :
293 } USB_OTG_GOTGINT_TypeDef ;
294 typedef union _USB_OTG_GAHBCFG_TypeDef
299 uint32_t glblintrmsk :
307 uint32_t nptxfemplvl_txfemplvl :
309 uint32_t ptxfemplvl :
311 uint32_t Reserved9_31 :
315 } USB_OTG_GAHBCFG_TypeDef ;
316 typedef union _USB_OTG_GUSBCFG_TypeDef
325 uint32_t ulpi_utmi_sel :
339 uint32_t nptxfrwnden :
341 uint32_t phylpwrclksel :
343 uint32_t otgutmifssel :
347 uint32_t ulpi_auto_res :
349 uint32_t ulpi_clk_sus_m :
351 uint32_t ulpi_ext_vbus_drv :
353 uint32_t ulpi_int_vbus_indicator :
355 uint32_t term_sel_dl_pulse :
359 uint32_t force_host :
363 uint32_t corrupt_tx :
367 } USB_OTG_GUSBCFG_TypeDef ;
368 typedef union _USB_OTG_GRSTCTL_TypeDef
379 uint32_t intknqflsh :
387 uint32_t Reserved11_29 :
395 } USB_OTG_GRSTCTL_TypeDef ;
396 typedef union _USB_OTG_GINTMSK_TypeDef
403 uint32_t modemismatch :
411 uint32_t nptxfempty :
415 uint32_t goutnakeff :
421 uint32_t erlysuspend :
423 uint32_t usbsuspend :
429 uint32_t isooutdrop :
433 uint32_t Reserved16 :
435 uint32_t epmismatch :
441 uint32_t incomplisoin :
443 uint32_t incomplisoout :
445 uint32_t Reserved22_23 :
453 uint32_t Reserved27 :
455 uint32_t conidstschng :
457 uint32_t disconnect :
459 uint32_t sessreqintr :
465 } USB_OTG_GINTMSK_TypeDef ;
466 typedef union _USB_OTG_GINTSTS_TypeDef
473 uint32_t modemismatch :
481 uint32_t nptxfempty :
485 uint32_t goutnakeff :
491 uint32_t erlysuspend :
493 uint32_t usbsuspend :
499 uint32_t isooutdrop :
505 uint32_t epmismatch :
511 uint32_t incomplisoin :
513 uint32_t incomplisoout :
515 uint32_t Reserved22_23 :
523 uint32_t Reserved27 :
525 uint32_t conidstschng :
527 uint32_t disconnect :
529 uint32_t sessreqintr :
535 } USB_OTG_GINTSTS_TypeDef ;
536 typedef union _USB_OTG_DRXSTS_TypeDef
555 } USB_OTG_DRXSTS_TypeDef ;
556 typedef union _USB_OTG_GRXSTS_TypeDef
573 } USB_OTG_GRXFSTS_TypeDef ;
574 typedef union _USB_OTG_FSIZ_TypeDef
585 } USB_OTG_FSIZ_TypeDef ;
586 typedef union _USB_OTG_HNPTXSTS_TypeDef
591 uint32_t nptxfspcavail :
593 uint32_t nptxqspcavail :
595 uint32_t nptxqtop_terminate :
597 uint32_t nptxqtop_timer :
607 } USB_OTG_HNPTXSTS_TypeDef ;
608 typedef union _USB_OTG_DTXFSTSn_TypeDef
613 uint32_t txfspcavail :
619 } USB_OTG_DTXFSTSn_TypeDef ;
620 typedef union _USB_OTG_GI2CCTL_TypeDef
635 uint32_t i2csuspctl :
637 uint32_t i2cdevaddr :
649 } USB_OTG_GI2CCTL_TypeDef ;
650 typedef union _USB_OTG_GCCFG_TypeDef
655 uint32_t Reserved_in :
661 uint32_t vbussensingA :
663 uint32_t vbussensingB :
667 uint32_t disablevbussensing :
669 uint32_t Reserved_out :
673 } USB_OTG_GCCFG_TypeDef ;
675 typedef union _USB_OTG_DCFG_TypeDef
682 uint32_t nzstsouthshk :
690 uint32_t Reserved13_17 :
696 } USB_OTG_DCFG_TypeDef ;
697 typedef union _USB_OTG_DCTL_TypeDef
702 uint32_t rmtwkupsig :
706 uint32_t gnpinnaksts :
708 uint32_t goutnaksts :
724 } USB_OTG_DCTL_TypeDef ;
725 typedef union _USB_OTG_DSTS_TypeDef
736 uint32_t Reserved4_7:
740 uint32_t Reserved22_31 :
744 } USB_OTG_DSTS_TypeDef ;
745 typedef union _USB_OTG_DIEPINTn_TypeDef
752 uint32_t epdisabled :
758 uint32_t intktxfemp :
760 uint32_t intknepmis :
762 uint32_t inepnakeff :
766 uint32_t txfifoundrn :
768 uint32_t Reserved08_31 :
772 } USB_OTG_DIEPINTn_TypeDef ;
773 typedef union _USB_OTG_DIEPINTn_TypeDef USB_OTG_DIEPMSK_TypeDef ;
774 typedef union _USB_OTG_DOEPINTn_TypeDef
781 uint32_t epdisabled :
787 uint32_t Reserved04_31 :
791 } USB_OTG_DOEPINTn_TypeDef ;
792 typedef union _USB_OTG_DOEPINTn_TypeDef USB_OTG_DOEPMSK_TypeDef ;
794 typedef union _USB_OTG_DAINT_TypeDef
805 } USB_OTG_DAINT_TypeDef ;
807 typedef union _USB_OTG_DTHRCTL_TypeDef
812 uint32_t non_iso_thr_en :
814 uint32_t iso_thr_en :
816 uint32_t tx_thr_len :
818 uint32_t Reserved11_15 :
822 uint32_t rx_thr_len :
824 uint32_t Reserved26_31 :
828 } USB_OTG_DTHRCTL_TypeDef ;
829 typedef union _USB_OTG_DEPCTL_TypeDef
866 } USB_OTG_DEPCTL_TypeDef ;
867 typedef union _USB_OTG_DEPXFRSIZ_TypeDef
882 } USB_OTG_DEPXFRSIZ_TypeDef ;
883 typedef union _USB_OTG_DEP0XFRSIZ_TypeDef
890 uint32_t Reserved7_18 :
894 uint32_t Reserved20_28 :
901 } USB_OTG_DEP0XFRSIZ_TypeDef ;
902 typedef union _USB_OTG_HCFG_TypeDef
907 uint32_t fslspclksel :
913 } USB_OTG_HCFG_TypeDef ;
914 typedef union _USB_OTG_HFRMINTRVL_TypeDef
925 } USB_OTG_HFRMINTRVL_TypeDef ;
927 typedef union _USB_OTG_HFNUM_TypeDef
938 } USB_OTG_HFNUM_TypeDef ;
939 typedef union _USB_OTG_HPTXSTS_TypeDef
944 uint32_t ptxfspcavail :
946 uint32_t ptxqspcavail :
948 uint32_t ptxqtop_terminate :
950 uint32_t ptxqtop_timer :
956 uint32_t ptxqtop_odd :
960 } USB_OTG_HPTXSTS_TypeDef ;
961 typedef union _USB_OTG_HPRT0_TypeDef
966 uint32_t prtconnsts :
968 uint32_t prtconndet :
974 uint32_t prtovrcurract :
976 uint32_t prtovrcurrchng :
994 uint32_t Reserved19_31 :
998 } USB_OTG_HPRT0_TypeDef ;
999 typedef union _USB_OTG_HAINT_TypeDef
1010 } USB_OTG_HAINT_TypeDef ;
1011 typedef union _USB_OTG_HAINTMSK_TypeDef
1022 } USB_OTG_HAINTMSK_TypeDef ;
1023 typedef union _USB_OTG_HCCHAR_TypeDef
1052 } USB_OTG_HCCHAR_TypeDef ;
1053 typedef union _USB_OTG_HCSPLT_TypeDef
1072 } USB_OTG_HCSPLT_TypeDef ;
1073 typedef union _USB_OTG_HCINTn_TypeDef
1078 uint32_t xfercompl :
1098 uint32_t datatglerr :
1104 } USB_OTG_HCINTn_TypeDef ;
1105 typedef union _USB_OTG_HCTSIZn_TypeDef
1120 } USB_OTG_HCTSIZn_TypeDef ;
1121 typedef union _USB_OTG_HCGINTMSK_TypeDef
1126 uint32_t xfercompl :
1146 uint32_t datatglerr :
1152 } USB_OTG_HCGINTMSK_TypeDef ;
1153 typedef union _USB_OTG_PCGCCTL_TypeDef
1166 } USB_OTG_PCGCCTL_TypeDef ;
1173 /** @defgroup USB_REGS_Exported_Macros
1180 /** @defgroup USB_REGS_Exported_Variables
1187 /** @defgroup USB_REGS_Exported_FunctionsPrototype
1195 #endif //__USB_OTG_REGS_H__
1205 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/