2 ******************************************************************************
3 * @file stm32f4xx_wwdg.c
4 * @author MCD Application Team
7 * @brief This file provides firmware functions to manage the following
8 * functionalities of the Window watchdog (WWDG) peripheral:
9 * - Prescaler, Refresh window and Counter configuration
11 * - Interrupts and flags management
15 * ===================================================================
17 * ===================================================================
19 * Once enabled the WWDG generates a system reset on expiry of a programmed
20 * time period, unless the program refreshes the counter (downcounter)
21 * before to reach 0x3F value (i.e. a reset is generated when the counter
22 * value rolls over from 0x40 to 0x3F).
23 * An MCU reset is also generated if the counter value is refreshed
24 * before the counter has reached the refresh window value. This
25 * implies that the counter must be refreshed in a limited window.
27 * Once enabled the WWDG cannot be disabled except by a system reset.
29 * WWDGRST flag in RCC_CSR register can be used to inform when a WWDG
32 * The WWDG counter input clock is derived from the APB clock divided
33 * by a programmable prescaler.
35 * WWDG counter clock = PCLK1 / Prescaler
36 * WWDG timeout = (WWDG counter clock) * (counter value)
38 * Min-max timeout value @30 MHz(PCLK1): ~136.5 us / ~69.9 ms
40 * ===================================================================
41 * How to use this driver
42 * ===================================================================
43 * 1. Enable WWDG clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_WWDG, ENABLE) function
45 * 2. Configure the WWDG prescaler using WWDG_SetPrescaler() function
47 * 3. Configure the WWDG refresh window using WWDG_SetWindowValue() function
49 * 4. Set the WWDG counter value and start it using WWDG_Enable() function.
50 * When the WWDG is enabled the counter value should be configured to
51 * a value greater than 0x40 to prevent generating an immediate reset.
53 * 5. Optionally you can enable the Early wakeup interrupt which is
54 * generated when the counter reach 0x40.
55 * Once enabled this interrupt cannot be disabled except by a system reset.
57 * 6. Then the application program must refresh the WWDG counter at regular
58 * intervals during normal operation to prevent an MCU reset, using
59 * WWDG_SetCounter() function. This operation must occur only when
60 * the counter value is lower than the refresh window value,
61 * programmed using WWDG_SetWindowValue().
65 ******************************************************************************
68 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
69 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
70 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
71 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
72 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
73 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
75 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
76 ******************************************************************************
79 /* Includes ------------------------------------------------------------------*/
80 #include "stm32f4xx_wwdg.h"
81 #include "stm32f4xx_rcc.h"
83 /** @addtogroup STM32F4xx_StdPeriph_Driver
88 * @brief WWDG driver modules
92 /* Private typedef -----------------------------------------------------------*/
93 /* Private define ------------------------------------------------------------*/
95 /* ----------- WWDG registers bit address in the alias region ----------- */
96 #define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE)
97 /* Alias word address of EWI bit */
98 #define CFR_OFFSET (WWDG_OFFSET + 0x04)
99 #define EWI_BitNumber 0x09
100 #define CFR_EWI_BB (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4))
102 /* --------------------- WWDG registers bit mask ------------------------ */
103 /* CFR register bit mask */
104 #define CFR_WDGTB_MASK ((uint32_t)0xFFFFFE7F)
105 #define CFR_W_MASK ((uint32_t)0xFFFFFF80)
106 #define BIT_MASK ((uint8_t)0x7F)
108 /* Private macro -------------------------------------------------------------*/
109 /* Private variables ---------------------------------------------------------*/
110 /* Private function prototypes -----------------------------------------------*/
111 /* Private functions ---------------------------------------------------------*/
113 /** @defgroup WWDG_Private_Functions
117 /** @defgroup WWDG_Group1 Prescaler, Refresh window and Counter configuration functions
118 * @brief Prescaler, Refresh window and Counter configuration functions
121 ===============================================================================
122 Prescaler, Refresh window and Counter configuration functions
123 ===============================================================================
130 * @brief Deinitializes the WWDG peripheral registers to their default reset values.
134 void WWDG_DeInit(void)
136 RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE);
137 RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE);
141 * @brief Sets the WWDG Prescaler.
142 * @param WWDG_Prescaler: specifies the WWDG Prescaler.
143 * This parameter can be one of the following values:
144 * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
145 * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
146 * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
147 * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
150 void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)
153 /* Check the parameters */
154 assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler));
155 /* Clear WDGTB[1:0] bits */
156 tmpreg = WWDG->CFR & CFR_WDGTB_MASK;
157 /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */
158 tmpreg |= WWDG_Prescaler;
159 /* Store the new value */
164 * @brief Sets the WWDG window value.
165 * @param WindowValue: specifies the window value to be compared to the downcounter.
166 * This parameter value must be lower than 0x80.
169 void WWDG_SetWindowValue(uint8_t WindowValue)
171 __IO uint32_t tmpreg = 0;
173 /* Check the parameters */
174 assert_param(IS_WWDG_WINDOW_VALUE(WindowValue));
175 /* Clear W[6:0] bits */
177 tmpreg = WWDG->CFR & CFR_W_MASK;
179 /* Set W[6:0] bits according to WindowValue value */
180 tmpreg |= WindowValue & (uint32_t) BIT_MASK;
182 /* Store the new value */
187 * @brief Enables the WWDG Early Wakeup interrupt(EWI).
188 * @note Once enabled this interrupt cannot be disabled except by a system reset.
192 void WWDG_EnableIT(void)
194 *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE;
198 * @brief Sets the WWDG counter value.
199 * @param Counter: specifies the watchdog counter value.
200 * This parameter must be a number between 0x40 and 0x7F (to prevent generating
201 * an immediate reset)
204 void WWDG_SetCounter(uint8_t Counter)
206 /* Check the parameters */
207 assert_param(IS_WWDG_COUNTER(Counter));
208 /* Write to T[6:0] bits to configure the counter value, no need to do
209 a read-modify-write; writing a 0 to WDGA bit does nothing */
210 WWDG->CR = Counter & BIT_MASK;
216 /** @defgroup WWDG_Group2 WWDG activation functions
217 * @brief WWDG activation functions
220 ===============================================================================
221 WWDG activation function
222 ===============================================================================
229 * @brief Enables WWDG and load the counter value.
230 * @param Counter: specifies the watchdog counter value.
231 * This parameter must be a number between 0x40 and 0x7F (to prevent generating
232 * an immediate reset)
235 void WWDG_Enable(uint8_t Counter)
237 /* Check the parameters */
238 assert_param(IS_WWDG_COUNTER(Counter));
239 WWDG->CR = WWDG_CR_WDGA | Counter;
245 /** @defgroup WWDG_Group3 Interrupts and flags management functions
246 * @brief Interrupts and flags management functions
249 ===============================================================================
250 Interrupts and flags management functions
251 ===============================================================================
258 * @brief Checks whether the Early Wakeup interrupt flag is set or not.
260 * @retval The new state of the Early Wakeup interrupt flag (SET or RESET)
262 FlagStatus WWDG_GetFlagStatus(void)
264 FlagStatus bitstatus = RESET;
266 if ((WWDG->SR) != (uint32_t)RESET)
278 * @brief Clears Early Wakeup interrupt flag.
282 void WWDG_ClearFlag(void)
284 WWDG->SR = (uint32_t)RESET;
303 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/