2 ******************************************************************************
3 * @file stm32f4xx_syscfg.c
4 * @author MCD Application Team
7 * @brief This file provides firmware functions to manage the SYSCFG peripheral.
11 * ===================================================================
12 * How to use this driver
13 * ===================================================================
15 * This driver provides functions for:
17 * 1. Remapping the memory accessible in the code area using SYSCFG_MemoryRemapConfig()
19 * 2. Manage the EXTI lines connection to the GPIOs using SYSCFG_EXTILineConfig()
21 * 3. Select the ETHERNET media interface (RMII/RII) using SYSCFG_ETH_MediaInterfaceConfig()
23 * @note SYSCFG APB clock must be enabled to get write access to SYSCFG registers,
24 * using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
28 ******************************************************************************
31 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
32 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
33 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
34 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
35 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
36 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
38 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
39 ******************************************************************************
42 /* Includes ------------------------------------------------------------------*/
43 #include "stm32f4xx_syscfg.h"
44 #include "stm32f4xx_rcc.h"
46 /** @addtogroup STM32F4xx_StdPeriph_Driver
51 * @brief SYSCFG driver modules
55 /* Private typedef -----------------------------------------------------------*/
56 /* Private define ------------------------------------------------------------*/
57 /* ------------ RCC registers bit address in the alias region ----------- */
58 #define SYSCFG_OFFSET (SYSCFG_BASE - PERIPH_BASE)
59 /* --- PMC Register ---*/
60 /* Alias word address of MII_RMII_SEL bit */
61 #define PMC_OFFSET (SYSCFG_OFFSET + 0x04)
62 #define MII_RMII_SEL_BitNumber ((uint8_t)0x17)
63 #define PMC_MII_RMII_SEL_BB (PERIPH_BB_BASE + (PMC_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4))
65 /* --- CMPCR Register ---*/
66 /* Alias word address of CMP_PD bit */
67 #define CMPCR_OFFSET (SYSCFG_OFFSET + 0x20)
68 #define CMP_PD_BitNumber ((uint8_t)0x00)
69 #define CMPCR_CMP_PD_BB (PERIPH_BB_BASE + (CMPCR_OFFSET * 32) + (CMP_PD_BitNumber * 4))
71 /* Private macro -------------------------------------------------------------*/
72 /* Private variables ---------------------------------------------------------*/
73 /* Private function prototypes -----------------------------------------------*/
74 /* Private functions ---------------------------------------------------------*/
76 /** @defgroup SYSCFG_Private_Functions
81 * @brief Deinitializes the Alternate Functions (remap and EXTI configuration)
82 * registers to their default reset values.
86 void SYSCFG_DeInit(void)
88 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, ENABLE);
89 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, DISABLE);
93 * @brief Changes the mapping of the specified pin.
94 * @param SYSCFG_Memory: selects the memory remapping.
95 * This parameter can be one of the following values:
96 * @arg SYSCFG_MemoryRemap_Flash: Main Flash memory mapped at 0x00000000
97 * @arg SYSCFG_MemoryRemap_SystemFlash: System Flash memory mapped at 0x00000000
98 * @arg SYSCFG_MemoryRemap_FSMC: FSMC (Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
99 * @arg SYSCFG_MemoryRemap_SRAM: Embedded SRAM (112kB) mapped at 0x00000000
101 * @note In remap mode, the FSMC addressing is fixed to the remap address area only
102 * (Bank1 NOR/PSRAM 1 and NOR/PSRAM 2) and FSMC control registers are not
103 * accessible. The FSMC remap function must be disabled to allows addressing
104 * other memory devices through the FSMC and/or to access FSMC control
109 void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap)
111 /* Check the parameters */
112 assert_param(IS_SYSCFG_MEMORY_REMAP_CONFING(SYSCFG_MemoryRemap));
114 SYSCFG->MEMRMP = SYSCFG_MemoryRemap;
118 * @brief Selects the GPIO pin used as EXTI Line.
119 * @param EXTI_PortSourceGPIOx : selects the GPIO port to be used as source for
120 * EXTI lines where x can be (A..I).
121 * @param EXTI_PinSourcex: specifies the EXTI line to be configured.
122 * This parameter can be EXTI_PinSourcex where x can be (0..15, except
123 * for EXTI_PortSourceGPIOI x can be (0..11).
126 void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex)
130 /* Check the parameters */
131 assert_param(IS_EXTI_PORT_SOURCE(EXTI_PortSourceGPIOx));
132 assert_param(IS_EXTI_PIN_SOURCE(EXTI_PinSourcex));
134 tmp = ((uint32_t)0x0F) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03));
135 SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] &= ~tmp;
136 SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] |= (((uint32_t)EXTI_PortSourceGPIOx) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03)));
140 * @brief Selects the ETHERNET media interface
141 * @param SYSCFG_ETH_MediaInterface: specifies the Media Interface mode.
142 * This parameter can be one of the following values:
143 * @arg SYSCFG_ETH_MediaInterface_MII: MII mode selected
144 * @arg SYSCFG_ETH_MediaInterface_RMII: RMII mode selected
147 void SYSCFG_ETH_MediaInterfaceConfig(uint32_t SYSCFG_ETH_MediaInterface)
149 assert_param(IS_SYSCFG_ETH_MEDIA_INTERFACE(SYSCFG_ETH_MediaInterface));
150 /* Configure MII_RMII selection bit */
151 *(__IO uint32_t *) PMC_MII_RMII_SEL_BB = SYSCFG_ETH_MediaInterface;
155 * @brief Enables or disables the I/O Compensation Cell.
156 * @note The I/O compensation cell can be used only when the device supply
157 * voltage ranges from 2.4 to 3.6 V.
158 * @param NewState: new state of the I/O Compensation Cell.
159 * This parameter can be one of the following values:
160 * @arg ENABLE: I/O compensation cell enabled
161 * @arg DISABLE: I/O compensation cell power-down mode
164 void SYSCFG_CompensationCellCmd(FunctionalState NewState)
166 /* Check the parameters */
167 assert_param(IS_FUNCTIONAL_STATE(NewState));
169 *(__IO uint32_t *) CMPCR_CMP_PD_BB = (uint32_t)NewState;
173 * @brief Checks whether the I/O Compensation Cell ready flag is set or not.
175 * @retval The new state of the I/O Compensation Cell ready flag (SET or RESET)
177 FlagStatus SYSCFG_GetCompensationCellStatus(void)
179 FlagStatus bitstatus = RESET;
181 if ((SYSCFG->CMPCR & SYSCFG_CMPCR_READY ) != (uint32_t)RESET)
204 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/