2 ******************************************************************************
3 * @file startup_stm32f4xx.s
4 * @author MCD Application Team
6 * @date 30-September-2011
7 * @brief STM32F4xx Devices vector table for RIDE7 toolchain.
8 * This module performs:
10 * - Set the initial PC == Reset_Handler,
11 * - Set the vector table entries with the exceptions ISR address
12 * - Configure the clock system and the external SRAM mounted on
13 * STM324xG-EVAL board to be used as data memory (optional,
14 * to be enabled by user)
15 * - Branches to main in the C library (which eventually
17 * After Reset the Cortex-M4 processor is in Thread mode,
18 * priority is Privileged, and the Stack is set to Main.
19 ******************************************************************************
22 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
23 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
24 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
25 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
26 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
27 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
29 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
30 ******************************************************************************
39 .global Default_Handler
41 /* start address for the initialization values of the .data section.
42 defined in linker script */
44 /* start address for the .data section. defined in linker script */
46 /* end address for the .data section. defined in linker script */
48 /* start address for the .bss section. defined in linker script */
50 /* end address for the .bss section. defined in linker script */
52 /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
55 * @brief This is the code that gets called when the processor first
56 * starts execution following a reset event. Only the absolutely
57 * necessary set is performed, after which the application
58 * supplied main() routine is called.
63 .section .text.Reset_Handler
65 .type Reset_Handler, %function
68 /* Copy the data segment initializers from flash to SRAM */
86 /* Zero fill the bss segment. */
96 /* Call the clock system intitialization function.*/
98 /* Call the application's entry point.*/
101 .size Reset_Handler, .-Reset_Handler
104 * @brief This is the code that gets called when the processor receives an
105 * unexpected interrupt. This simply enters an infinite loop, preserving
106 * the system state for examination by a debugger.
110 .section .text.Default_Handler,"ax",%progbits
114 .size Default_Handler, .-Default_Handler
115 /******************************************************************************
117 * The minimal vector table for a Cortex M3. Note that the proper constructs
118 * must be placed on this to ensure that it ends up at physical address
121 *******************************************************************************/
122 .section .isr_vector,"a",%progbits
123 .type g_pfnVectors, %object
124 .size g_pfnVectors, .-g_pfnVectors
131 .word HardFault_Handler
132 .word MemManage_Handler
133 .word BusFault_Handler
134 .word UsageFault_Handler
140 .word DebugMon_Handler
143 .word SysTick_Handler
145 /* External Interrupts */
146 .word WWDG_IRQHandler /* Window WatchDog */
147 .word PVD_IRQHandler /* PVD through EXTI Line detection */
148 .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
149 .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
150 .word FLASH_IRQHandler /* FLASH */
151 .word RCC_IRQHandler /* RCC */
152 .word EXTI0_IRQHandler /* EXTI Line0 */
153 .word EXTI1_IRQHandler /* EXTI Line1 */
154 .word EXTI2_IRQHandler /* EXTI Line2 */
155 .word EXTI3_IRQHandler /* EXTI Line3 */
156 .word EXTI4_IRQHandler /* EXTI Line4 */
157 .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
158 .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
159 .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
160 .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
161 .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
162 .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
163 .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
164 .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
165 .word CAN1_TX_IRQHandler /* CAN1 TX */
166 .word CAN1_RX0_IRQHandler /* CAN1 RX0 */
167 .word CAN1_RX1_IRQHandler /* CAN1 RX1 */
168 .word CAN1_SCE_IRQHandler /* CAN1 SCE */
169 .word EXTI9_5_IRQHandler /* External Line[9:5]s */
170 .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
171 .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
172 .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
173 .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
174 .word TIM2_IRQHandler /* TIM2 */
175 .word TIM3_IRQHandler /* TIM3 */
176 .word TIM4_IRQHandler /* TIM4 */
177 .word I2C1_EV_IRQHandler /* I2C1 Event */
178 .word I2C1_ER_IRQHandler /* I2C1 Error */
179 .word I2C2_EV_IRQHandler /* I2C2 Event */
180 .word I2C2_ER_IRQHandler /* I2C2 Error */
181 .word SPI1_IRQHandler /* SPI1 */
182 .word SPI2_IRQHandler /* SPI2 */
183 .word USART1_IRQHandler /* USART1 */
184 .word USART2_IRQHandler /* USART2 */
185 .word USART3_IRQHandler /* USART3 */
186 .word EXTI15_10_IRQHandler /* External Line[15:10]s */
187 .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
188 .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
189 .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
190 .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
191 .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
192 .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
193 .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
194 .word FSMC_IRQHandler /* FSMC */
195 .word SDIO_IRQHandler /* SDIO */
196 .word TIM5_IRQHandler /* TIM5 */
197 .word SPI3_IRQHandler /* SPI3 */
198 .word UART4_IRQHandler /* UART4 */
199 .word UART5_IRQHandler /* UART5 */
200 .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
201 .word TIM7_IRQHandler /* TIM7 */
202 .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
203 .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
204 .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
205 .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
206 .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
207 .word ETH_IRQHandler /* Ethernet */
208 .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
209 .word CAN2_TX_IRQHandler /* CAN2 TX */
210 .word CAN2_RX0_IRQHandler /* CAN2 RX0 */
211 .word CAN2_RX1_IRQHandler /* CAN2 RX1 */
212 .word CAN2_SCE_IRQHandler /* CAN2 SCE */
213 .word OTG_FS_IRQHandler /* USB OTG FS */
214 .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
215 .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
216 .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
217 .word USART6_IRQHandler /* USART6 */
218 .word I2C3_EV_IRQHandler /* I2C3 event */
219 .word I2C3_ER_IRQHandler /* I2C3 error */
220 .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
221 .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
222 .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
223 .word OTG_HS_IRQHandler /* USB OTG HS */
224 .word DCMI_IRQHandler /* DCMI */
225 .word CRYP_IRQHandler /* CRYP crypto */
226 .word HASH_RNG_IRQHandler /* Hash and Rng */
227 .word FPU_IRQHandler /* FPU */
229 /*******************************************************************************
231 * Provide weak aliases for each Exception handler to the Default_Handler.
232 * As they are weak aliases, any function with the same name will override
235 *******************************************************************************/
237 .thumb_set NMI_Handler,Default_Handler
239 .weak HardFault_Handler
240 .thumb_set HardFault_Handler,Default_Handler
242 .weak MemManage_Handler
243 .thumb_set MemManage_Handler,Default_Handler
245 .weak BusFault_Handler
246 .thumb_set BusFault_Handler,Default_Handler
248 .weak UsageFault_Handler
249 .thumb_set UsageFault_Handler,Default_Handler
252 .thumb_set SVC_Handler,Default_Handler
254 .weak DebugMon_Handler
255 .thumb_set DebugMon_Handler,Default_Handler
258 .thumb_set PendSV_Handler,Default_Handler
260 .weak SysTick_Handler
261 .thumb_set SysTick_Handler,Default_Handler
263 .weak WWDG_IRQHandler
264 .thumb_set WWDG_IRQHandler,Default_Handler
267 .thumb_set PVD_IRQHandler,Default_Handler
269 .weak TAMP_STAMP_IRQHandler
270 .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
272 .weak RTC_WKUP_IRQHandler
273 .thumb_set RTC_WKUP_IRQHandler,Default_Handler
275 .weak FLASH_IRQHandler
276 .thumb_set FLASH_IRQHandler,Default_Handler
279 .thumb_set RCC_IRQHandler,Default_Handler
281 .weak EXTI0_IRQHandler
282 .thumb_set EXTI0_IRQHandler,Default_Handler
284 .weak EXTI1_IRQHandler
285 .thumb_set EXTI1_IRQHandler,Default_Handler
287 .weak EXTI2_IRQHandler
288 .thumb_set EXTI2_IRQHandler,Default_Handler
290 .weak EXTI3_IRQHandler
291 .thumb_set EXTI3_IRQHandler,Default_Handler
293 .weak EXTI4_IRQHandler
294 .thumb_set EXTI4_IRQHandler,Default_Handler
296 .weak DMA1_Stream0_IRQHandler
297 .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
299 .weak DMA1_Stream1_IRQHandler
300 .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
302 .weak DMA1_Stream2_IRQHandler
303 .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
305 .weak DMA1_Stream3_IRQHandler
306 .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
308 .weak DMA1_Stream4_IRQHandler
309 .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
311 .weak DMA1_Stream5_IRQHandler
312 .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
314 .weak DMA1_Stream6_IRQHandler
315 .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
318 .thumb_set ADC_IRQHandler,Default_Handler
320 .weak CAN1_TX_IRQHandler
321 .thumb_set CAN1_TX_IRQHandler,Default_Handler
323 .weak CAN1_RX0_IRQHandler
324 .thumb_set CAN1_RX0_IRQHandler,Default_Handler
326 .weak CAN1_RX1_IRQHandler
327 .thumb_set CAN1_RX1_IRQHandler,Default_Handler
329 .weak CAN1_SCE_IRQHandler
330 .thumb_set CAN1_SCE_IRQHandler,Default_Handler
332 .weak EXTI9_5_IRQHandler
333 .thumb_set EXTI9_5_IRQHandler,Default_Handler
335 .weak TIM1_BRK_TIM9_IRQHandler
336 .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
338 .weak TIM1_UP_TIM10_IRQHandler
339 .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
341 .weak TIM1_TRG_COM_TIM11_IRQHandler
342 .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
344 .weak TIM1_CC_IRQHandler
345 .thumb_set TIM1_CC_IRQHandler,Default_Handler
347 .weak TIM2_IRQHandler
348 .thumb_set TIM2_IRQHandler,Default_Handler
350 .weak TIM3_IRQHandler
351 .thumb_set TIM3_IRQHandler,Default_Handler
353 .weak TIM4_IRQHandler
354 .thumb_set TIM4_IRQHandler,Default_Handler
356 .weak I2C1_EV_IRQHandler
357 .thumb_set I2C1_EV_IRQHandler,Default_Handler
359 .weak I2C1_ER_IRQHandler
360 .thumb_set I2C1_ER_IRQHandler,Default_Handler
362 .weak I2C2_EV_IRQHandler
363 .thumb_set I2C2_EV_IRQHandler,Default_Handler
365 .weak I2C2_ER_IRQHandler
366 .thumb_set I2C2_ER_IRQHandler,Default_Handler
368 .weak SPI1_IRQHandler
369 .thumb_set SPI1_IRQHandler,Default_Handler
371 .weak SPI2_IRQHandler
372 .thumb_set SPI2_IRQHandler,Default_Handler
374 .weak USART1_IRQHandler
375 .thumb_set USART1_IRQHandler,Default_Handler
377 .weak USART2_IRQHandler
378 .thumb_set USART2_IRQHandler,Default_Handler
380 .weak USART3_IRQHandler
381 .thumb_set USART3_IRQHandler,Default_Handler
383 .weak EXTI15_10_IRQHandler
384 .thumb_set EXTI15_10_IRQHandler,Default_Handler
386 .weak RTC_Alarm_IRQHandler
387 .thumb_set RTC_Alarm_IRQHandler,Default_Handler
389 .weak OTG_FS_WKUP_IRQHandler
390 .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
392 .weak TIM8_BRK_TIM12_IRQHandler
393 .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
395 .weak TIM8_UP_TIM13_IRQHandler
396 .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
398 .weak TIM8_TRG_COM_TIM14_IRQHandler
399 .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
401 .weak TIM8_CC_IRQHandler
402 .thumb_set TIM8_CC_IRQHandler,Default_Handler
404 .weak DMA1_Stream7_IRQHandler
405 .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
407 .weak FSMC_IRQHandler
408 .thumb_set FSMC_IRQHandler,Default_Handler
410 .weak SDIO_IRQHandler
411 .thumb_set SDIO_IRQHandler,Default_Handler
413 .weak TIM5_IRQHandler
414 .thumb_set TIM5_IRQHandler,Default_Handler
416 .weak SPI3_IRQHandler
417 .thumb_set SPI3_IRQHandler,Default_Handler
419 .weak UART4_IRQHandler
420 .thumb_set UART4_IRQHandler,Default_Handler
422 .weak UART5_IRQHandler
423 .thumb_set UART5_IRQHandler,Default_Handler
425 .weak TIM6_DAC_IRQHandler
426 .thumb_set TIM6_DAC_IRQHandler,Default_Handler
428 .weak TIM7_IRQHandler
429 .thumb_set TIM7_IRQHandler,Default_Handler
431 .weak DMA2_Stream0_IRQHandler
432 .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
434 .weak DMA2_Stream1_IRQHandler
435 .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
437 .weak DMA2_Stream2_IRQHandler
438 .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
440 .weak DMA2_Stream3_IRQHandler
441 .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
443 .weak DMA2_Stream4_IRQHandler
444 .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
447 .thumb_set ETH_IRQHandler,Default_Handler
449 .weak ETH_WKUP_IRQHandler
450 .thumb_set ETH_WKUP_IRQHandler,Default_Handler
452 .weak CAN2_TX_IRQHandler
453 .thumb_set CAN2_TX_IRQHandler,Default_Handler
455 .weak CAN2_RX0_IRQHandler
456 .thumb_set CAN2_RX0_IRQHandler,Default_Handler
458 .weak CAN2_RX1_IRQHandler
459 .thumb_set CAN2_RX1_IRQHandler,Default_Handler
461 .weak CAN2_SCE_IRQHandler
462 .thumb_set CAN2_SCE_IRQHandler,Default_Handler
464 .weak OTG_FS_IRQHandler
465 .thumb_set OTG_FS_IRQHandler,Default_Handler
467 .weak DMA2_Stream5_IRQHandler
468 .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
470 .weak DMA2_Stream6_IRQHandler
471 .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
473 .weak DMA2_Stream7_IRQHandler
474 .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
476 .weak USART6_IRQHandler
477 .thumb_set USART6_IRQHandler,Default_Handler
479 .weak I2C3_EV_IRQHandler
480 .thumb_set I2C3_EV_IRQHandler,Default_Handler
482 .weak I2C3_ER_IRQHandler
483 .thumb_set I2C3_ER_IRQHandler,Default_Handler
485 .weak OTG_HS_EP1_OUT_IRQHandler
486 .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
488 .weak OTG_HS_EP1_IN_IRQHandler
489 .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
491 .weak OTG_HS_WKUP_IRQHandler
492 .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
494 .weak OTG_HS_IRQHandler
495 .thumb_set OTG_HS_IRQHandler,Default_Handler
497 .weak DCMI_IRQHandler
498 .thumb_set DCMI_IRQHandler,Default_Handler
500 .weak CRYP_IRQHandler
501 .thumb_set CRYP_IRQHandler,Default_Handler
503 .weak HASH_RNG_IRQHandler
504 .thumb_set HASH_RNG_IRQHandler,Default_Handler
507 .thumb_set FPU_IRQHandler,Default_Handler
509 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/