2 ******************************************************************************
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3 * @file stm32l1xx_lcd.c
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4 * @author MCD Application Team
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6 * @date 31-December-2010
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7 * @brief This file provides firmware functions to manage the following
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8 * functionalities of the LCD controller (LCD) peripheral:
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9 * - Initialization and configuration
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10 * - LCD RAM memory write
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11 * - Interrupts and flags management
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15 * ===================================================================
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17 * ===================================================================
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18 * LCDCLK is the same as RTCCLK.
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19 * To configure the RTCCLK/LCDCLK, proceed as follows:
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20 * - Enable the Power Controller (PWR) APB1 interface clock using the
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21 * RCC_APB1PeriphClockCmd() function.
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22 * - Enable access to RTC domain using the PWR_RTCAccessCmd() function.
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23 * - Select the RTC clock source using the RCC_RTCCLKConfig() function.
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25 * The frequency generator allows you to achieve various LCD frame rates
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26 * starting from an LCD input clock frequency (LCDCLK) which can vary
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27 * from 32 kHz up to 1 MHz.
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29 * ===================================================================
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30 * LCD and low power modes
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31 * ===================================================================
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32 * The LCD still active during STOP mode.
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34 * ===================================================================
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35 * How to use this driver
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36 * ===================================================================
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37 * 1. Enable LCD clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_LCD, ENABLE) function
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39 * 2. Configure the LCD prescaler, divider, duty, bias and voltage source
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40 * using LCD_Init() function
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42 * 3. Optionally you can enable/configure:
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43 * - LCD High Drive using the LCD_HighDriveCmd() function
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44 * - LCD High Drive using the LCD_MuxSegmentCmd() function
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45 * - LCD Pulse ON Duration using the LCD_PulseOnDurationConfig() function
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46 * - LCD Dead Time using the LCD_DeadTimeConfig() function
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47 * - The LCD Blink mode and frequency using the LCD_BlinkConfig() function
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48 * - The LCD Contrast using the LCD_ContrastConfig() function
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50 * 4. Call the LCD_WaitForSynchro() function to wait for LCD_FCR register
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53 * 5. Call the LCD_Cmd() to enable the LCD controller
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55 * 6. Wait until the LCD Controller status is enabled and the step-up
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56 * converter is ready using the LCD_GetFlagStatus() and
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57 * LCD_FLAG_ENS and LCD_FLAG_RDY flags.
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59 * 7. Write to the LCD RAM memory using the LCD_Write() function.
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61 * 8. Request an update display using the LCD_UpdateDisplayRequest()
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64 * 9. Wait until the update display is finished by checking the UDD
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65 * flag status using the LCD_GetFlagStatus(LCD_FLAG_UDD)
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70 ******************************************************************************
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73 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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74 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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75 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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76 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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77 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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78 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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80 * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
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81 ******************************************************************************
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84 /* Includes ------------------------------------------------------------------*/
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85 #include "stm32l1xx_lcd.h"
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86 #include "stm32l1xx_rcc.h"
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88 /** @addtogroup STM32L1xx_StdPeriph_Driver
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93 * @brief LCD driver modules
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97 /* Private typedef -----------------------------------------------------------*/
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98 /* Private define ------------------------------------------------------------*/
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99 /* ------------ LCD registers bit address in the alias region --------------- */
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100 #define LCD_OFFSET (LCD_BASE - PERIPH_BASE)
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102 /* --- CR Register ---*/
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104 /* Alias word address of LCDEN bit */
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105 #define CR_OFFSET (LCD_OFFSET + 0x00)
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106 #define LCDEN_BitNumber 0x00
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107 #define CR_LCDEN_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (LCDEN_BitNumber * 4))
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109 /* Alias word address of MUX_SEG bit */
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110 #define MUX_SEG_BitNumber 0x07
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111 #define CR_MUX_SEG_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (MUX_SEG_BitNumber * 4))
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114 /* --- FCR Register ---*/
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116 /* Alias word address of HD bit */
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117 #define FCR_OFFSET (LCD_OFFSET + 0x04)
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118 #define HD_BitNumber 0x00
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119 #define FCR_HD_BB (PERIPH_BB_BASE + (FCR_OFFSET * 32) + (HD_BitNumber * 4))
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121 /* --- SR Register ---*/
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123 /* Alias word address of UDR bit */
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124 #define SR_OFFSET (LCD_OFFSET + 0x08)
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125 #define UDR_BitNumber 0x02
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126 #define SR_UDR_BB (PERIPH_BB_BASE + (SR_OFFSET * 32) + (UDR_BitNumber * 4))
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128 #define FCR_MASK ((uint32_t)0xFC03FFFF) /* LCD FCR Mask */
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129 #define CR_MASK ((uint32_t)0xFFFFFF81) /* LCD CR Mask */
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130 #define PON_MASK ((uint32_t)0xFFFFFF8F) /* LCD PON Mask */
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131 #define DEAD_MASK ((uint32_t)0xFFFFFC7F) /* LCD DEAD Mask */
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132 #define BLINK_MASK ((uint32_t)0xFFFC1FFF) /* LCD BLINK Mask */
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133 #define CONTRAST_MASK ((uint32_t)0xFFFFE3FF) /* LCD CONTRAST Mask */
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135 /* Private macro -------------------------------------------------------------*/
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136 /* Private variables ---------------------------------------------------------*/
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137 /* Private function prototypes -----------------------------------------------*/
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138 /* Private functions ---------------------------------------------------------*/
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140 /** @defgroup LCD_Private_Functions
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144 /** @defgroup LCD_Group1 Initialization and Configuration functions
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145 * @brief Initialization and Configuration functions
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148 ===============================================================================
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149 Initialization and Configuration functions
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150 ===============================================================================
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157 * @brief Deinitializes the LCD peripheral registers to their default reset
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162 void LCD_DeInit(void)
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164 /* Enable LCD reset state */
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165 RCC_APB1PeriphResetCmd(RCC_APB1Periph_LCD, ENABLE);
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166 /* Release LCD from reset state */
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167 RCC_APB1PeriphResetCmd(RCC_APB1Periph_LCD, DISABLE);
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171 * @brief Initializes the LCD peripheral according to the specified parameters
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172 * in the LCD_InitStruct.
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173 * @note This function can be used only when the LCD is disabled.
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174 * @param LCD_InitStruct: pointer to a LCD_InitTypeDef structure that contains
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175 * the configuration information for the specified LCD peripheral.
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178 void LCD_Init(LCD_InitTypeDef* LCD_InitStruct)
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180 /* Check function parameters */
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181 assert_param(IS_LCD_PRESCALER(LCD_InitStruct->LCD_Prescaler));
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182 assert_param(IS_LCD_DIVIDER(LCD_InitStruct->LCD_Divider));
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183 assert_param(IS_LCD_DUTY(LCD_InitStruct->LCD_Duty));
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184 assert_param(IS_LCD_BIAS(LCD_InitStruct->LCD_Bias));
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185 assert_param(IS_LCD_VOLTAGE_SOURCE(LCD_InitStruct->LCD_VoltageSource));
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187 LCD->FCR &= (uint32_t)FCR_MASK;
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188 LCD->FCR |= (uint32_t)(LCD_InitStruct->LCD_Prescaler | LCD_InitStruct->LCD_Divider);
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190 LCD_WaitForSynchro();
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192 LCD->CR &= (uint32_t)CR_MASK;
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193 LCD->CR |= (uint32_t)(LCD_InitStruct->LCD_Duty | LCD_InitStruct->LCD_Bias | \
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194 LCD_InitStruct->LCD_VoltageSource);
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199 * @brief Fills each LCD_InitStruct member with its default value.
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200 * @param LCD_InitStruct: pointer to a LCD_InitTypeDef structure which will
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204 void LCD_StructInit(LCD_InitTypeDef* LCD_InitStruct)
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206 /*--------------- Reset LCD init structure parameters values -----------------*/
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207 LCD_InitStruct->LCD_Prescaler = LCD_Prescaler_1; /*!< Initialize the LCD_Prescaler member */
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209 LCD_InitStruct->LCD_Divider = LCD_Divider_16; /*!< Initialize the LCD_Divider member */
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211 LCD_InitStruct->LCD_Duty = LCD_Duty_Static; /*!< Initialize the LCD_Duty member */
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213 LCD_InitStruct->LCD_Bias = LCD_Bias_1_4; /*!< Initialize the LCD_Bias member */
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215 LCD_InitStruct->LCD_VoltageSource = LCD_VoltageSource_Internal; /*!< Initialize the LCD_VoltageSource member */
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219 * @brief Enables or disables the LCD Controller.
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220 * @param NewState: new state of the LCD peripheral.
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221 * This parameter can be: ENABLE or DISABLE.
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224 void LCD_Cmd(FunctionalState NewState)
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226 assert_param(IS_FUNCTIONAL_STATE(NewState));
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228 /* Check the parameters */
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229 assert_param(IS_FUNCTIONAL_STATE(NewState));
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231 *(__IO uint32_t *) CR_LCDEN_BB = (uint32_t)NewState;
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235 * @brief Waits until the LCD FCR register is synchronized in the LCDCLK domain.
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236 * This function must be called after any write operation to LCD_FCR register.
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240 void LCD_WaitForSynchro(void)
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242 /* Loop until FCRSF flag is set */
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243 while ((LCD->SR & LCD_FLAG_FCRSF) == (uint32_t)RESET)
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249 * @brief Enables or disables the low resistance divider. Displays with high
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250 * internal resistance may need a longer drive time to achieve
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251 * satisfactory contrast. This function is useful in this case if some
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252 * additional power consumption can be tolerated.
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253 * @note When this mode is enabled, the PulseOn Duration (PON) have to be
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254 * programmed to 1/CK_PS (LCD_PulseOnDuration_1).
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255 * @param NewState: new state of the low resistance divider.
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256 * This parameter can be: ENABLE or DISABLE.
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259 void LCD_HighDriveCmd(FunctionalState NewState)
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261 /* Check the parameters */
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262 assert_param(IS_FUNCTIONAL_STATE(NewState));
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264 *(__IO uint32_t *) FCR_HD_BB = (uint32_t)NewState;
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268 * @brief Enables or disables the Mux Segment.
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269 * @note This function can be used only when the LCD is disabled.
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270 * @param NewState: new state of the Mux Segment.
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271 * This parameter can be: ENABLE or DISABLE.
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274 void LCD_MuxSegmentCmd(FunctionalState NewState)
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276 /* Check the parameters */
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277 assert_param(IS_FUNCTIONAL_STATE(NewState));
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279 *(__IO uint32_t *) CR_MUX_SEG_BB = (uint32_t)NewState;
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283 * @brief Configures the LCD pulses on duration.
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284 * @param LCD_PulseOnDuration: specifies the LCD pulse on duration in terms of
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285 * CK_PS (prescaled LCD clock period) pulses.
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286 * This parameter can be one of the following values:
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287 * @arg LCD_PulseOnDuration_0: 0 pulse
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288 * @arg LCD_PulseOnDuration_1: Pulse ON duration = 1/CK_PS
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289 * @arg LCD_PulseOnDuration_2: Pulse ON duration = 2/CK_PS
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290 * @arg LCD_PulseOnDuration_3: Pulse ON duration = 3/CK_PS
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291 * @arg LCD_PulseOnDuration_4: Pulse ON duration = 4/CK_PS
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292 * @arg LCD_PulseOnDuration_5: Pulse ON duration = 5/CK_PS
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293 * @arg LCD_PulseOnDuration_6: Pulse ON duration = 6/CK_PS
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294 * @arg LCD_PulseOnDuration_7: Pulse ON duration = 7/CK_PS
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297 void LCD_PulseOnDurationConfig(uint32_t LCD_PulseOnDuration)
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299 /* Check the parameters */
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300 assert_param(IS_LCD_PULSE_ON_DURATION(LCD_PulseOnDuration));
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302 LCD->FCR &= (uint32_t)PON_MASK;
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303 LCD->FCR |= (uint32_t)(LCD_PulseOnDuration);
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307 * @brief Configures the LCD dead time.
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308 * @param LCD_DeadTime: specifies the LCD dead time.
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309 * This parameter can be one of the following values:
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310 * @arg LCD_DeadTime_0: No dead Time
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311 * @arg LCD_DeadTime_1: One Phase between different couple of Frame
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312 * @arg LCD_DeadTime_2: Two Phase between different couple of Frame
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313 * @arg LCD_DeadTime_3: Three Phase between different couple of Frame
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314 * @arg LCD_DeadTime_4: Four Phase between different couple of Frame
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315 * @arg LCD_DeadTime_5: Five Phase between different couple of Frame
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316 * @arg LCD_DeadTime_6: Six Phase between different couple of Frame
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317 * @arg LCD_DeadTime_7: Seven Phase between different couple of Frame
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320 void LCD_DeadTimeConfig(uint32_t LCD_DeadTime)
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322 /* Check the parameters */
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323 assert_param(IS_LCD_DEAD_TIME(LCD_DeadTime));
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325 LCD->FCR &= (uint32_t)DEAD_MASK;
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326 LCD->FCR |= (uint32_t)(LCD_DeadTime);
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330 * @brief Configures the LCD Blink mode and Blink frequency.
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331 * @param LCD_BlinkMode: specifies the LCD blink mode.
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332 * This parameter can be one of the following values:
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333 * @arg LCD_BlinkMode_Off: Blink disabled
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334 * @arg LCD_BlinkMode_SEG0_COM0: Blink enabled on SEG[0], COM[0] (1 pixel)
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335 * @arg LCD_BlinkMode_SEG0_AllCOM: Blink enabled on SEG[0], all COM (up to 8
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336 * pixels according to the programmed duty)
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337 * @arg LCD_BlinkMode_AllSEG_AllCOM: Blink enabled on all SEG and all COM
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339 * @param LCD_BlinkFrequency: specifies the LCD blink frequency.
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340 * This parameter can be one of the following values:
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341 * @arg LCD_BlinkFrequency_Div8: The Blink frequency = fLcd/8
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342 * @arg LCD_BlinkFrequency_Div16: The Blink frequency = fLcd/16
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343 * @arg LCD_BlinkFrequency_Div32: The Blink frequency = fLcd/32
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344 * @arg LCD_BlinkFrequency_Div64: The Blink frequency = fLcd/64
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345 * @arg LCD_BlinkFrequency_Div128: The Blink frequency = fLcd/128
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346 * @arg LCD_BlinkFrequency_Div256: The Blink frequency = fLcd/256
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347 * @arg LCD_BlinkFrequency_Div512: The Blink frequency = fLcd/512
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348 * @arg LCD_BlinkFrequency_Div1024: The Blink frequency = fLcd/1024
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351 void LCD_BlinkConfig(uint32_t LCD_BlinkMode, uint32_t LCD_BlinkFrequency)
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353 /* Check the parameters */
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354 assert_param(IS_LCD_BLINK_MODE(LCD_BlinkMode));
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355 assert_param(IS_LCD_BLINK_FREQUENCY(LCD_BlinkFrequency));
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357 LCD->FCR &= (uint32_t)BLINK_MASK;
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358 LCD->FCR |= (uint32_t)(LCD_BlinkMode | LCD_BlinkFrequency);
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362 * @brief Configures the LCD Contrast.
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363 * @param LCD_Contrast: specifies the LCD Contrast.
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364 * This parameter can be one of the following values:
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365 * @arg LCD_Contrast_Level_0: Maximum Voltage = 2.60V
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366 * @arg LCD_Contrast_Level_1: Maximum Voltage = 2.73V
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367 * @arg LCD_Contrast_Level_2: Maximum Voltage = 2.86V
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368 * @arg LCD_Contrast_Level_3: Maximum Voltage = 2.99V
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369 * @arg LCD_Contrast_Level_4: Maximum Voltage = 3.12V
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370 * @arg LCD_Contrast_Level_5: Maximum Voltage = 3.25V
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371 * @arg LCD_Contrast_Level_6: Maximum Voltage = 3.38V
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372 * @arg LCD_Contrast_Level_7: Maximum Voltage = 3.51V
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375 void LCD_ContrastConfig(uint32_t LCD_Contrast)
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377 /* Check the parameters */
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378 assert_param(IS_LCD_CONTRAST(LCD_Contrast));
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380 LCD->FCR &= (uint32_t)CONTRAST_MASK;
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381 LCD->FCR |= (uint32_t)(LCD_Contrast);
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388 /** @defgroup LCD_Group2 LCD RAM memory write functions
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389 * @brief LCD RAM memory write functions
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392 ===============================================================================
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393 LCD RAM memory write functions
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394 ===============================================================================
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396 Using its double buffer memory the LCD controller ensures the coherency of the
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397 displayed information without having to use interrupts to control LCD_RAM
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399 The application software can access the first buffer level (LCD_RAM) through
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400 the APB interface. Once it has modified the LCD_RAM, it sets the UDR flag in
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401 the LCD_SR register using the LCD_UpdateDisplayRequest() function.
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402 This UDR flag (update display request) requests the updated information to be
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403 moved into the second buffer level (LCD_DISPLAY).
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404 This operation is done synchronously with the frame (at the beginning of the
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405 next frame), until the update is completed, the LCD_RAM is write protected and
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406 the UDR flag stays high.
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407 Once the update is completed another flag (UDD - Update Display Done) is set and
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408 generates an interrupt if the UDDIE bit in the LCD_FCR register is set.
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409 The time it takes to update LCD_DISPLAY is, in the worst case, one odd and one
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411 The update will not occur (UDR = 1 and UDD = 0) until the display is
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412 enabled (LCDEN = 1).
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419 * @brief Writes a word in the specific LCD RAM.
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420 * @param LCD_RAMRegister: specifies the LCD Contrast.
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421 * This parameter can be one of the following values:
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422 * @arg LCD_RAMRegister_0: LCD RAM Register 0
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423 * @arg LCD_RAMRegister_1: LCD RAM Register 1
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424 * @arg LCD_RAMRegister_2: LCD RAM Register 2
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425 * @arg LCD_RAMRegister_3: LCD RAM Register 3
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426 * @arg LCD_RAMRegister_4: LCD RAM Register 4
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427 * @arg LCD_RAMRegister_5: LCD RAM Register 5
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428 * @arg LCD_RAMRegister_6: LCD RAM Register 6
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429 * @arg LCD_RAMRegister_7: LCD RAM Register 7
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430 * @arg LCD_RAMRegister_8: LCD RAM Register 8
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431 * @arg LCD_RAMRegister_9: LCD RAM Register 9
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432 * @arg LCD_RAMRegister_10: LCD RAM Register 10
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433 * @arg LCD_RAMRegister_11: LCD RAM Register 11
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434 * @arg LCD_RAMRegister_12: LCD RAM Register 12
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435 * @arg LCD_RAMRegister_13: LCD RAM Register 13
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436 * @arg LCD_RAMRegister_14: LCD RAM Register 14
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437 * @arg LCD_RAMRegister_15: LCD RAM Register 15
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438 * @param LCD_Data: specifies LCD Data Value to be written.
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441 void LCD_Write(uint32_t LCD_RAMRegister, uint32_t LCD_Data)
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443 /* Check the parameters */
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444 assert_param(IS_LCD_RAM_REGISTER(LCD_RAMRegister));
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446 /* Copy data bytes to RAM register */
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447 LCD->RAM[LCD_RAMRegister] = (uint32_t)LCD_Data;
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451 * @brief Enables the Update Display Request.
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452 * @note Each time software modifies the LCD_RAM it must set the UDR bit to
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453 * transfer the updated data to the second level buffer.
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454 * The UDR bit stays set until the end of the update and during this
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455 * time the LCD_RAM is write protected.
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456 * @note When the display is disabled, the update is performed for all
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457 * LCD_DISPLAY locations.
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458 * When the display is enabled, the update is performed only for locations
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459 * for which commons are active (depending on DUTY). For example if
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460 * DUTY = 1/2, only the LCD_DISPLAY of COM0 and COM1 will be updated.
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464 void LCD_UpdateDisplayRequest(void)
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466 *(__IO uint32_t *) SR_UDR_BB = (uint32_t)0x01;
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473 /** @defgroup LCD_Group3 Interrupts and flags management functions
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474 * @brief Interrupts and flags management functions
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477 ===============================================================================
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478 Interrupts and flags management functions
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479 ===============================================================================
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486 * @brief Enables or disables the specified LCD interrupts.
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487 * @param LCD_IT: specifies the LCD interrupts sources to be enabled or disabled.
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488 * This parameter can be any combination of the following values:
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489 * @arg LCD_IT_SOF: Start of Frame Interrupt
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490 * @arg LCD_IT_UDD: Update Display Done Interrupt
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491 * @param NewState: new state of the specified LCD interrupts.
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492 * This parameter can be: ENABLE or DISABLE.
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495 void LCD_ITConfig(uint32_t LCD_IT, FunctionalState NewState)
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497 /* Check the parameters */
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498 assert_param(IS_LCD_IT(LCD_IT));
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499 assert_param(IS_FUNCTIONAL_STATE(NewState));
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501 if (NewState != DISABLE)
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503 LCD->FCR |= LCD_IT;
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507 LCD->FCR &= (uint32_t)~LCD_IT;
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512 * @brief Checks whether the specified LCD flag is set or not.
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513 * @param LCD_FLAG: specifies the flag to check.
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514 * This parameter can be one of the following values:
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515 * @arg LCD_FLAG_ENS: LCD Enabled flag. It indicates the LCD controller status.
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516 * @note The ENS bit is set immediately when the LCDEN bit in the LCD_CR
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517 * goes from 0 to 1. On deactivation it reflects the real status of
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518 * LCD so it becomes 0 at the end of the last displayed frame.
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519 * @arg LCD_FLAG_SOF: Start of Frame flag. This flag is set by hardware at
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520 * the beginning of a new frame, at the same time as the display data is
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522 * @arg LCD_FLAG_UDR: Update Display Request flag.
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523 * @arg LCD_FLAG_UDD: Update Display Done flag.
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524 * @arg LCD_FLAG_RDY: Step_up converter Ready flag. It indicates the status
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525 * of the step-up converter.
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526 * @arg LCD_FLAG_FCRSF: LCD Frame Control Register Synchronization Flag.
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527 * This flag is set by hardware each time the LCD_FCR register is updated
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528 * in the LCDCLK domain.
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529 * @retval The new state of LCD_FLAG (SET or RESET).
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531 FlagStatus LCD_GetFlagStatus(uint32_t LCD_FLAG)
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533 FlagStatus bitstatus = RESET;
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535 /* Check the parameters */
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536 assert_param(IS_LCD_GET_FLAG(LCD_FLAG));
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538 if ((LCD->SR & LCD_FLAG) != (uint32_t)RESET)
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550 * @brief Clears the LCD's pending flags.
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551 * @param LCD_FLAG: specifies the flag to clear.
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552 * This parameter can be any combination of the following values:
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553 * @arg LCD_FLAG_SOF: Start of Frame Interrupt
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554 * @arg LCD_FLAG_UDD: Update Display Done Interrupt
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557 void LCD_ClearFlag(uint32_t LCD_FLAG)
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559 /* Check the parameters */
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560 assert_param(IS_LCD_CLEAR_FLAG(LCD_FLAG));
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562 /* Clear the corresponding LCD flag */
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563 LCD->CLR = (uint32_t)LCD_FLAG;
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567 * @brief Checks whether the specified RTC interrupt has occurred or not.
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568 * @param RTC_IT: specifies the RTC interrupts sources to check.
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569 * This parameter can be one of the following values:
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570 * @arg LCD_IT_SOF: Start of Frame Interrupt
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571 * @arg LCD_IT_UDD: Update Display Done Interrupt.
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572 * @note If the device is in STOP mode (PCLK not provided) UDD will not
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573 * generate an interrupt even if UDDIE = 1.
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574 * If the display is not enabled the UDD interrupt will never occur.
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575 * @retval The new state of the LCD_IT (SET or RESET).
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577 ITStatus LCD_GetITStatus(uint32_t LCD_IT)
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579 ITStatus bitstatus = RESET;
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581 /* Check the parameters */
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582 assert_param(IS_LCD_GET_IT(LCD_IT));
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584 if ((LCD->SR & LCD_IT) != (uint16_t)RESET)
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593 if (((LCD->FCR & LCD_IT) != (uint16_t)RESET) && (bitstatus != (uint32_t)RESET))
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605 * @brief Clears the LCD's interrupt pending bits.
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606 * @param LCD_IT: specifies the interrupt pending bit to clear.
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607 * This parameter can be any combination of the following values:
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608 * @arg LCD_IT_SOF: Start of Frame Interrupt
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609 * @arg LCD_IT_UDD: Update Display Done Interrupt
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612 void LCD_ClearITPendingBit(uint32_t LCD_IT)
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614 /* Check the parameters */
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615 assert_param(IS_LCD_IT(LCD_IT));
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617 /* Clear the corresponding LCD pending bit */
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618 LCD->CLR = (uint32_t)LCD_IT;
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637 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
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