2 ******************************************************************************
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3 * @file stm32l1xx_iwdg.c
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4 * @author MCD Application Team
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6 * @date 31-December-2010
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7 * @brief This file provides firmware functions to manage the following
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8 * functionalities of the Independent watchdog (IWDG) peripheral:
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9 * - Prescaler and Counter configuration
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15 * ===================================================================
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17 * ===================================================================
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19 * The IWDG can be started by either software or hardware (configurable
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20 * through option byte).
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22 * The IWDG is clocked by its own dedicated low-speed clock (LSI) and
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23 * thus stays active even if the main clock fails.
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24 * Once the IWDG is started, the LSI is forced ON and cannot be disabled
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25 * (LSI cannot be disabled too), and the counter starts counting down from
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26 * the reset value of 0xFFF. When it reaches the end of count value (0x000)
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27 * a system reset is generated.
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28 * The IWDG counter should be reloaded at regular intervals to prevent
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31 * The IWDG is implemented in the VDD voltage domain that is still functional
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32 * in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY)
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34 * IWDGRST flag in RCC_CSR register can be used to inform when a IWDG
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37 * Min-max timeout value @37KHz (LSI): ~108us / ~28.3s
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38 * The IWDG timeout may vary due to LSI frequency dispersion. STM32L1xx
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39 * devices provide the capability to measure the LSI frequency (LSI clock
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40 * connected internally to TIM10 CH1 input capture). The measured value
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41 * can be used to have an IWDG timeout with an acceptable accuracy.
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42 * For more information, please refer to the STM32L1xx Reference manual
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45 * ===================================================================
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46 * How to use this driver
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47 * ===================================================================
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48 * 1. Enable write access to IWDG_PR and IWDG_RLR registers using
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49 * IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable) function
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51 * 2. Configure the IWDG prescaler using IWDG_SetPrescaler() function
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53 * 3. Configure the IWDG counter value using IWDG_SetReload() function.
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54 * This value will be loaded in the IWDG counter each time the counter
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55 * is reloaded, then the IWDG will start counting down from this value.
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57 * 4. Start the IWDG using IWDG_Enable() function, when the IWDG is used
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58 * in software mode (no need to enable the LSI, it will be enabled
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61 * 5. Then the application program must reload the IWDG counter at regular
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62 * intervals during normal operation to prevent an MCU reset, using
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63 * IWDG_ReloadCounter() function.
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67 ******************************************************************************
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70 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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71 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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72 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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73 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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74 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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75 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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77 * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
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78 ******************************************************************************
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81 /* Includes ------------------------------------------------------------------*/
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82 #include "stm32l1xx_iwdg.h"
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84 /** @addtogroup STM32L1xx_StdPeriph_Driver
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89 * @brief IWDG driver modules
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93 /* Private typedef -----------------------------------------------------------*/
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94 /* Private define ------------------------------------------------------------*/
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95 /* ---------------------- IWDG registers bit mask ----------------------------*/
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96 /* KR register bit mask */
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97 #define KR_KEY_RELOAD ((uint16_t)0xAAAA)
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98 #define KR_KEY_ENABLE ((uint16_t)0xCCCC)
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100 /* Private macro -------------------------------------------------------------*/
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101 /* Private variables ---------------------------------------------------------*/
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102 /* Private function prototypes -----------------------------------------------*/
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103 /* Private functions ---------------------------------------------------------*/
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105 /** @defgroup IWDG_Private_Functions
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109 /** @defgroup IWDG_Group1 Prescaler and Counter configuration functions
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110 * @brief Prescaler and Counter configuration functions
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113 ===============================================================================
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114 Prescaler and Counter configuration functions
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115 ===============================================================================
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122 * @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers.
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123 * @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.
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124 * This parameter can be one of the following values:
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125 * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers
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126 * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers
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129 void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
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131 /* Check the parameters */
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132 assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));
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133 IWDG->KR = IWDG_WriteAccess;
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137 * @brief Sets IWDG Prescaler value.
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138 * @param IWDG_Prescaler: specifies the IWDG Prescaler value.
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139 * This parameter can be one of the following values:
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140 * @arg IWDG_Prescaler_4: IWDG prescaler set to 4
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141 * @arg IWDG_Prescaler_8: IWDG prescaler set to 8
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142 * @arg IWDG_Prescaler_16: IWDG prescaler set to 16
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143 * @arg IWDG_Prescaler_32: IWDG prescaler set to 32
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144 * @arg IWDG_Prescaler_64: IWDG prescaler set to 64
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145 * @arg IWDG_Prescaler_128: IWDG prescaler set to 128
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146 * @arg IWDG_Prescaler_256: IWDG prescaler set to 256
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149 void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
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151 /* Check the parameters */
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152 assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));
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153 IWDG->PR = IWDG_Prescaler;
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157 * @brief Sets IWDG Reload value.
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158 * @param Reload: specifies the IWDG Reload value.
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159 * This parameter must be a number between 0 and 0x0FFF.
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162 void IWDG_SetReload(uint16_t Reload)
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164 /* Check the parameters */
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165 assert_param(IS_IWDG_RELOAD(Reload));
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166 IWDG->RLR = Reload;
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170 * @brief Reloads IWDG counter with value defined in the reload register
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171 * (write access to IWDG_PR and IWDG_RLR registers disabled).
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175 void IWDG_ReloadCounter(void)
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177 IWDG->KR = KR_KEY_RELOAD;
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184 /** @defgroup IWDG_Group2 IWDG activation function
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185 * @brief IWDG activation function
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188 ===============================================================================
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189 IWDG activation function
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190 ===============================================================================
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197 * @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).
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201 void IWDG_Enable(void)
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203 IWDG->KR = KR_KEY_ENABLE;
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210 /** @defgroup IWDG_Group3 Flag management function
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211 * @brief Flag management function
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214 ===============================================================================
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215 Flag management function
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216 ===============================================================================
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223 * @brief Checks whether the specified IWDG flag is set or not.
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224 * @param IWDG_FLAG: specifies the flag to check.
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225 * This parameter can be one of the following values:
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226 * @arg IWDG_FLAG_PVU: Prescaler Value Update on going
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227 * @arg IWDG_FLAG_RVU: Reload Value Update on going
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228 * @retval The new state of IWDG_FLAG (SET or RESET).
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230 FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)
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232 FlagStatus bitstatus = RESET;
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233 /* Check the parameters */
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234 assert_param(IS_IWDG_FLAG(IWDG_FLAG));
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235 if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)
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243 /* Return the flag status */
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263 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
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