2 ******************************************************************************
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3 * @file stm32l1xx_syscfg.h
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4 * @author MCD Application Team
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6 * @date 31-December-2010
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7 * @brief This file contains all the functions prototypes for the SYSCFG
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9 ******************************************************************************
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12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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19 * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
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20 ******************************************************************************
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23 /*!< Define to prevent recursive inclusion -------------------------------------*/
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24 #ifndef __STM32L1xx_SYSCFG_H
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25 #define __STM32L1xx_SYSCFG_H
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31 /*!< Includes ------------------------------------------------------------------*/
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32 #include "stm32l1xx.h"
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34 /** @addtogroup STM32L1xx_StdPeriph_Driver
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38 /** @addtogroup SYSCFG
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42 /* Exported types ------------------------------------------------------------*/
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43 /* Exported constants --------------------------------------------------------*/
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45 /** @defgroup SYSCFG_Exported_Constants
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49 /** @defgroup EXTI_Port_Sources
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52 #define EXTI_PortSourceGPIOA ((uint8_t)0x00)
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53 #define EXTI_PortSourceGPIOB ((uint8_t)0x01)
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54 #define EXTI_PortSourceGPIOC ((uint8_t)0x02)
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55 #define EXTI_PortSourceGPIOD ((uint8_t)0x03)
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56 #define EXTI_PortSourceGPIOE ((uint8_t)0x04)
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57 #define EXTI_PortSourceGPIOH ((uint8_t)0x05)
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59 #define IS_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == EXTI_PortSourceGPIOA) || \
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60 ((PORTSOURCE) == EXTI_PortSourceGPIOB) || \
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61 ((PORTSOURCE) == EXTI_PortSourceGPIOC) || \
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62 ((PORTSOURCE) == EXTI_PortSourceGPIOD) || \
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63 ((PORTSOURCE) == EXTI_PortSourceGPIOE) || \
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64 ((PORTSOURCE) == EXTI_PortSourceGPIOH))
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69 /** @defgroup EXTI_Pin_sources
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72 #define EXTI_PinSource0 ((uint8_t)0x00)
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73 #define EXTI_PinSource1 ((uint8_t)0x01)
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74 #define EXTI_PinSource2 ((uint8_t)0x02)
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75 #define EXTI_PinSource3 ((uint8_t)0x03)
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76 #define EXTI_PinSource4 ((uint8_t)0x04)
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77 #define EXTI_PinSource5 ((uint8_t)0x05)
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78 #define EXTI_PinSource6 ((uint8_t)0x06)
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79 #define EXTI_PinSource7 ((uint8_t)0x07)
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80 #define EXTI_PinSource8 ((uint8_t)0x08)
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81 #define EXTI_PinSource9 ((uint8_t)0x09)
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82 #define EXTI_PinSource10 ((uint8_t)0x0A)
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83 #define EXTI_PinSource11 ((uint8_t)0x0B)
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84 #define EXTI_PinSource12 ((uint8_t)0x0C)
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85 #define EXTI_PinSource13 ((uint8_t)0x0D)
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86 #define EXTI_PinSource14 ((uint8_t)0x0E)
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87 #define EXTI_PinSource15 ((uint8_t)0x0F)
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88 #define IS_EXTI_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == EXTI_PinSource0) || \
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89 ((PINSOURCE) == EXTI_PinSource1) || \
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90 ((PINSOURCE) == EXTI_PinSource2) || \
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91 ((PINSOURCE) == EXTI_PinSource3) || \
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92 ((PINSOURCE) == EXTI_PinSource4) || \
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93 ((PINSOURCE) == EXTI_PinSource5) || \
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94 ((PINSOURCE) == EXTI_PinSource6) || \
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95 ((PINSOURCE) == EXTI_PinSource7) || \
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96 ((PINSOURCE) == EXTI_PinSource8) || \
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97 ((PINSOURCE) == EXTI_PinSource9) || \
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98 ((PINSOURCE) == EXTI_PinSource10) || \
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99 ((PINSOURCE) == EXTI_PinSource11) || \
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100 ((PINSOURCE) == EXTI_PinSource12) || \
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101 ((PINSOURCE) == EXTI_PinSource13) || \
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102 ((PINSOURCE) == EXTI_PinSource14) || \
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103 ((PINSOURCE) == EXTI_PinSource15))
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108 /** @defgroup SYSCFG_Memory_Remap_Config
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111 #define SYSCFG_MemoryRemap_Flash ((uint8_t)0x00)
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112 #define SYSCFG_MemoryRemap_SystemFlash ((uint8_t)0x01)
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113 #define SYSCFG_MemoryRemap_SRAM ((uint8_t)0x03)
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115 #define IS_SYSCFG_MEMORY_REMAP_CONFING(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \
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116 ((REMAP) == SYSCFG_MemoryRemap_SystemFlash) || \
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117 ((REMAP) == SYSCFG_MemoryRemap_SRAM))
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123 /** @defgroup RI_Resistor
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127 #define RI_Resistor_10KPU COMP_CSR_10KPU
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128 #define RI_Resistor_400KPU COMP_CSR_400KPU
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129 #define RI_Resistor_10KPD COMP_CSR_10KPD
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130 #define RI_Resistor_400KPD COMP_CSR_400KPD
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132 #define IS_RI_RESISTOR(RESISTOR) (((RESISTOR) == COMP_CSR_10KPU) || \
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133 ((RESISTOR) == COMP_CSR_400KPU) || \
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134 ((RESISTOR) == COMP_CSR_10KPD) || \
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135 ((RESISTOR) == COMP_CSR_400KPD))
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141 /** @defgroup RI_InputCapture
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145 #define RI_InputCapture_IC1 RI_ICR_IC1 /*!< Input Capture 1 */
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146 #define RI_InputCapture_IC2 RI_ICR_IC2 /*!< Input Capture 2 */
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147 #define RI_InputCapture_IC3 RI_ICR_IC3 /*!< Input Capture 3 */
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148 #define RI_InputCapture_IC4 RI_ICR_IC4 /*!< Input Capture 4 */
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150 #define IS_RI_INPUTCAPTURE(INPUTCAPTURE) ((((INPUTCAPTURE) & (uint32_t)0xFFC2FFFF) == 0x00) && ((INPUTCAPTURE) != (uint32_t)0x00))
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155 /** @defgroup TIM_Select
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159 #define TIM_Select_None ((uint32_t)0x00000000) /*!< None selected */
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160 #define TIM_Select_TIM2 ((uint32_t)0x00010000) /*!< Timer 2 selected */
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161 #define TIM_Select_TIM3 ((uint32_t)0x00020000) /*!< Timer 3 selected */
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162 #define TIM_Select_TIM4 ((uint32_t)0x00030000) /*!< Timer 4 selected */
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164 #define IS_RI_TIM(TIM) (((TIM) == TIM_Select_None) || \
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165 ((TIM) == TIM_Select_TIM2) || \
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166 ((TIM) == TIM_Select_TIM3) || \
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167 ((TIM) == TIM_Select_TIM4))
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173 /** @defgroup RI_InputCaptureRouting
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176 /* TIMx_IC1 TIMx_IC2 TIMx_IC3 TIMx_IC4 */
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177 #define RI_InputCaptureRouting_0 ((uint32_t)0x00000000) /* PA0 PA1 PA2 PA3 */
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178 #define RI_InputCaptureRouting_1 ((uint32_t)0x00000001) /* PA4 PA5 PA6 PA7 */
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179 #define RI_InputCaptureRouting_2 ((uint32_t)0x00000002) /* PA8 PA9 PA10 PA11 */
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180 #define RI_InputCaptureRouting_3 ((uint32_t)0x00000003) /* PA12 PA13 PA14 PA15 */
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181 #define RI_InputCaptureRouting_4 ((uint32_t)0x00000004) /* PC0 PC1 PC2 PC3 */
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182 #define RI_InputCaptureRouting_5 ((uint32_t)0x00000005) /* PC4 PC5 PC6 PC7 */
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183 #define RI_InputCaptureRouting_6 ((uint32_t)0x00000006) /* PC8 PC9 PC10 PC11 */
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184 #define RI_InputCaptureRouting_7 ((uint32_t)0x00000007) /* PC12 PC13 PC14 PC15 */
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185 #define RI_InputCaptureRouting_8 ((uint32_t)0x00000008) /* PD0 PD1 PD2 PD3 */
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186 #define RI_InputCaptureRouting_9 ((uint32_t)0x00000009) /* PD4 PD5 PD6 PD7 */
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187 #define RI_InputCaptureRouting_10 ((uint32_t)0x0000000A) /* PD8 PD9 PD10 PD11 */
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188 #define RI_InputCaptureRouting_11 ((uint32_t)0x0000000B) /* PD12 PD13 PD14 PD15 */
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189 #define RI_InputCaptureRouting_12 ((uint32_t)0x0000000C) /* PE0 PE1 PE2 PE3 */
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190 #define RI_InputCaptureRouting_13 ((uint32_t)0x0000000D) /* PE4 PE5 PE6 PE7 */
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191 #define RI_InputCaptureRouting_14 ((uint32_t)0x0000000E) /* PE8 PE9 PE10 PE11 */
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192 #define RI_InputCaptureRouting_15 ((uint32_t)0x0000000F) /* PE12 PE13 PE14 PE15 */
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194 #define IS_RI_INPUTCAPTURE_ROUTING(ROUTING) (((ROUTING) == RI_InputCaptureRouting_0) || \
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195 ((ROUTING) == RI_InputCaptureRouting_1) || \
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196 ((ROUTING) == RI_InputCaptureRouting_2) || \
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197 ((ROUTING) == RI_InputCaptureRouting_3) || \
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198 ((ROUTING) == RI_InputCaptureRouting_4) || \
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199 ((ROUTING) == RI_InputCaptureRouting_5) || \
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200 ((ROUTING) == RI_InputCaptureRouting_6) || \
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201 ((ROUTING) == RI_InputCaptureRouting_7) || \
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202 ((ROUTING) == RI_InputCaptureRouting_8) || \
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203 ((ROUTING) == RI_InputCaptureRouting_9) || \
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204 ((ROUTING) == RI_InputCaptureRouting_10) || \
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205 ((ROUTING) == RI_InputCaptureRouting_11) || \
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206 ((ROUTING) == RI_InputCaptureRouting_12) || \
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207 ((ROUTING) == RI_InputCaptureRouting_13) || \
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208 ((ROUTING) == RI_InputCaptureRouting_14) || \
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209 ((ROUTING) == RI_InputCaptureRouting_15))
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215 /** @defgroup RI_IOSwitch
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219 /* ASCR1 I/O switch: bit 31 is set to '1' to indicate that the mask is in ASCR1 register */
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220 #define RI_IOSwitch_CH0 ((uint32_t)0x80000001)
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221 #define RI_IOSwitch_CH1 ((uint32_t)0x80000002)
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222 #define RI_IOSwitch_CH2 ((uint32_t)0x80000004)
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223 #define RI_IOSwitch_CH3 ((uint32_t)0x80000008)
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224 #define RI_IOSwitch_CH4 ((uint32_t)0x80000010)
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225 #define RI_IOSwitch_CH5 ((uint32_t)0x80000020)
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226 #define RI_IOSwitch_CH6 ((uint32_t)0x80000040)
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227 #define RI_IOSwitch_CH7 ((uint32_t)0x80000080)
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228 #define RI_IOSwitch_CH8 ((uint32_t)0x80000100)
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229 #define RI_IOSwitch_CH9 ((uint32_t)0x80000200)
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230 #define RI_IOSwitch_CH10 ((uint32_t)0x80000400)
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231 #define RI_IOSwitch_CH11 ((uint32_t)0x80000800)
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232 #define RI_IOSwitch_CH12 ((uint32_t)0x80001000)
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233 #define RI_IOSwitch_CH13 ((uint32_t)0x80002000)
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234 #define RI_IOSwitch_CH14 ((uint32_t)0x80004000)
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235 #define RI_IOSwitch_CH15 ((uint32_t)0x80008000)
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236 #define RI_IOSwitch_CH18 ((uint32_t)0x80040000)
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237 #define RI_IOSwitch_CH19 ((uint32_t)0x80080000)
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238 #define RI_IOSwitch_CH20 ((uint32_t)0x80100000)
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239 #define RI_IOSwitch_CH21 ((uint32_t)0x80200000)
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240 #define RI_IOSwitch_CH22 ((uint32_t)0x80400000)
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241 #define RI_IOSwitch_CH23 ((uint32_t)0x80800000)
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242 #define RI_IOSwitch_CH24 ((uint32_t)0x81000000)
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243 #define RI_IOSwitch_CH25 ((uint32_t)0x82000000)
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244 #define RI_IOSwitch_VCOMP ((uint32_t)0x84000000) /* VCOMP is an internal switch used to connect
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245 selected channel to COMP1 non inverting input */
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247 /* ASCR2 IO switch: bit 31 is set to '0' to indicate that the mask is in ASCR2 register */
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248 #define RI_IOSwitch_GR10_1 ((uint32_t)0x00000001)
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249 #define RI_IOSwitch_GR10_2 ((uint32_t)0x00000002)
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250 #define RI_IOSwitch_GR10_3 ((uint32_t)0x00000004)
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251 #define RI_IOSwitch_GR10_4 ((uint32_t)0x00000008)
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252 #define RI_IOSwitch_GR6_1 ((uint32_t)0x00000010)
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253 #define RI_IOSwitch_GR6_2 ((uint32_t)0x00000020)
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254 #define RI_IOSwitch_GR5_1 ((uint32_t)0x00000040)
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255 #define RI_IOSwitch_GR5_2 ((uint32_t)0x00000080)
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256 #define RI_IOSwitch_GR5_3 ((uint32_t)0x00000100)
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257 #define RI_IOSwitch_GR4_1 ((uint32_t)0x00000200)
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258 #define RI_IOSwitch_GR4_2 ((uint32_t)0x00000400)
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259 #define RI_IOSwitch_GR4_3 ((uint32_t)0x00000800)
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261 #define IS_RI_IOSWITCH(IOSWITCH) (((IOSWITCH) == RI_IOSwitch_CH0) || \
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262 ((IOSWITCH) == RI_IOSwitch_CH1) || \
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263 ((IOSWITCH) == RI_IOSwitch_CH2) || \
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264 ((IOSWITCH) == RI_IOSwitch_CH3) || \
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265 ((IOSWITCH) == RI_IOSwitch_CH4) || \
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266 ((IOSWITCH) == RI_IOSwitch_CH5) || \
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267 ((IOSWITCH) == RI_IOSwitch_CH6) || \
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268 ((IOSWITCH) == RI_IOSwitch_CH7) || \
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269 ((IOSWITCH) == RI_IOSwitch_CH8) || \
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270 ((IOSWITCH) == RI_IOSwitch_CH9) || \
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271 ((IOSWITCH) == RI_IOSwitch_CH10) || \
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272 ((IOSWITCH) == RI_IOSwitch_CH11) || \
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273 ((IOSWITCH) == RI_IOSwitch_CH12) || \
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274 ((IOSWITCH) == RI_IOSwitch_CH13) || \
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275 ((IOSWITCH) == RI_IOSwitch_CH14) || \
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276 ((IOSWITCH) == RI_IOSwitch_CH15) || \
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277 ((IOSWITCH) == RI_IOSwitch_CH18) || \
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278 ((IOSWITCH) == RI_IOSwitch_CH19) || \
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279 ((IOSWITCH) == RI_IOSwitch_CH20) || \
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280 ((IOSWITCH) == RI_IOSwitch_CH21) || \
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281 ((IOSWITCH) == RI_IOSwitch_CH22) || \
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282 ((IOSWITCH) == RI_IOSwitch_CH23) || \
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283 ((IOSWITCH) == RI_IOSwitch_CH24) || \
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284 ((IOSWITCH) == RI_IOSwitch_CH25) || \
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285 ((IOSWITCH) == RI_IOSwitch_VCOMP) || \
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286 ((IOSWITCH) == RI_IOSwitch_GR10_1) || \
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287 ((IOSWITCH) == RI_IOSwitch_GR10_2) || \
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288 ((IOSWITCH) == RI_IOSwitch_GR10_3) || \
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289 ((IOSWITCH) == RI_IOSwitch_GR10_4) || \
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290 ((IOSWITCH) == RI_IOSwitch_GR6_1) || \
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291 ((IOSWITCH) == RI_IOSwitch_GR6_2) || \
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292 ((IOSWITCH) == RI_IOSwitch_GR5_1) || \
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293 ((IOSWITCH) == RI_IOSwitch_GR5_2) || \
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294 ((IOSWITCH) == RI_IOSwitch_GR5_3) || \
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295 ((IOSWITCH) == RI_IOSwitch_GR4_1) || \
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296 ((IOSWITCH) == RI_IOSwitch_GR4_2) || \
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297 ((IOSWITCH) == RI_IOSwitch_GR4_3))
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303 /** @defgroup RI_Port
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307 #define RI_PortA ((uint8_t)0x01) /*!< GPIOA selected */
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308 #define RI_PortB ((uint8_t)0x02) /*!< GPIOB selected */
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309 #define RI_PortC ((uint8_t)0x03) /*!< GPIOC selected */
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310 #define RI_PortD ((uint8_t)0x04) /*!< GPIOD selected */
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311 #define RI_PortE ((uint8_t)0x05) /*!< GPIOE selected */
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313 #define IS_RI_PORT(PORT) (((PORT) == RI_PortA) || \
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314 ((PORT) == RI_PortB) || \
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315 ((PORT) == RI_PortC) || \
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316 ((PORT) == RI_PortD) || \
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317 ((PORT) == RI_PortE))
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322 /** @defgroup RI_Pin define
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325 #define RI_Pin_0 ((uint16_t)0x0001) /*!< Pin 0 selected */
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326 #define RI_Pin_1 ((uint16_t)0x0002) /*!< Pin 1 selected */
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327 #define RI_Pin_2 ((uint16_t)0x0004) /*!< Pin 2 selected */
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328 #define RI_Pin_3 ((uint16_t)0x0008) /*!< Pin 3 selected */
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329 #define RI_Pin_4 ((uint16_t)0x0010) /*!< Pin 4 selected */
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330 #define RI_Pin_5 ((uint16_t)0x0020) /*!< Pin 5 selected */
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331 #define RI_Pin_6 ((uint16_t)0x0040) /*!< Pin 6 selected */
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332 #define RI_Pin_7 ((uint16_t)0x0080) /*!< Pin 7 selected */
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333 #define RI_Pin_8 ((uint16_t)0x0100) /*!< Pin 8 selected */
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334 #define RI_Pin_9 ((uint16_t)0x0200) /*!< Pin 9 selected */
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335 #define RI_Pin_10 ((uint16_t)0x0400) /*!< Pin 10 selected */
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336 #define RI_Pin_11 ((uint16_t)0x0800) /*!< Pin 11 selected */
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337 #define RI_Pin_12 ((uint16_t)0x1000) /*!< Pin 12 selected */
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338 #define RI_Pin_13 ((uint16_t)0x2000) /*!< Pin 13 selected */
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339 #define RI_Pin_14 ((uint16_t)0x4000) /*!< Pin 14 selected */
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340 #define RI_Pin_15 ((uint16_t)0x8000) /*!< Pin 15 selected */
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341 #define RI_Pin_All ((uint16_t)0xFFFF) /*!< All pins selected */
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343 #define IS_RI_PIN(PIN) ((PIN) != (uint16_t)0x00)
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353 /* Exported macro ------------------------------------------------------------*/
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354 /* Exported functions ------------------------------------------------------- */
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356 /* Function used to set the RTC configuration to the default reset state *****/
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357 void SYSCFG_DeInit(void);
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358 void SYSCFG_RIDeInit(void);
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360 /* SYSCFG Initialization and Configuration functions **************************/
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361 void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap);
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362 void SYSCFG_USBPuCmd(FunctionalState NewState);
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363 void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex);
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365 /* RI Initialization and Configuration functions ******************************/
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366 void SYSCFG_RITIMSelect(uint32_t TIM_Select);
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367 void SYSCFG_RITIMInputCaptureConfig(uint32_t RI_InputCapture, uint32_t RI_InputCaptureRouting);
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368 void SYSCFG_RIResistorConfig(uint32_t RI_Resistor, FunctionalState NewState);
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369 void SYSCFG_RISwitchControlModeCmd(FunctionalState NewState);
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370 void SYSCFG_RIIOSwitchConfig(uint32_t RI_IOSwitch, FunctionalState NewState);
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371 void SYSCFG_RIHysteresisConfig(uint8_t RI_Port, uint16_t RI_Pin,
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372 FunctionalState NewState);
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377 #endif /*__STM32L1xx_SYSCFG_H */
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387 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
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