2 ******************************************************************************
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3 * @file stm32l1xx_spi.h
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4 * @author MCD Application Team
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6 * @date 31-December-2010
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7 * @brief This file contains all the functions prototypes for the SPI
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9 ******************************************************************************
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12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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19 * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
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20 ******************************************************************************
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23 /* Define to prevent recursive inclusion -------------------------------------*/
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24 #ifndef __STM32L1xx_SPI_H
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25 #define __STM32L1xx_SPI_H
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31 /* Includes ------------------------------------------------------------------*/
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32 #include "stm32l1xx.h"
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34 /** @addtogroup STM32L1xx_StdPeriph_Driver
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42 /* Exported types ------------------------------------------------------------*/
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45 * @brief SPI Init structure definition
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50 uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
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51 This parameter can be any combination of @ref SPI_data_direction */
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53 uint16_t SPI_Mode; /*!< Specifies the SPI operating mode.
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54 This parameter can be any combination of @ref SPI_mode */
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56 uint16_t SPI_DataSize; /*!< Specifies the SPI data size.
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57 This parameter can be any combination of @ref SPI_data_size */
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59 uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state.
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60 This parameter can be any combination of @ref SPI_Clock_Polarity */
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62 uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.
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63 This parameter can be any combination of @ref SPI_Clock_Phase */
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65 uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by
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66 hardware (NSS pin) or by software using the SSI bit.
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67 This parameter can be any combination of @ref SPI_Slave_Select_management */
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69 uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
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70 used to configure the transmit and receive SCK clock.
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71 This parameter can be any combination of @ref SPI_BaudRate_Prescaler.
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72 @note The communication clock is derived from the master
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73 clock. The slave clock does not need to be set. */
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75 uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
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76 This parameter can be any combination of @ref SPI_MSB_LSB_transmission */
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78 uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */
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81 /* Exported constants --------------------------------------------------------*/
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83 /** @defgroup SPI_Exported_Constants
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87 #define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
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90 /** @defgroup SPI_data_direction
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94 #define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
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95 #define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
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96 #define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
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97 #define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
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98 #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
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99 ((MODE) == SPI_Direction_2Lines_RxOnly) || \
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100 ((MODE) == SPI_Direction_1Line_Rx) || \
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101 ((MODE) == SPI_Direction_1Line_Tx))
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106 /** @defgroup SPI_mode
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110 #define SPI_Mode_Master ((uint16_t)0x0104)
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111 #define SPI_Mode_Slave ((uint16_t)0x0000)
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112 #define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
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113 ((MODE) == SPI_Mode_Slave))
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118 /** @defgroup SPI_data_size
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122 #define SPI_DataSize_16b ((uint16_t)0x0800)
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123 #define SPI_DataSize_8b ((uint16_t)0x0000)
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124 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
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125 ((DATASIZE) == SPI_DataSize_8b))
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130 /** @defgroup SPI_Clock_Polarity
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134 #define SPI_CPOL_Low ((uint16_t)0x0000)
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135 #define SPI_CPOL_High ((uint16_t)0x0002)
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136 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
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137 ((CPOL) == SPI_CPOL_High))
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142 /** @defgroup SPI_Clock_Phase
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146 #define SPI_CPHA_1Edge ((uint16_t)0x0000)
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147 #define SPI_CPHA_2Edge ((uint16_t)0x0001)
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148 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
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149 ((CPHA) == SPI_CPHA_2Edge))
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154 /** @defgroup SPI_Slave_Select_management
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158 #define SPI_NSS_Soft ((uint16_t)0x0200)
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159 #define SPI_NSS_Hard ((uint16_t)0x0000)
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160 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
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161 ((NSS) == SPI_NSS_Hard))
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166 /** @defgroup SPI_BaudRate_Prescaler
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170 #define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
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171 #define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
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172 #define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
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173 #define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
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174 #define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
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175 #define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
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176 #define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
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177 #define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
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178 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
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179 ((PRESCALER) == SPI_BaudRatePrescaler_4) || \
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180 ((PRESCALER) == SPI_BaudRatePrescaler_8) || \
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181 ((PRESCALER) == SPI_BaudRatePrescaler_16) || \
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182 ((PRESCALER) == SPI_BaudRatePrescaler_32) || \
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183 ((PRESCALER) == SPI_BaudRatePrescaler_64) || \
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184 ((PRESCALER) == SPI_BaudRatePrescaler_128) || \
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185 ((PRESCALER) == SPI_BaudRatePrescaler_256))
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190 /** @defgroup SPI_MSB_LSB_transmission
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194 #define SPI_FirstBit_MSB ((uint16_t)0x0000)
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195 #define SPI_FirstBit_LSB ((uint16_t)0x0080)
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196 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
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197 ((BIT) == SPI_FirstBit_LSB))
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202 /** @defgroup SPI_I2S_DMA_transfer_requests
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206 #define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)
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207 #define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)
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208 #define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
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213 /** @defgroup SPI_NSS_internal_software_management
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217 #define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
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218 #define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
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219 #define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
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220 ((INTERNAL) == SPI_NSSInternalSoft_Reset))
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225 /** @defgroup SPI_CRC_Transmit_Receive
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229 #define SPI_CRC_Tx ((uint8_t)0x00)
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230 #define SPI_CRC_Rx ((uint8_t)0x01)
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231 #define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
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236 /** @defgroup SPI_direction_transmit_receive
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240 #define SPI_Direction_Rx ((uint16_t)0xBFFF)
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241 #define SPI_Direction_Tx ((uint16_t)0x4000)
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242 #define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
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243 ((DIRECTION) == SPI_Direction_Tx))
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248 /** @defgroup SPI_I2S_interrupts_definition
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252 #define SPI_I2S_IT_TXE ((uint8_t)0x71)
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253 #define SPI_I2S_IT_RXNE ((uint8_t)0x60)
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254 #define SPI_I2S_IT_ERR ((uint8_t)0x50)
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255 #define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
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256 ((IT) == SPI_I2S_IT_RXNE) || \
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257 ((IT) == SPI_I2S_IT_ERR))
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259 #define SPI_I2S_IT_OVR ((uint8_t)0x56)
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260 #define SPI_IT_MODF ((uint8_t)0x55)
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261 #define SPI_IT_CRCERR ((uint8_t)0x54)
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263 #define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
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265 #define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \
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266 ((IT) == SPI_IT_CRCERR) || ((IT) == SPI_IT_MODF) || \
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267 ((IT) == SPI_I2S_IT_OVR))
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272 /** @defgroup SPI_I2S_flags_definition
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276 #define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
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277 #define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
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278 #define SPI_FLAG_CRCERR ((uint16_t)0x0010)
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279 #define SPI_FLAG_MODF ((uint16_t)0x0020)
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280 #define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
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281 #define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
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282 #define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
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283 #define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
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284 ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
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285 ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE))
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290 /** @defgroup SPI_CRC_polynomial
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294 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
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299 /** @defgroup SPI_I2S_Legacy
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303 #define SPI_DMAReq_Tx SPI_I2S_DMAReq_Tx
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304 #define SPI_DMAReq_Rx SPI_I2S_DMAReq_Rx
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305 #define SPI_IT_TXE SPI_I2S_IT_TXE
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306 #define SPI_IT_RXNE SPI_I2S_IT_RXNE
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307 #define SPI_IT_ERR SPI_I2S_IT_ERR
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308 #define SPI_IT_OVR SPI_I2S_IT_OVR
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309 #define SPI_FLAG_RXNE SPI_I2S_FLAG_RXNE
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310 #define SPI_FLAG_TXE SPI_I2S_FLAG_TXE
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311 #define SPI_FLAG_OVR SPI_I2S_FLAG_OVR
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312 #define SPI_FLAG_BSY SPI_I2S_FLAG_BSY
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313 #define SPI_DeInit SPI_I2S_DeInit
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314 #define SPI_ITConfig SPI_I2S_ITConfig
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315 #define SPI_DMACmd SPI_I2S_DMACmd
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316 #define SPI_SendData SPI_I2S_SendData
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317 #define SPI_ReceiveData SPI_I2S_ReceiveData
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318 #define SPI_GetFlagStatus SPI_I2S_GetFlagStatus
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319 #define SPI_ClearFlag SPI_I2S_ClearFlag
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320 #define SPI_GetITStatus SPI_I2S_GetITStatus
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321 #define SPI_ClearITPendingBit SPI_I2S_ClearITPendingBit
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330 /* Exported macro ------------------------------------------------------------*/
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331 /* Exported functions ------------------------------------------------------- */
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333 /* Function used to set the SPI configuration to the default reset state *****/
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334 void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
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336 /* Initialization and Configuration functions *********************************/
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337 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
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338 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
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339 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
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340 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
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341 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
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342 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
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343 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
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345 /* Data transfers functions ***************************************************/
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346 void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
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347 uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
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349 /* Hardware CRC Calculation functions *****************************************/
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350 void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
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351 void SPI_TransmitCRC(SPI_TypeDef* SPIx);
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352 uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
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353 uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
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355 /* DMA transfers management functions *****************************************/
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356 void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
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358 /* Interrupts and flags management functions **********************************/
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359 void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
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360 FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
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361 void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
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362 ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
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363 void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
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369 #endif /*__STM32L1xx_SPI_H */
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379 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
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