2 ******************************************************************************
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3 * @file stm32l1xx_adc.h
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4 * @author MCD Application Team
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6 * @date 31-December-2010
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7 * @brief This file contains all the functions prototypes for the ADC firmware
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9 ******************************************************************************
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12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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19 * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
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20 ******************************************************************************
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23 /* Define to prevent recursive inclusion -------------------------------------*/
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24 #ifndef __STM32L1xx_ADC_H
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25 #define __STM32L1xx_ADC_H
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31 /* Includes ------------------------------------------------------------------*/
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32 #include "stm32l1xx.h"
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34 /** @addtogroup STM32L1xx_StdPeriph_Driver
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42 /* Exported types ------------------------------------------------------------*/
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45 * @brief ADC Init structure definition
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50 uint32_t ADC_Resolution; /*!< Selects the resolution of the conversion.
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51 This parameter can be a value of @ref ADC_Resolution */
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53 FunctionalState ADC_ScanConvMode; /*!< Specifies whether the conversion is performed in
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54 Scan (multichannel) or Single (one channel) mode.
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55 This parameter can be set to ENABLE or DISABLE */
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57 FunctionalState ADC_ContinuousConvMode; /*!< Specifies whether the conversion is performed in
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58 Continuous or Single mode.
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59 This parameter can be set to ENABLE or DISABLE. */
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61 uint32_t ADC_ExternalTrigConvEdge; /*!< Selects the external trigger Edge and enables the
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62 trigger of a regular group. This parameter can be a value
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63 of @ref ADC_external_trigger_edge_for_regular_channels_conversion */
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65 uint32_t ADC_ExternalTrigConv; /*!< Defines the external trigger used to start the analog
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66 to digital conversion of regular channels. This parameter
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67 can be a value of @ref ADC_external_trigger_sources_for_regular_channels_conversion */
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69 uint32_t ADC_DataAlign; /*!< Specifies whether the ADC data alignment is left or right.
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70 This parameter can be a value of @ref ADC_data_align */
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72 uint8_t ADC_NbrOfConversion; /*!< Specifies the number of ADC conversions that will be done
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73 using the sequencer for regular channel group.
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74 This parameter must range from 1 to 27. */
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79 uint32_t ADC_Prescaler; /*!< Selects the ADC prescaler.
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80 This parameter can be a value
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81 of @ref ADC_Prescaler */
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82 }ADC_CommonInitTypeDef;
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84 /* Exported constants --------------------------------------------------------*/
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86 /** @defgroup ADC_Exported_Constants
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89 #define IS_ADC_ALL_PERIPH(PERIPH) ((PERIPH) == ADC1)
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90 #define IS_ADC_DMA_PERIPH(PERIPH) ((PERIPH) == ADC1)
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92 /** @defgroup ADC_Power_down_during_Idle_and_or_Delay_phase
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95 #define ADC_PowerDown_Delay ((uint32_t)0x00010000)
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96 #define ADC_PowerDown_Idle ((uint32_t)0x00020000)
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97 #define ADC_PowerDown_Idle_Delay ((uint32_t)0x00030000)
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99 #define IS_ADC_POWER_DOWN(DWON) (((DWON) == ADC_PowerDown_Delay) || \
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100 ((DWON) == ADC_PowerDown_Idle) || \
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101 ((DWON) == ADC_PowerDown_Idle_Delay))
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107 /** @defgroup ADC_Prescaler
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110 #define ADC_Prescaler_Div1 ((uint32_t)0x00000000)
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111 #define ADC_Prescaler_Div2 ((uint32_t)0x00010000)
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112 #define ADC_Prescaler_Div4 ((uint32_t)0x00020000)
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114 #define IS_ADC_PRESCALER(PRESCALER) (((PRESCALER) == ADC_Prescaler_Div1) || \
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115 ((PRESCALER) == ADC_Prescaler_Div2) || \
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116 ((PRESCALER) == ADC_Prescaler_Div4))
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123 /** @defgroup ADC_resolution
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126 #define ADC_Resolution_12b ((uint32_t)0x00000000)
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127 #define ADC_Resolution_10b ((uint32_t)0x01000000)
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128 #define ADC_Resolution_8b ((uint32_t)0x02000000)
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129 #define ADC_Resolution_6b ((uint32_t)0x03000000)
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131 #define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_Resolution_12b) || \
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132 ((RESOLUTION) == ADC_Resolution_10b) || \
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133 ((RESOLUTION) == ADC_Resolution_8b) || \
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134 ((RESOLUTION) == ADC_Resolution_6b))
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140 /** @defgroup ADC_external_trigger_edge_for_regular_channels_conversion
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143 #define ADC_ExternalTrigConvEdge_None ((uint32_t)0x00000000)
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144 #define ADC_ExternalTrigConvEdge_Rising ((uint32_t)0x10000000)
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145 #define ADC_ExternalTrigConvEdge_Falling ((uint32_t)0x20000000)
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146 #define ADC_ExternalTrigConvEdge_RisingFalling ((uint32_t)0x30000000)
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148 #define IS_ADC_EXT_TRIG_EDGE(EDGE) (((EDGE) == ADC_ExternalTrigConvEdge_None) || \
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149 ((EDGE) == ADC_ExternalTrigConvEdge_Rising) || \
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150 ((EDGE) == ADC_ExternalTrigConvEdge_Falling) || \
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151 ((EDGE) == ADC_ExternalTrigConvEdge_RisingFalling))
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156 /** @defgroup ADC_external_trigger_sources_for_regular_channels_conversion
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161 #define ADC_ExternalTrigConv_T2_CC3 ((uint32_t)0x02000000)
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162 #define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x03000000)
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163 #define ADC_ExternalTrigConv_T2_TRGO ((uint32_t)0x06000000)
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166 #define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x07000000)
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167 #define ADC_ExternalTrigConv_T3_CC3 ((uint32_t)0x08000000)
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168 #define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x04000000)
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171 #define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x05000000)
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172 #define ADC_ExternalTrigConv_T4_TRGO ((uint32_t)0x09000000)
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175 #define ADC_ExternalTrigConv_T6_TRGO ((uint32_t)0x0A000000)
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178 #define ADC_ExternalTrigConv_T9_CC2 ((uint32_t)0x00000000)
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179 #define ADC_ExternalTrigConv_T9_TRGO ((uint32_t)0x01000000)
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182 #define ADC_ExternalTrigConv_Ext_IT11 ((uint32_t)0x0F000000)
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184 #define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T9_CC2) || \
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185 ((REGTRIG) == ADC_ExternalTrigConv_T9_TRGO) || \
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186 ((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \
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187 ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \
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188 ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \
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189 ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \
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190 ((REGTRIG) == ADC_ExternalTrigConv_T2_TRGO) || \
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191 ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \
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192 ((REGTRIG) == ADC_ExternalTrigConv_T3_CC3) || \
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193 ((REGTRIG) == ADC_ExternalTrigConv_T4_TRGO) || \
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194 ((REGTRIG) == ADC_ExternalTrigConv_T6_TRGO) || \
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195 ((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11))
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200 /** @defgroup ADC_data_align
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204 #define ADC_DataAlign_Right ((uint32_t)0x00000000)
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205 #define ADC_DataAlign_Left ((uint32_t)0x00000800)
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207 #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \
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208 ((ALIGN) == ADC_DataAlign_Left))
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213 /** @defgroup ADC_channels
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217 #define ADC_Channel_0 ((uint8_t)0x00)
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218 #define ADC_Channel_1 ((uint8_t)0x01)
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219 #define ADC_Channel_2 ((uint8_t)0x02)
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220 #define ADC_Channel_3 ((uint8_t)0x03)
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221 #define ADC_Channel_4 ((uint8_t)0x04)
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222 #define ADC_Channel_5 ((uint8_t)0x05)
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223 #define ADC_Channel_6 ((uint8_t)0x06)
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224 #define ADC_Channel_7 ((uint8_t)0x07)
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225 #define ADC_Channel_8 ((uint8_t)0x08)
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226 #define ADC_Channel_9 ((uint8_t)0x09)
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227 #define ADC_Channel_10 ((uint8_t)0x0A)
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228 #define ADC_Channel_11 ((uint8_t)0x0B)
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229 #define ADC_Channel_12 ((uint8_t)0x0C)
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230 #define ADC_Channel_13 ((uint8_t)0x0D)
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231 #define ADC_Channel_14 ((uint8_t)0x0E)
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232 #define ADC_Channel_15 ((uint8_t)0x0F)
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233 #define ADC_Channel_16 ((uint8_t)0x10)
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234 #define ADC_Channel_17 ((uint8_t)0x11)
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235 #define ADC_Channel_18 ((uint8_t)0x12)
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236 #define ADC_Channel_19 ((uint8_t)0x13)
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237 #define ADC_Channel_20 ((uint8_t)0x14)
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238 #define ADC_Channel_21 ((uint8_t)0x15)
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239 #define ADC_Channel_22 ((uint8_t)0x16)
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240 #define ADC_Channel_23 ((uint8_t)0x17)
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241 #define ADC_Channel_24 ((uint8_t)0x18)
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242 #define ADC_Channel_25 ((uint8_t)0x19)
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244 #define ADC_Channel_TempSensor ((uint8_t)ADC_Channel_16)
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245 #define ADC_Channel_Vrefint ((uint8_t)ADC_Channel_17)
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249 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \
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250 ((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \
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251 ((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \
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252 ((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \
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253 ((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_9) || \
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254 ((CHANNEL) == ADC_Channel_10) || ((CHANNEL) == ADC_Channel_11) || \
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255 ((CHANNEL) == ADC_Channel_12) || ((CHANNEL) == ADC_Channel_13) || \
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256 ((CHANNEL) == ADC_Channel_14) || ((CHANNEL) == ADC_Channel_15) || \
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257 ((CHANNEL) == ADC_Channel_16) || ((CHANNEL) == ADC_Channel_17) || \
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258 ((CHANNEL) == ADC_Channel_18) || ((CHANNEL) == ADC_Channel_19) || \
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259 ((CHANNEL) == ADC_Channel_20) || ((CHANNEL) == ADC_Channel_21) || \
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260 ((CHANNEL) == ADC_Channel_22) || ((CHANNEL) == ADC_Channel_23) || \
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261 ((CHANNEL) == ADC_Channel_24) || ((CHANNEL) == ADC_Channel_25) )
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266 /** @defgroup ADC_sampling_times
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270 #define ADC_SampleTime_4Cycles ((uint8_t)0x00)
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271 #define ADC_SampleTime_9Cycles ((uint8_t)0x01)
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272 #define ADC_SampleTime_16Cycles ((uint8_t)0x02)
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273 #define ADC_SampleTime_24Cycles ((uint8_t)0x03)
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274 #define ADC_SampleTime_48Cycles ((uint8_t)0x04)
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275 #define ADC_SampleTime_96Cycles ((uint8_t)0x05)
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276 #define ADC_SampleTime_192Cycles ((uint8_t)0x06)
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277 #define ADC_SampleTime_384Cycles ((uint8_t)0x07)
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279 #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_4Cycles) || \
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280 ((TIME) == ADC_SampleTime_9Cycles) || \
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281 ((TIME) == ADC_SampleTime_16Cycles) || \
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282 ((TIME) == ADC_SampleTime_24Cycles) || \
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283 ((TIME) == ADC_SampleTime_48Cycles) || \
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284 ((TIME) == ADC_SampleTime_96Cycles) || \
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285 ((TIME) == ADC_SampleTime_192Cycles) || \
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286 ((TIME) == ADC_SampleTime_384Cycles))
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291 /** @defgroup ADC_Delay_length
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295 #define ADC_DelayLength_None ((uint8_t)0x00)
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296 #define ADC_DelayLength_Freeze ((uint8_t)0x10)
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297 #define ADC_DelayLength_7Cycles ((uint8_t)0x20)
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298 #define ADC_DelayLength_15Cycles ((uint8_t)0x30)
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299 #define ADC_DelayLength_31Cycles ((uint8_t)0x40)
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300 #define ADC_DelayLength_63Cycles ((uint8_t)0x50)
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301 #define ADC_DelayLength_127Cycles ((uint8_t)0x60)
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302 #define ADC_DelayLength_255Cycles ((uint8_t)0x70)
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304 #define IS_ADC_DELAY_LENGTH(LENGTH) (((LENGTH) == ADC_DelayLength_None) || \
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305 ((LENGTH) == ADC_DelayLength_Freeze) || \
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306 ((LENGTH) == ADC_DelayLength_7Cycles) || \
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307 ((LENGTH) == ADC_DelayLength_15Cycles) || \
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308 ((LENGTH) == ADC_DelayLength_31Cycles) || \
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309 ((LENGTH) == ADC_DelayLength_63Cycles) || \
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310 ((LENGTH) == ADC_DelayLength_127Cycles) || \
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311 ((LENGTH) == ADC_DelayLength_255Cycles))
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317 /** @defgroup ADC_external_trigger_edge_for_injected_channels_conversion
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320 #define ADC_ExternalTrigInjecConvEdge_None ((uint32_t)0x00000000)
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321 #define ADC_ExternalTrigInjecConvEdge_Rising ((uint32_t)0x00100000)
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322 #define ADC_ExternalTrigInjecConvEdge_Falling ((uint32_t)0x00200000)
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323 #define ADC_ExternalTrigInjecConvEdge_RisingFalling ((uint32_t)0x00300000)
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325 #define IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == ADC_ExternalTrigInjecConvEdge_None) || \
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326 ((EDGE) == ADC_ExternalTrigInjecConvEdge_Rising) || \
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327 ((EDGE) == ADC_ExternalTrigInjecConvEdge_Falling) || \
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328 ((EDGE) == ADC_ExternalTrigInjecConvEdge_RisingFalling))
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334 /** @defgroup ADC_external_trigger_sources_for_injected_channels_conversion
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340 #define ADC_ExternalTrigInjecConv_T2_TRGO ((uint32_t)0x00020000)
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341 #define ADC_ExternalTrigInjecConv_T2_CC1 ((uint32_t)0x00030000)
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344 #define ADC_ExternalTrigInjecConv_T3_CC4 ((uint32_t)0x00040000)
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347 #define ADC_ExternalTrigInjecConv_T4_TRGO ((uint32_t)0x00050000)
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348 #define ADC_ExternalTrigInjecConv_T4_CC1 ((uint32_t)0x00060000)
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349 #define ADC_ExternalTrigInjecConv_T4_CC2 ((uint32_t)0x00070000)
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350 #define ADC_ExternalTrigInjecConv_T4_CC3 ((uint32_t)0x00080000)
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353 #define ADC_ExternalTrigInjecConv_T7_TRGO ((uint32_t)0x000A0000)
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356 #define ADC_ExternalTrigInjecConv_T9_CC1 ((uint32_t)0x00000000)
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357 #define ADC_ExternalTrigInjecConv_T9_TRGO ((uint32_t)0x00010000)
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360 #define ADC_ExternalTrigInjecConv_T10_CC1 ((uint32_t)0x00090000)
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363 #define ADC_ExternalTrigInjecConv_Ext_IT15 ((uint32_t)0x000F0000)
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365 #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T9_CC1) || \
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366 ((INJTRIG) == ADC_ExternalTrigInjecConv_T9_TRGO) || \
\r
367 ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || \
\r
368 ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || \
\r
369 ((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || \
\r
370 ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || \
\r
371 ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC1) || \
\r
372 ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC2) || \
\r
373 ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC3) || \
\r
374 ((INJTRIG) == ADC_ExternalTrigInjecConv_T10_CC1) || \
\r
375 ((INJTRIG) == ADC_ExternalTrigInjecConv_T7_TRGO) || \
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376 ((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15))
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381 /** @defgroup ADC_injected_channel_selection
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384 #define ADC_InjectedChannel_1 ((uint8_t)0x18)
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385 #define ADC_InjectedChannel_2 ((uint8_t)0x1C)
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386 #define ADC_InjectedChannel_3 ((uint8_t)0x20)
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387 #define ADC_InjectedChannel_4 ((uint8_t)0x24)
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389 #define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \
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390 ((CHANNEL) == ADC_InjectedChannel_2) || \
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391 ((CHANNEL) == ADC_InjectedChannel_3) || \
\r
392 ((CHANNEL) == ADC_InjectedChannel_4))
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397 /** @defgroup ADC_analog_watchdog_selection
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401 #define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200)
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402 #define ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200)
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403 #define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200)
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404 #define ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000)
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405 #define ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x00400000)
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406 #define ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000)
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407 #define ADC_AnalogWatchdog_None ((uint32_t)0x00000000)
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409 #define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \
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410 ((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \
\r
411 ((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \
\r
412 ((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \
\r
413 ((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \
\r
414 ((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \
\r
415 ((WATCHDOG) == ADC_AnalogWatchdog_None))
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420 /** @defgroup ADC_interrupts_definition
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424 #define ADC_IT_AWD ((uint16_t)0x0106)
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425 #define ADC_IT_EOC ((uint16_t)0x0205)
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426 #define ADC_IT_JEOC ((uint16_t)0x0407)
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427 #define ADC_IT_OVR ((uint16_t)0x201A)
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429 #define IS_ADC_IT(IT) (((IT) == ADC_IT_AWD) || ((IT) == ADC_IT_EOC) || \
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430 ((IT) == ADC_IT_JEOC)|| ((IT) == ADC_IT_OVR))
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435 /** @defgroup ADC_flags_definition
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439 #define ADC_FLAG_AWD ((uint16_t)0x0001)
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440 #define ADC_FLAG_EOC ((uint16_t)0x0002)
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441 #define ADC_FLAG_JEOC ((uint16_t)0x0004)
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442 #define ADC_FLAG_JSTRT ((uint16_t)0x0008)
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443 #define ADC_FLAG_STRT ((uint16_t)0x0010)
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444 #define ADC_FLAG_OVR ((uint16_t)0x0020)
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445 #define ADC_FLAG_ADONS ((uint16_t)0x0040)
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446 #define ADC_FLAG_RCNR ((uint16_t)0x0100)
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447 #define ADC_FLAG_JCNR ((uint16_t)0x0200)
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449 #define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFFC0) == 0x00) && ((FLAG) != 0x00))
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451 #define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC) || \
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452 ((FLAG) == ADC_FLAG_JEOC) || ((FLAG)== ADC_FLAG_JSTRT) || \
\r
453 ((FLAG) == ADC_FLAG_STRT) || ((FLAG)== ADC_FLAG_OVR) || \
\r
454 ((FLAG) == ADC_FLAG_ADONS) || ((FLAG)== ADC_FLAG_RCNR) || \
\r
455 ((FLAG) == ADC_FLAG_JCNR))
\r
460 /** @defgroup ADC_thresholds
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464 #define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF)
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470 /** @defgroup ADC_injected_offset
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474 #define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF)
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480 /** @defgroup ADC_injected_length
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484 #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4))
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490 /** @defgroup ADC_injected_rank
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494 #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4))
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500 /** @defgroup ADC_regular_length
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504 #define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 1) && ((LENGTH) <= 27))
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510 /** @defgroup ADC_regular_rank
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514 #define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x1B))
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520 /** @defgroup ADC_regular_discontinuous_mode_number
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524 #define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8))
\r
534 /* Exported macro ------------------------------------------------------------*/
\r
535 /* Exported functions ------------------------------------------------------- */
\r
537 /* Function used to set the ADC configuration to the default reset state *****/
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538 void ADC_DeInit(ADC_TypeDef* ADCx);
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540 /* Initialization and Configuration functions *********************************/
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541 void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct);
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542 void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct);
\r
543 void ADC_CommonInit(ADC_CommonInitTypeDef* ADC_CommonInitStruct);
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544 void ADC_CommonStructInit(ADC_CommonInitTypeDef* ADC_CommonInitStruct);
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545 void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
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547 /* Power saving functions *****************************************************/
\r
548 void ADC_PowerDownCmd(ADC_TypeDef* ADCx, uint32_t ADC_PowerDown, FunctionalState NewState);
\r
549 void ADC_DelaySelectionConfig(ADC_TypeDef* ADCx, uint8_t ADC_DelayLength);
\r
551 /* Analog Watchdog configuration functions ************************************/
\r
552 void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog);
\r
553 void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold,uint16_t LowThreshold);
\r
554 void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel);
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556 /* Temperature Sensor & Vrefint (Voltage Reference internal) management function */
\r
557 void ADC_TempSensorVrefintCmd(FunctionalState NewState);
\r
559 /* Regular Channels Configuration functions ***********************************/
\r
560 void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
\r
561 void ADC_SoftwareStartConv(ADC_TypeDef* ADCx);
\r
562 FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx);
\r
563 void ADC_EOCOnEachRegularChannelCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
\r
564 void ADC_ContinuousModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
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565 void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number);
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566 void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
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567 uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx);
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569 /* Regular Channels DMA Configuration functions *******************************/
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570 void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState);
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571 void ADC_DMARequestAfterLastTransferCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
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573 /* Injected channels Configuration functions **********************************/
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574 void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
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575 void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length);
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576 void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset);
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577 void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv);
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578 void ADC_ExternalTrigInjectedConvEdgeConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConvEdge);
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579 void ADC_SoftwareStartInjectedConv(ADC_TypeDef* ADCx);
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580 FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx);
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581 void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
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582 void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
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583 uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel);
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585 /* Interrupts and flags management functions **********************************/
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586 void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState);
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587 FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint16_t ADC_FLAG);
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588 void ADC_ClearFlag(ADC_TypeDef* ADCx, uint16_t ADC_FLAG);
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589 ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT);
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590 void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT);
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596 #endif /*__STM32L1xx_ADC_H */
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606 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
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