2 ******************************************************************************
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3 * @file stm32l1xx_wwdg.c
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4 * @author MCD Application Team
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6 * @date 31-December-2010
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7 * @brief This file provides firmware functions to manage the following
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8 * functionalities of the Window watchdog (WWDG) peripheral:
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9 * - Prescaler, Refresh window and Counter configuration
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11 * - Interrupts and flags management
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15 * ===================================================================
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17 * ===================================================================
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19 * Once enabled the WWDG generates a system reset on expiry of a programmed
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20 * time period, unless the program refreshes the counter (downcounter)
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21 * before to reach 0x3F value (i.e. a reset is generated when the counter
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22 * value rolls over from 0x40 to 0x3F).
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23 * An MCU reset is also generated if the counter value is refreshed
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24 * before the counter has reached the refresh window value. This
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25 * implies that the counter must be refreshed in a limited window.
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27 * Once enabled the WWDG cannot be disabled except by a system reset.
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29 * WWDGRST flag in RCC_CSR register can be used to inform when a WWDG
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32 * The WWDG counter input clock is derived from the APB clock divided
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33 * by a programmable prescaler.
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35 * WWDG counter clock = PCLK1 / Prescaler
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36 * WWDG timeout = (WWDG counter clock) * (counter value)
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38 * Min-max timeout value @32MHz (PCLK1): ~128us / ~65.6ms
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40 * ===================================================================
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41 * How to use this driver
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42 * ===================================================================
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43 * 1. Enable WWDG clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_WWDG, ENABLE) function
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45 * 2. Configure the WWDG prescaler using WWDG_SetPrescaler() function
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47 * 3. Configure the WWDG refresh window using WWDG_SetWindowValue() function
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49 * 4. Set the WWDG counter value and start it using WWDG_Enable() function.
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50 * When the WWDG is enabled the counter value should be configured to
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51 * a value greater than 0x40 to prevent generating an immediate reset.
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53 * 5. Optionally you can enable the Early wakeup interrupt which is
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54 * generated when the counter reach 0x40.
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55 * Once enabled this interrupt cannot be disabled except by a system reset.
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57 * 6. Then the application program must refresh the WWDG counter at regular
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58 * intervals during normal operation to prevent an MCU reset, using
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59 * WWDG_SetCounter() function. This operation must occur only when
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60 * the counter value is lower than the refresh window value,
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61 * programmed using WWDG_SetWindowValue().
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65 ******************************************************************************
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68 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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69 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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70 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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71 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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72 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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73 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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75 * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
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76 ******************************************************************************
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79 /* Includes ------------------------------------------------------------------*/
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80 #include "stm32l1xx_wwdg.h"
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81 #include "stm32l1xx_rcc.h"
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83 /** @addtogroup STM32L1xx_StdPeriph_Driver
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88 * @brief WWDG driver modules
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92 /* Private typedef -----------------------------------------------------------*/
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93 /* Private define ------------------------------------------------------------*/
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95 /* ----------- WWDG registers bit address in the alias region ----------- */
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96 #define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE)
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98 /* Alias word address of EWI bit */
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99 #define CFR_OFFSET (WWDG_OFFSET + 0x04)
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100 #define EWI_BitNumber 0x09
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101 #define CFR_EWI_BB (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4))
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103 /* --------------------- WWDG registers bit mask ------------------------ */
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105 /* CFR register bit mask */
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106 #define CFR_WDGTB_MASK ((uint32_t)0xFFFFFE7F)
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107 #define CFR_W_MASK ((uint32_t)0xFFFFFF80)
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108 #define BIT_MASK ((uint8_t)0x7F)
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110 /* Private macro -------------------------------------------------------------*/
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111 /* Private variables ---------------------------------------------------------*/
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112 /* Private function prototypes -----------------------------------------------*/
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113 /* Private functions ---------------------------------------------------------*/
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115 /** @defgroup WWDG_Private_Functions
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119 /** @defgroup WWDG_Group1 Prescaler, Refresh window and Counter configuration functions
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120 * @brief Prescaler, Refresh window and Counter configuration functions
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123 ===============================================================================
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124 Prescaler, Refresh window and Counter configuration functions
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125 ===============================================================================
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132 * @brief Deinitializes the WWDG peripheral registers to their default reset values.
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136 void WWDG_DeInit(void)
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138 RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE);
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139 RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE);
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143 * @brief Sets the WWDG Prescaler.
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144 * @param WWDG_Prescaler: specifies the WWDG Prescaler.
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145 * This parameter can be one of the following values:
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146 * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
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147 * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
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148 * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
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149 * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
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152 void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)
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154 uint32_t tmpreg = 0;
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155 /* Check the parameters */
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156 assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler));
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157 /* Clear WDGTB[1:0] bits */
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158 tmpreg = WWDG->CFR & CFR_WDGTB_MASK;
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159 /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */
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160 tmpreg |= WWDG_Prescaler;
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161 /* Store the new value */
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162 WWDG->CFR = tmpreg;
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166 * @brief Sets the WWDG window value.
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167 * @param WindowValue: specifies the window value to be compared to the downcounter.
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168 * This parameter value must be lower than 0x80.
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171 void WWDG_SetWindowValue(uint8_t WindowValue)
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173 __IO uint32_t tmpreg = 0;
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175 /* Check the parameters */
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176 assert_param(IS_WWDG_WINDOW_VALUE(WindowValue));
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177 /* Clear W[6:0] bits */
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179 tmpreg = WWDG->CFR & CFR_W_MASK;
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181 /* Set W[6:0] bits according to WindowValue value */
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182 tmpreg |= WindowValue & (uint32_t) BIT_MASK;
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184 /* Store the new value */
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185 WWDG->CFR = tmpreg;
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189 * @brief Enables the WWDG Early Wakeup interrupt(EWI).
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190 * @note Once enabled this interrupt cannot be disabled except by a system reset.
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194 void WWDG_EnableIT(void)
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196 *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE;
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200 * @brief Sets the WWDG counter value.
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201 * @param Counter: specifies the watchdog counter value.
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202 * This parameter must be a number between 0x40 and 0x7F (to prevent generating
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203 * an immediate reset)
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206 void WWDG_SetCounter(uint8_t Counter)
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208 /* Check the parameters */
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209 assert_param(IS_WWDG_COUNTER(Counter));
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210 /* Write to T[6:0] bits to configure the counter value, no need to do
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211 a read-modify-write; writing a 0 to WDGA bit does nothing */
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212 WWDG->CR = Counter & BIT_MASK;
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219 /** @defgroup WWDG_Group2 WWDG activation functions
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220 * @brief WWDG activation functions
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223 ===============================================================================
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224 WWDG activation functions
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225 ===============================================================================
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232 * @brief Enables WWDG and load the counter value.
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233 * @param Counter: specifies the watchdog counter value.
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234 * This parameter must be a number between 0x40 and 0x7F (to prevent generating
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235 * an immediate reset)
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238 void WWDG_Enable(uint8_t Counter)
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240 /* Check the parameters */
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241 assert_param(IS_WWDG_COUNTER(Counter));
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242 WWDG->CR = WWDG_CR_WDGA | Counter;
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249 /** @defgroup WWDG_Group3 Interrupts and flags management functions
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250 * @brief Interrupts and flags management functions
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253 ===============================================================================
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254 Interrupts and flags management functions
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255 ===============================================================================
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262 * @brief Checks whether the Early Wakeup interrupt flag is set or not.
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264 * @retval The new state of the Early Wakeup interrupt flag (SET or RESET)
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266 FlagStatus WWDG_GetFlagStatus(void)
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268 FlagStatus bitstatus = RESET;
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270 if ((WWDG->SR) != (uint32_t)RESET)
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282 * @brief Clears Early Wakeup interrupt flag.
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286 void WWDG_ClearFlag(void)
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288 WWDG->SR = (uint32_t)RESET;
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307 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
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