2 ******************************************************************************
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3 * @file stm32l1xx_spi.c
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4 * @author MCD Application Team
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6 * @date 31-December-2010
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7 * @brief This file provides firmware functions to manage the following
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8 * functionalities of the Serial peripheral interface (SPI):
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9 * - Initialization and Configuration
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10 * - Data transfers functions
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11 * - Hardware CRC Calculation
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12 * - DMA transfers management
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13 * - Interrupts and flags management
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17 * The I2S feature is not implemented in STM32L1xx Ultra Low Power
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18 * Medium-density devices and will be supported in future products.
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20 * ===================================================================
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21 * How to use this driver
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22 * ===================================================================
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23 * 1. Enable peripheral clock using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE)
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24 * function for SPI1 or using RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE)
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25 * function for SPI2.
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27 * 2. Enable SCK, MOSI, MISO and NSS GPIO clocks using RCC_AHBPeriphClockCmd()
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30 * 3. Peripherals alternate function:
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31 * - Connect the pin to the desired peripherals' Alternate
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32 * Function (AF) using GPIO_PinAFConfig() function
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33 * - Configure the desired pin in alternate function by:
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34 * GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF
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35 * - Select the type, pull-up/pull-down and output speed via
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36 * GPIO_PuPd, GPIO_OType and GPIO_Speed members
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37 * - Call GPIO_Init() function
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39 * 4. Program the Polarity, Phase, First Data, Baud Rate Prescaler, Slave
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40 * Management, Peripheral Mode and CRC Polynomial values using the SPI_Init()
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43 * 5. Enable the NVIC and the corresponding interrupt using the function
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44 * SPI_ITConfig() if you need to use interrupt mode.
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46 * 6. When using the DMA mode
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47 * - Configure the DMA using DMA_Init() function
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48 * - Active the needed channel Request using SPI_I2S_DMACmd() function
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50 * 7. Enable the SPI using the SPI_Cmd() function.
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52 * 8. Enable the DMA using the DMA_Cmd() function when using DMA mode.
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54 * 9. Optionally you can enable/configure the following parameters without
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55 * re-initialization (i.e there is no need to call again SPI_Init() function):
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56 * - When bidirectional mode (SPI_Direction_1Line_Rx or SPI_Direction_1Line_Tx)
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57 * is programmed as Data direction parameter using the SPI_Init() function
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58 * it can be possible to switch between SPI_Direction_Tx or SPI_Direction_Rx
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59 * using the SPI_BiDirectionalLineConfig() function.
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60 * - When SPI_NSS_Soft is selected as Slave Select Management parameter
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61 * using the SPI_Init() function it can be possible to manage the
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62 * NSS internal signal using the SPI_NSSInternalSoftwareConfig() function.
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63 * - Reconfigure the data size using the SPI_DataSizeConfig() function
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64 * - Enable or disable the SS output using the SPI_SSOutputCmd() function
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66 * 10. To use the CRC Hardware calculation feature refer to the Peripheral
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67 * CRC hardware Calculation subsection.
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71 ******************************************************************************
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74 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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75 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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76 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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77 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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78 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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79 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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81 * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
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82 ******************************************************************************
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85 /* Includes ------------------------------------------------------------------*/
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86 #include "stm32l1xx_spi.h"
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87 #include "stm32l1xx_rcc.h"
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89 /** @addtogroup STM32L1xx_StdPeriph_Driver
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94 * @brief SPI driver modules
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98 /* Private typedef -----------------------------------------------------------*/
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99 /* Private define ------------------------------------------------------------*/
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100 /* SPI registers Masks */
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101 #define CR1_CLEAR_MASK ((uint16_t)0x3040)
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103 /* Private macro -------------------------------------------------------------*/
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104 /* Private variables ---------------------------------------------------------*/
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105 /* Private function prototypes -----------------------------------------------*/
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106 /* Private functions ---------------------------------------------------------*/
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108 /** @defgroup SPI_Private_Functions
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112 /** @defgroup SPI_Group1 Initialization and Configuration functions
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113 * @brief Initialization and Configuration functions
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116 ===============================================================================
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117 Initialization and Configuration functions
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118 ===============================================================================
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120 This section provides a set of functions allowing to initialize the SPI Direction,
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121 SPI Mode, SPI Data Size, SPI Polarity, SPI Phase, SPI NSS Management, SPI Baud
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122 Rate Prescaler, SPI First Bit and SPI CRC Polynomial.
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124 The SPI_Init() function follows the SPI configuration procedures for Master mode
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125 and Slave mode (details for these procedures are available in reference manual
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133 * @brief Deinitializes the SPIx peripheral registers to their default
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135 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
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138 void SPI_I2S_DeInit(SPI_TypeDef* SPIx)
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140 /* Check the parameters */
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141 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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145 /* Enable SPI1 reset state */
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146 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
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147 /* Release SPI1 from reset state */
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148 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
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154 /* Enable SPI2 reset state */
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155 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
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156 /* Release SPI2 from reset state */
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157 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
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163 * @brief Initializes the SPIx peripheral according to the specified
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164 * parameters in the SPI_InitStruct.
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165 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
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166 * @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure that
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167 * contains the configuration information for the specified SPI peripheral.
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170 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
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172 uint16_t tmpreg = 0;
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174 /* check the parameters */
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175 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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177 /* Check the SPI parameters */
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178 assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
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179 assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
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180 assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize));
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181 assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
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182 assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
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183 assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
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184 assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
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185 assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
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186 assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
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188 /*---------------------------- SPIx CR1 Configuration ------------------------*/
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189 /* Get the SPIx CR1 value */
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190 tmpreg = SPIx->CR1;
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191 /* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */
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192 tmpreg &= CR1_CLEAR_MASK;
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193 /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
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194 master/salve mode, CPOL and CPHA */
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195 /* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
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196 /* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */
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197 /* Set LSBFirst bit according to SPI_FirstBit value */
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198 /* Set BR bits according to SPI_BaudRatePrescaler value */
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199 /* Set CPOL bit according to SPI_CPOL value */
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200 /* Set CPHA bit according to SPI_CPHA value */
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201 tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode |
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202 SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL |
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203 SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS |
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204 SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit);
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205 /* Write to SPIx CR1 */
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206 SPIx->CR1 = tmpreg;
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208 /*---------------------------- SPIx CRCPOLY Configuration --------------------*/
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209 /* Write to SPIx CRCPOLY */
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210 SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
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214 * @brief Fills each SPI_InitStruct member with its default value.
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215 * @param SPI_InitStruct : pointer to a SPI_InitTypeDef structure which will be initialized.
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218 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct)
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220 /*--------------- Reset SPI init structure parameters values -----------------*/
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221 /* Initialize the SPI_Direction member */
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222 SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;
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223 /* initialize the SPI_Mode member */
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224 SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
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225 /* initialize the SPI_DataSize member */
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226 SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
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227 /* Initialize the SPI_CPOL member */
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228 SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
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229 /* Initialize the SPI_CPHA member */
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230 SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
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231 /* Initialize the SPI_NSS member */
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232 SPI_InitStruct->SPI_NSS = SPI_NSS_Hard;
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233 /* Initialize the SPI_BaudRatePrescaler member */
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234 SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
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235 /* Initialize the SPI_FirstBit member */
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236 SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
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237 /* Initialize the SPI_CRCPolynomial member */
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238 SPI_InitStruct->SPI_CRCPolynomial = 7;
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242 * @brief Enables or disables the specified SPI peripheral.
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243 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
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244 * @param NewState: new state of the SPIx peripheral.
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245 * This parameter can be: ENABLE or DISABLE.
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248 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
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250 /* Check the parameters */
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251 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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252 assert_param(IS_FUNCTIONAL_STATE(NewState));
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253 if (NewState != DISABLE)
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255 /* Enable the selected SPI peripheral */
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256 SPIx->CR1 |= SPI_CR1_SPE;
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260 /* Disable the selected SPI peripheral */
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261 SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_SPE);
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266 * @brief Configures the data size for the selected SPI.
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267 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
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268 * @param SPI_DataSize: specifies the SPI data size.
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269 * This parameter can be one of the following values:
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270 * @arg SPI_DataSize_16b: Set data frame format to 16bit
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271 * @arg SPI_DataSize_8b: Set data frame format to 8bit
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274 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize)
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276 /* Check the parameters */
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277 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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278 assert_param(IS_SPI_DATASIZE(SPI_DataSize));
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279 /* Clear DFF bit */
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280 SPIx->CR1 &= (uint16_t)~SPI_DataSize_16b;
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281 /* Set new DFF bit value */
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282 SPIx->CR1 |= SPI_DataSize;
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286 * @brief Selects the data transfer direction in bidirectional mode for the specified SPI.
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287 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
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288 * @param SPI_Direction: specifies the data transfer direction in bidirectional mode.
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289 * This parameter can be one of the following values:
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290 * @arg SPI_Direction_Tx: Selects Tx transmission direction
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291 * @arg SPI_Direction_Rx: Selects Rx receive direction
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294 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction)
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296 /* Check the parameters */
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297 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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298 assert_param(IS_SPI_DIRECTION(SPI_Direction));
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299 if (SPI_Direction == SPI_Direction_Tx)
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301 /* Set the Tx only mode */
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302 SPIx->CR1 |= SPI_Direction_Tx;
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306 /* Set the Rx only mode */
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307 SPIx->CR1 &= SPI_Direction_Rx;
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312 * @brief Configures internally by software the NSS pin for the selected SPI.
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313 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
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314 * @param SPI_NSSInternalSoft: specifies the SPI NSS internal state.
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315 * This parameter can be one of the following values:
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316 * @arg SPI_NSSInternalSoft_Set: Set NSS pin internally
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317 * @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally
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320 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft)
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322 /* Check the parameters */
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323 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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324 assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft));
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325 if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset)
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327 /* Set NSS pin internally by software */
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328 SPIx->CR1 |= SPI_NSSInternalSoft_Set;
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332 /* Reset NSS pin internally by software */
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333 SPIx->CR1 &= SPI_NSSInternalSoft_Reset;
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338 * @brief Enables or disables the SS output for the selected SPI.
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339 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
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340 * @param NewState: new state of the SPIx SS output.
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341 * This parameter can be: ENABLE or DISABLE.
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344 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
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346 /* Check the parameters */
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347 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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348 assert_param(IS_FUNCTIONAL_STATE(NewState));
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349 if (NewState != DISABLE)
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351 /* Enable the selected SPI SS output */
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352 SPIx->CR2 |= (uint16_t)SPI_CR2_SSOE;
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356 /* Disable the selected SPI SS output */
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357 SPIx->CR2 &= (uint16_t)~((uint16_t)SPI_CR2_SSOE);
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365 /** @defgroup SPI_Group2 Data transfers functions
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366 * @brief Data transfers functions
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369 ===============================================================================
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370 Data transfers functions
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371 ===============================================================================
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373 This section provides a set of functions allowing to manage the SPI data transfers
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375 In reception, data are received and then stored into an internal Rx buffer while
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376 In transmission, data are first stored into an internal Tx buffer before being
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379 The read access of the SPI_DR register can be done using the SPI_I2S_ReceiveData()
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380 function and returns the Rx buffered value. Whereas a write access to the SPI_DR
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381 can be done using SPI_I2S_SendData() function and stores the written data into
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389 * @brief Returns the most recent received data by the SPIx peripheral.
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390 * @param SPIx: where x can be 1 or 2 in SPI mode.
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391 * @retval The value of the received data.
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393 uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx)
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395 /* Check the parameters */
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396 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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398 /* Return the data in the DR register */
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403 * @brief Transmits a Data through the SPIx peripheral.
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404 * @param SPIx: where x can be 1 or 2 in SPI mode.
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405 * @param Data: Data to be transmitted.
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408 void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data)
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410 /* Check the parameters */
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411 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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413 /* Write in the DR register the data to be sent */
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421 /** @defgroup SPI_Group3 Hardware CRC Calculation functions
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422 * @brief Hardware CRC Calculation functions
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425 ===============================================================================
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426 Hardware CRC Calculation functions
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427 ===============================================================================
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429 This section provides a set of functions allowing to manage the SPI CRC hardware
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432 SPI communication using CRC is possible through the following procedure:
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433 1. Program the Data direction, Polarity, Phase, First Data, Baud Rate Prescaler,
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434 Slave Management, Peripheral Mode and CRC Polynomial values using the SPI_Init()
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436 2. Enable the CRC calculation using the SPI_CalculateCRC() function.
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437 3. Enable the SPI using the SPI_Cmd() function
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438 4. Before writing the last data to the TX buffer, set the CRCNext bit using the
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439 SPI_TransmitCRC() function to indicate that after transmission of the last
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440 data, the CRC should be transmitted.
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441 5. After transmitting the last data, the SPI transmits the CRC. The SPI_CR1_CRCNEXT
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442 bit is reset. The CRC is also received and compared against the SPI_RXCRCR
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444 If the value does not match, the SPI_FLAG_CRCERR flag is set and an interrupt
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445 can be generated when the SPI_I2S_IT_ERR interrupt is enabled.
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449 - It is advised to don't read the calculate CRC values during the communication.
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451 - When the SPI is in slave mode, be careful to enable CRC calculation only
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452 when the clock is stable, that is, when the clock is in the steady state.
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453 If not, a wrong CRC calculation may be done. In fact, the CRC is sensitive
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454 to the SCK slave input clock as soon as CRCEN is set, and this, whatever
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455 the value of the SPE bit.
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457 - With high bitrate frequencies, be careful when transmitting the CRC.
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458 As the number of used CPU cycles has to be as low as possible in the CRC
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459 transfer phase, it is forbidden to call software functions in the CRC
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460 transmission sequence to avoid errors in the last data and CRC reception.
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461 In fact, CRCNEXT bit has to be written before the end of the transmission/reception
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464 - For high bit rate frequencies, it is advised to use the DMA mode to avoid the
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465 degradation of the SPI speed performance due to CPU accesses impacting the
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468 - When the STM32L15xxx are configured as slaves and the NSS hardware mode is
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469 used, the NSS pin needs to be kept low between the data phase and the CRC
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472 - When the SPI is configured in slave mode with the CRC feature enabled, CRC
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473 calculation takes place even if a high level is applied on the NSS pin.
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474 This may happen for example in case of a multislave environment where the
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475 communication master addresses slaves alternately.
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477 - Between a slave deselection (high level on NSS) and a new slave selection
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478 (low level on NSS), the CRC value should be cleared on both master and slave
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479 sides in order to resynchronize the master and slave for their respective
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482 To clear the CRC, follow the procedure below:
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483 1. Disable SPI using the SPI_Cmd() function
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484 2. Disable the CRC calculation using the SPI_CalculateCRC() function.
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485 3. Enable the CRC calculation using the SPI_CalculateCRC() function.
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486 4. Enable SPI using the SPI_Cmd() function.
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493 * @brief Enables or disables the CRC value calculation of the transferred bytes.
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494 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
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495 * @param NewState: new state of the SPIx CRC value calculation.
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496 * This parameter can be: ENABLE or DISABLE.
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499 void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState)
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501 /* Check the parameters */
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502 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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503 assert_param(IS_FUNCTIONAL_STATE(NewState));
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504 if (NewState != DISABLE)
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506 /* Enable the selected SPI CRC calculation */
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507 SPIx->CR1 |= SPI_CR1_CRCEN;
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511 /* Disable the selected SPI CRC calculation */
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512 SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_CRCEN);
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517 * @brief Transmit the SPIx CRC value.
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518 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
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521 void SPI_TransmitCRC(SPI_TypeDef* SPIx)
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523 /* Check the parameters */
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524 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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526 /* Enable the selected SPI CRC transmission */
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527 SPIx->CR1 |= SPI_CR1_CRCNEXT;
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531 * @brief Returns the transmit or the receive CRC register value for the specified SPI.
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532 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
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533 * @param SPI_CRC: specifies the CRC register to be read.
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534 * This parameter can be one of the following values:
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535 * @arg SPI_CRC_Tx: Selects Tx CRC register
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536 * @arg SPI_CRC_Rx: Selects Rx CRC register
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537 * @retval The selected CRC register value..
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539 uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC)
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541 uint16_t crcreg = 0;
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542 /* Check the parameters */
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543 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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544 assert_param(IS_SPI_CRC(SPI_CRC));
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545 if (SPI_CRC != SPI_CRC_Rx)
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547 /* Get the Tx CRC register */
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548 crcreg = SPIx->TXCRCR;
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552 /* Get the Rx CRC register */
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553 crcreg = SPIx->RXCRCR;
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555 /* Return the selected CRC register */
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560 * @brief Returns the CRC Polynomial register value for the specified SPI.
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561 * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
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562 * @retval The CRC Polynomial register value.
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564 uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx)
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566 /* Check the parameters */
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567 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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569 /* Return the CRC polynomial register */
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570 return SPIx->CRCPR;
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577 /** @defgroup SPI_Group4 DMA transfers management functions
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578 * @brief DMA transfers management functions
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581 ===============================================================================
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582 DMA transfers management functions
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583 ===============================================================================
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590 * @brief Enables or disables the SPIx DMA interface.
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591 * @param SPIx: where x can be 1 or 2 in SPI mode
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592 * @param SPI_I2S_DMAReq: specifies the SPI DMA transfer request to be enabled or disabled.
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593 * This parameter can be any combination of the following values:
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594 * @arg SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request
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595 * @arg SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request
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596 * @param NewState: new state of the selected SPI DMA transfer request.
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597 * This parameter can be: ENABLE or DISABLE.
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600 void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState)
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602 /* Check the parameters */
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603 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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604 assert_param(IS_FUNCTIONAL_STATE(NewState));
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605 assert_param(IS_SPI_I2S_DMAREQ(SPI_I2S_DMAReq));
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607 if (NewState != DISABLE)
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609 /* Enable the selected SPI DMA requests */
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610 SPIx->CR2 |= SPI_I2S_DMAReq;
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614 /* Disable the selected SPI DMA requests */
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615 SPIx->CR2 &= (uint16_t)~SPI_I2S_DMAReq;
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623 /** @defgroup SPI_Group5 Interrupts and flags management functions
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624 * @brief Interrupts and flags management functions
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627 ===============================================================================
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628 Interrupts and flags management functions
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629 ===============================================================================
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631 This section provides a set of functions allowing to configure the SPI Interrupts
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632 sources and check or clear the flags or pending bits status.
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633 The user should identify which mode will be used in his application to manage
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634 the communication: Polling mode, Interrupt mode or DMA mode.
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638 In Polling Mode, the SPI communication can be managed by 6 flags:
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639 1. SPI_I2S_FLAG_TXE : to indicate the status of the transmit buffer register
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640 2. SPI_I2S_FLAG_RXNE : to indicate the status of the receive buffer register
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641 3. SPI_I2S_FLAG_BSY : to indicate the state of the communication layer of the SPI.
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642 4. SPI_FLAG_CRCERR : to indicate if a CRC Calculation error occur
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643 5. SPI_FLAG_MODF : to indicate if a Mode Fault error occur
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644 6. SPI_I2S_FLAG_OVR : to indicate if an Overrun error occur
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646 Note: Do not use the BSY flag to handle each data transmission or reception.
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647 ----- It is better to use the TXE and RXNE flags instead.
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649 In this Mode it is advised to use the following functions:
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650 - FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
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651 - void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
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655 In Interrupt Mode, the SPI communication can be managed by 3 interrupt sources
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656 and 5 pending bits:
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659 1. SPI_I2S_IT_TXE : to indicate the status of the transmit buffer register
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660 2. SPI_I2S_IT_RXNE : to indicate the status of the receive buffer register
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661 3. SPI_IT_CRCERR : to indicate if a CRC Calculation error occur
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662 4. SPI_IT_MODF : to indicate if a Mode Fault error occur
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663 5. SPI_I2S_IT_OVR : to indicate if an Overrun error occur
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667 1. SPI_I2S_IT_TXE: specifies the interrupt source for the Tx buffer empty
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669 2. SPI_I2S_IT_RXNE : specifies the interrupt source for the Rx buffer not
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671 3. SPI_I2S_IT_ERR : specifies the interrupt source for the errors interrupt.
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673 In this Mode it is advised to use the following functions:
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674 - void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
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675 - ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
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676 - void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
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680 In DMA Mode, the SPI communication can be managed by 2 DMA Channel requests:
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681 1. SPI_I2S_DMAReq_Tx: specifies the Tx buffer DMA transfer request
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682 2. SPI_I2S_DMAReq_Rx: specifies the Rx buffer DMA transfer request
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684 In this Mode it is advised to use the following function:
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685 - void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
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692 * @brief Enables or disables the specified SPI interrupts.
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693 * @param SPIx: where x can be 1 or 2 in SPI mode
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694 * @param SPI_I2S_IT: specifies the SPI interrupt source to be enabled or disabled.
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695 * This parameter can be one of the following values:
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696 * @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask
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697 * @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask
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698 * @arg SPI_I2S_IT_ERR: Error interrupt mask
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699 * @param NewState: new state of the specified SPI interrupt.
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700 * This parameter can be: ENABLE or DISABLE.
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703 void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState)
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705 uint16_t itpos = 0, itmask = 0 ;
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707 /* Check the parameters */
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708 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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709 assert_param(IS_FUNCTIONAL_STATE(NewState));
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710 assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT));
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712 /* Get the SPI IT index */
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713 itpos = SPI_I2S_IT >> 4;
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715 /* Set the IT mask */
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716 itmask = (uint16_t)1 << (uint16_t)itpos;
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718 if (NewState != DISABLE)
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720 /* Enable the selected SPI interrupt */
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721 SPIx->CR2 |= itmask;
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725 /* Disable the selected SPI interrupt */
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726 SPIx->CR2 &= (uint16_t)~itmask;
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731 * @brief Checks whether the specified SPI flag is set or not.
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732 * @param SPIx: where x can be 1 or 2 in SPI mode
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733 * @param SPI_I2S_FLAG: specifies the SPI flag to check.
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734 * This parameter can be one of the following values:
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735 * @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag.
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736 * @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag.
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737 * @arg SPI_I2S_FLAG_BSY: Busy flag.
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738 * @arg SPI_I2S_FLAG_OVR: Overrun flag.
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739 * @arg SPI_I2S_FLAG_MODF: Mode Fault flag.
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740 * @arg SPI_I2S_FLAG_CRCERR: CRC Error flag.
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741 * @retval The new state of SPI_I2S_FLAG (SET or RESET).
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743 FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
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745 FlagStatus bitstatus = RESET;
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746 /* Check the parameters */
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747 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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748 assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG));
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750 /* Check the status of the specified SPI flag */
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751 if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET)
\r
753 /* SPI_I2S_FLAG is set */
\r
758 /* SPI_I2S_FLAG is reset */
\r
761 /* Return the SPI_I2S_FLAG status */
\r
766 * @brief Clears the SPIx CRC Error (CRCERR) flag.
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767 * @param SPIx: where x can be 1 or 2 in SPI mode
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768 * @param SPI_I2S_FLAG: specifies the SPI flag to clear.
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769 * This function clears only CRCERR flag.
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771 * - OVR (OverRun error) flag is cleared by software sequence: a read
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772 * operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by a read
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773 * operation to SPI_SR register (SPI_I2S_GetFlagStatus()).
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774 * - MODF (Mode Fault) flag is cleared by software sequence: a read/write
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775 * operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by a
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776 * write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI).
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779 void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
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781 /* Check the parameters */
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782 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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783 assert_param(IS_SPI_I2S_CLEAR_FLAG(SPI_I2S_FLAG));
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785 /* Clear the selected SPI CRC Error (CRCERR) flag */
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786 SPIx->SR = (uint16_t)~SPI_I2S_FLAG;
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790 * @brief Checks whether the specified SPI interrupt has occurred or not.
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791 * @param SPIx: where x can be
\r
792 * - 1 or 2 in SPI mode
\r
793 * @param SPI_I2S_IT: specifies the SPI interrupt source to check.
\r
794 * This parameter can be one of the following values:
\r
795 * @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt.
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796 * @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt.
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797 * @arg SPI_I2S_IT_OVR: Overrun interrupt.
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798 * @arg SPI_I2S_IT_MODF: Mode Fault interrupt.
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799 * @arg SPI_I2S_IT_CRCERR: CRC Error interrupt.
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800 * @retval The new state of SPI_I2S_IT (SET or RESET).
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802 ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
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804 ITStatus bitstatus = RESET;
\r
805 uint16_t itpos = 0, itmask = 0, enablestatus = 0;
\r
807 /* Check the parameters */
\r
808 assert_param(IS_SPI_ALL_PERIPH(SPIx));
\r
809 assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT));
\r
811 /* Get the SPI_I2S_IT index */
\r
812 itpos = 0x01 << (SPI_I2S_IT & 0x0F);
\r
814 /* Get the SPI_I2S_IT IT mask */
\r
815 itmask = SPI_I2S_IT >> 4;
\r
817 /* Set the IT mask */
\r
818 itmask = 0x01 << itmask;
\r
820 /* Get the SPI_I2S_IT enable bit status */
\r
821 enablestatus = (SPIx->CR2 & itmask) ;
\r
823 /* Check the status of the specified SPI interrupt */
\r
824 if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus)
\r
826 /* SPI_I2S_IT is set */
\r
831 /* SPI_I2S_IT is reset */
\r
834 /* Return the SPI_I2S_IT status */
\r
839 * @brief Clears the SPIx CRC Error (CRCERR) interrupt pending bit.
\r
840 * @param SPIx: where x can be
\r
841 * - 1 or 2 in SPI mode
\r
842 * @param SPI_I2S_IT: specifies the SPI interrupt pending bit to clear.
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843 * This function clears only CRCERR interrupt pending bit.
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845 * - OVR (OverRun Error) interrupt pending bit is cleared by software
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846 * sequence: a read operation to SPI_DR register (SPI_I2S_ReceiveData())
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847 * followed by a read operation to SPI_SR register (SPI_I2S_GetITStatus()).
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848 * - MODF (Mode Fault) interrupt pending bit is cleared by software sequence:
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849 * a read/write operation to SPI_SR register (SPI_I2S_GetITStatus())
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850 * followed by a write operation to SPI_CR1 register (SPI_Cmd() to enable
\r
854 void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
\r
856 uint16_t itpos = 0;
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857 /* Check the parameters */
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858 assert_param(IS_SPI_ALL_PERIPH(SPIx));
\r
859 assert_param(IS_SPI_I2S_CLEAR_IT(SPI_I2S_IT));
\r
861 /* Get the SPI_I2S IT index */
\r
862 itpos = 0x01 << (SPI_I2S_IT & 0x0F);
\r
864 /* Clear the selected SPI CRC Error (CRCERR) interrupt pending bit */
\r
865 SPIx->SR = (uint16_t)~itpos;
\r
884 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
\r