2 ******************************************************************************
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3 * @file stm32l1xx_i2c.c
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4 * @author MCD Application Team
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6 * @date 31-December-2010
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7 * @brief This file provides firmware functions to manage the following
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8 * functionalities of the Inter-integrated circuit (I2C)
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9 * - Initialization and Configuration
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12 * - DMA transfers management
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13 * - Interrupts, events and flags management
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17 * ===================================================================
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18 * How to use this driver
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19 * ===================================================================
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20 * 1. Enable peripheral clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2Cx, ENABLE)
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21 * function for I2C1 or I2C2.
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23 * 2. Enable SDA, SCL and SMBA (when used) GPIO clocks using
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24 * RCC_AHBPeriphClockCmd() function.
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26 * 3. Peripherals alternate function:
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27 * - Connect the pin to the desired peripherals' Alternate
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28 * Function (AF) using GPIO_PinAFConfig() function
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29 * - Configure the desired pin in alternate function by:
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30 * GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF
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31 * - Select the type, pull-up/pull-down and output speed via
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32 * GPIO_PuPd, GPIO_OType and GPIO_Speed members
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33 * - Call GPIO_Init() function
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35 * 4. Program the Mode, duty cycle , Own address, Ack, Speed and Acknowledged
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36 * Address using the I2C_Init() function.
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38 * 5. Optionally you can enable/configure the following parameters without
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39 * re-initialization (i.e there is no need to call again I2C_Init() function):
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40 * - Enable the acknowledge feature using I2C_AcknowledgeConfig() function
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41 * - Enable the dual addressing mode using I2C_DualAddressCmd() function
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42 * - Enable the general call using the I2C_GeneralCallCmd() function
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43 * - Enable the clock stretching using I2C_StretchClockCmd() function
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44 * - Enable the fast mode duty cycle using the I2C_FastModeDutyCycleConfig()
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46 * - Enable the PEC Calculation using I2C_CalculatePEC() function
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47 * - For SMBus Mode:
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48 * - Enable the Address Resolution Protocol (ARP) using I2C_ARPCmd() function
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49 * - Configure the SMBusAlert pin using I2C_SMBusAlertConfig() function
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51 * 6. Enable the NVIC and the corresponding interrupt using the function
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52 * I2C_ITConfig() if you need to use interrupt mode.
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54 * 7. When using the DMA mode
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55 * - Configure the DMA using DMA_Init() function
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56 * - Active the needed channel Request using I2C_DMACmd() or
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57 I2C_DMALastTransferCmd() function
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59 * 8. Enable the I2C using the I2C_Cmd() function.
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61 * 9. Enable the DMA using the DMA_Cmd() function when using DMA mode in the
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66 ******************************************************************************
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69 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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70 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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71 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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72 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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73 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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74 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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76 * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
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77 ******************************************************************************
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80 /* Includes ------------------------------------------------------------------*/
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81 #include "stm32l1xx_i2c.h"
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82 #include "stm32l1xx_rcc.h"
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85 /** @addtogroup STM32L1xx_StdPeriph_Driver
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90 * @brief I2C driver modules
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94 /* Private typedef -----------------------------------------------------------*/
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95 /* Private define ------------------------------------------------------------*/
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97 #define CR1_CLEAR_MASK ((uint16_t)0xFBF5) /*<! I2C registers Masks */
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98 #define FLAG_MASK ((uint32_t)0x00FFFFFF) /*<! I2C FLAG mask */
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99 #define ITEN_MASK ((uint32_t)0x07000000) /*<! I2C Interrupt Enable mask */
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101 /* Private macro -------------------------------------------------------------*/
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102 /* Private variables ---------------------------------------------------------*/
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103 /* Private function prototypes -----------------------------------------------*/
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104 /* Private functions ---------------------------------------------------------*/
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106 /** @defgroup I2C_Private_Functions
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110 /** @defgroup I2C_Group1 Initialization and Configuration functions
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111 * @brief Initialization and Configuration functions
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114 ===============================================================================
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115 Initialization and Configuration functions
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116 ===============================================================================
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123 * @brief Deinitializes the I2Cx peripheral registers to their default reset values.
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124 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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127 void I2C_DeInit(I2C_TypeDef* I2Cx)
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129 /* Check the parameters */
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130 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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134 /* Enable I2C1 reset state */
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135 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE);
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136 /* Release I2C1 from reset state */
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137 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE);
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141 /* Enable I2C2 reset state */
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142 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE);
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143 /* Release I2C2 from reset state */
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144 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, DISABLE);
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149 * @brief Initializes the I2Cx peripheral according to the specified
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150 * parameters in the I2C_InitStruct.
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151 * @note To use the I2C at 400 KHz (in fast mode), the PCLK1 frequency
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152 * (I2C peripheral input clock) must be a multiple of 10 MHz.
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153 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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154 * @param I2C_InitStruct: pointer to a I2C_InitTypeDef structure that
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155 * contains the configuration information for the specified I2C peripheral.
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158 void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct)
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160 uint16_t tmpreg = 0, freqrange = 0;
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161 uint16_t result = 0x04;
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162 uint32_t pclk1 = 8000000;
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163 RCC_ClocksTypeDef rcc_clocks;
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164 /* Check the parameters */
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165 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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166 assert_param(IS_I2C_CLOCK_SPEED(I2C_InitStruct->I2C_ClockSpeed));
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167 assert_param(IS_I2C_MODE(I2C_InitStruct->I2C_Mode));
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168 assert_param(IS_I2C_DUTY_CYCLE(I2C_InitStruct->I2C_DutyCycle));
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169 assert_param(IS_I2C_OWN_ADDRESS1(I2C_InitStruct->I2C_OwnAddress1));
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170 assert_param(IS_I2C_ACK_STATE(I2C_InitStruct->I2C_Ack));
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171 assert_param(IS_I2C_ACKNOWLEDGE_ADDRESS(I2C_InitStruct->I2C_AcknowledgedAddress));
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173 /*---------------------------- I2Cx CR2 Configuration ------------------------*/
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174 /* Get the I2Cx CR2 value */
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175 tmpreg = I2Cx->CR2;
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176 /* Clear frequency FREQ[5:0] bits */
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177 tmpreg &= (uint16_t)~((uint16_t)I2C_CR2_FREQ);
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178 /* Get pclk1 frequency value */
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179 RCC_GetClocksFreq(&rcc_clocks);
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180 pclk1 = rcc_clocks.PCLK1_Frequency;
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181 /* Set frequency bits depending on pclk1 value */
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182 freqrange = (uint16_t)(pclk1 / 1000000);
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183 tmpreg |= freqrange;
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184 /* Write to I2Cx CR2 */
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185 I2Cx->CR2 = tmpreg;
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187 /*---------------------------- I2Cx CCR Configuration ------------------------*/
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188 /* Disable the selected I2C peripheral to configure TRISE */
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189 I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_PE);
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190 /* Reset tmpreg value */
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191 /* Clear F/S, DUTY and CCR[11:0] bits */
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194 /* Configure speed in standard mode */
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195 if (I2C_InitStruct->I2C_ClockSpeed <= 100000)
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197 /* Standard mode speed calculate */
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198 result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed << 1));
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199 /* Test if CCR value is under 0x4*/
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202 /* Set minimum allowed value */
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205 /* Set speed value for standard mode */
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207 /* Set Maximum Rise Time for standard mode */
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208 I2Cx->TRISE = freqrange + 1;
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210 /* Configure speed in fast mode */
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211 /* To use the I2C at 400 KHz (in fast mode), the PCLK1 frequency (I2C peripheral
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212 input clock) must be a multiple of 10 MHz */
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213 else /*(I2C_InitStruct->I2C_ClockSpeed <= 400000)*/
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215 if (I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_2)
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217 /* Fast mode speed calculate: Tlow/Thigh = 2 */
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218 result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 3));
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220 else /*I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_16_9*/
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222 /* Fast mode speed calculate: Tlow/Thigh = 16/9 */
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223 result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 25));
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225 result |= I2C_DutyCycle_16_9;
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228 /* Test if CCR value is under 0x1*/
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229 if ((result & I2C_CCR_CCR) == 0)
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231 /* Set minimum allowed value */
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232 result |= (uint16_t)0x0001;
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234 /* Set speed value and set F/S bit for fast mode */
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235 tmpreg |= (uint16_t)(result | I2C_CCR_FS);
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236 /* Set Maximum Rise Time for fast mode */
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237 I2Cx->TRISE = (uint16_t)(((freqrange * (uint16_t)300) / (uint16_t)1000) + (uint16_t)1);
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240 /* Write to I2Cx CCR */
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241 I2Cx->CCR = tmpreg;
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242 /* Enable the selected I2C peripheral */
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243 I2Cx->CR1 |= I2C_CR1_PE;
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245 /*---------------------------- I2Cx CR1 Configuration ------------------------*/
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246 /* Get the I2Cx CR1 value */
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247 tmpreg = I2Cx->CR1;
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248 /* Clear ACK, SMBTYPE and SMBUS bits */
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249 tmpreg &= CR1_CLEAR_MASK;
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250 /* Configure I2Cx: mode and acknowledgement */
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251 /* Set SMBTYPE and SMBUS bits according to I2C_Mode value */
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252 /* Set ACK bit according to I2C_Ack value */
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253 tmpreg |= (uint16_t)((uint32_t)I2C_InitStruct->I2C_Mode | I2C_InitStruct->I2C_Ack);
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254 /* Write to I2Cx CR1 */
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255 I2Cx->CR1 = tmpreg;
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257 /*---------------------------- I2Cx OAR1 Configuration -----------------------*/
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258 /* Set I2Cx Own Address1 and acknowledged address */
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259 I2Cx->OAR1 = (I2C_InitStruct->I2C_AcknowledgedAddress | I2C_InitStruct->I2C_OwnAddress1);
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263 * @brief Fills each I2C_InitStruct member with its default value.
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264 * @param I2C_InitStruct: pointer to an I2C_InitTypeDef structure which will be initialized.
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267 void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct)
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269 /*---------------- Reset I2C init structure parameters values ----------------*/
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270 /* initialize the I2C_ClockSpeed member */
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271 I2C_InitStruct->I2C_ClockSpeed = 5000;
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272 /* Initialize the I2C_Mode member */
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273 I2C_InitStruct->I2C_Mode = I2C_Mode_I2C;
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274 /* Initialize the I2C_DutyCycle member */
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275 I2C_InitStruct->I2C_DutyCycle = I2C_DutyCycle_2;
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276 /* Initialize the I2C_OwnAddress1 member */
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277 I2C_InitStruct->I2C_OwnAddress1 = 0;
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278 /* Initialize the I2C_Ack member */
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279 I2C_InitStruct->I2C_Ack = I2C_Ack_Disable;
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280 /* Initialize the I2C_AcknowledgedAddress member */
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281 I2C_InitStruct->I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
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285 * @brief Enables or disables the specified I2C peripheral.
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286 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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287 * @param NewState: new state of the I2Cx peripheral.
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288 * This parameter can be: ENABLE or DISABLE.
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291 void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
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293 /* Check the parameters */
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294 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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295 assert_param(IS_FUNCTIONAL_STATE(NewState));
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296 if (NewState != DISABLE)
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298 /* Enable the selected I2C peripheral */
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299 I2Cx->CR1 |= I2C_CR1_PE;
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303 /* Disable the selected I2C peripheral */
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304 I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_PE);
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309 * @brief Generates I2Cx communication START condition.
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310 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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311 * @param NewState: new state of the I2C START condition generation.
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312 * This parameter can be: ENABLE or DISABLE.
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315 void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState)
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317 /* Check the parameters */
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318 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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319 assert_param(IS_FUNCTIONAL_STATE(NewState));
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320 if (NewState != DISABLE)
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322 /* Generate a START condition */
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323 I2Cx->CR1 |= I2C_CR1_START;
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327 /* Disable the START condition generation */
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328 I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_START);
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333 * @brief Generates I2Cx communication STOP condition.
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334 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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335 * @param NewState: new state of the I2C STOP condition generation.
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336 * This parameter can be: ENABLE or DISABLE.
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339 void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState)
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341 /* Check the parameters */
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342 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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343 assert_param(IS_FUNCTIONAL_STATE(NewState));
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344 if (NewState != DISABLE)
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346 /* Generate a STOP condition */
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347 I2Cx->CR1 |= I2C_CR1_STOP;
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351 /* Disable the STOP condition generation */
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352 I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_STOP);
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357 * @brief Enables or disables the specified I2C acknowledge feature.
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358 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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359 * @param NewState: new state of the I2C Acknowledgement.
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360 * This parameter can be: ENABLE or DISABLE.
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363 void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState)
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365 /* Check the parameters */
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366 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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367 assert_param(IS_FUNCTIONAL_STATE(NewState));
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368 if (NewState != DISABLE)
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370 /* Enable the acknowledgement */
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371 I2Cx->CR1 |= I2C_CR1_ACK;
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375 /* Disable the acknowledgement */
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376 I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_ACK);
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381 * @brief Configures the specified I2C own address2.
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382 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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383 * @param Address: specifies the 7bit I2C own address2.
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386 void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address)
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388 uint16_t tmpreg = 0;
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390 /* Check the parameters */
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391 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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393 /* Get the old register value */
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394 tmpreg = I2Cx->OAR2;
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396 /* Reset I2Cx Own address2 bit [7:1] */
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397 tmpreg &= (uint16_t)~((uint16_t)I2C_OAR2_ADD2);
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399 /* Set I2Cx Own address2 */
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400 tmpreg |= (uint16_t)((uint16_t)Address & (uint16_t)0x00FE);
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402 /* Store the new register value */
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403 I2Cx->OAR2 = tmpreg;
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407 * @brief Enables or disables the specified I2C dual addressing mode.
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408 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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409 * @param NewState: new state of the I2C dual addressing mode.
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410 * This parameter can be: ENABLE or DISABLE.
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413 void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
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415 /* Check the parameters */
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416 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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417 assert_param(IS_FUNCTIONAL_STATE(NewState));
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418 if (NewState != DISABLE)
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420 /* Enable dual addressing mode */
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421 I2Cx->OAR2 |= I2C_OAR2_ENDUAL;
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425 /* Disable dual addressing mode */
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426 I2Cx->OAR2 &= (uint16_t)~((uint16_t)I2C_OAR2_ENDUAL);
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431 * @brief Enables or disables the specified I2C general call feature.
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432 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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433 * @param NewState: new state of the I2C General call.
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434 * This parameter can be: ENABLE or DISABLE.
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437 void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
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439 /* Check the parameters */
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440 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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441 assert_param(IS_FUNCTIONAL_STATE(NewState));
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442 if (NewState != DISABLE)
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444 /* Enable generall call */
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445 I2Cx->CR1 |= I2C_CR1_ENGC;
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449 /* Disable generall call */
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450 I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_ENGC);
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455 * @brief Enables or disables the specified I2C software reset.
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456 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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457 * @param NewState: new state of the I2C software reset.
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458 * This parameter can be: ENABLE or DISABLE.
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461 void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
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463 /* Check the parameters */
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464 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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465 assert_param(IS_FUNCTIONAL_STATE(NewState));
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466 if (NewState != DISABLE)
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468 /* Peripheral under reset */
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469 I2Cx->CR1 |= I2C_CR1_SWRST;
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473 /* Peripheral not under reset */
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474 I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_SWRST);
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479 * @brief Drives the SMBusAlert pin high or low for the specified I2C.
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480 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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481 * @param I2C_SMBusAlert: specifies SMBAlert pin level.
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482 * This parameter can be one of the following values:
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483 * @arg I2C_SMBusAlert_Low: SMBAlert pin driven low
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484 * @arg I2C_SMBusAlert_High: SMBAlert pin driven high
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487 void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert)
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489 /* Check the parameters */
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490 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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491 assert_param(IS_I2C_SMBUS_ALERT(I2C_SMBusAlert));
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492 if (I2C_SMBusAlert == I2C_SMBusAlert_Low)
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494 /* Drive the SMBusAlert pin Low */
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495 I2Cx->CR1 |= I2C_SMBusAlert_Low;
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499 /* Drive the SMBusAlert pin High */
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500 I2Cx->CR1 &= I2C_SMBusAlert_High;
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505 * @brief Enables or disables the specified I2C ARP.
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506 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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507 * @param NewState: new state of the I2Cx ARP.
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508 * This parameter can be: ENABLE or DISABLE.
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511 void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
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513 /* Check the parameters */
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514 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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515 assert_param(IS_FUNCTIONAL_STATE(NewState));
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516 if (NewState != DISABLE)
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518 /* Enable the selected I2C ARP */
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519 I2Cx->CR1 |= I2C_CR1_ENARP;
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523 /* Disable the selected I2C ARP */
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524 I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_ENARP);
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529 * @brief Enables or disables the specified I2C Clock stretching.
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530 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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531 * @param NewState: new state of the I2Cx Clock stretching.
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532 * This parameter can be: ENABLE or DISABLE.
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535 void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
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537 /* Check the parameters */
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538 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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539 assert_param(IS_FUNCTIONAL_STATE(NewState));
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540 if (NewState == DISABLE)
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542 /* Enable the selected I2C Clock stretching */
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543 I2Cx->CR1 |= I2C_CR1_NOSTRETCH;
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547 /* Disable the selected I2C Clock stretching */
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548 I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_NOSTRETCH);
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553 * @brief Selects the specified I2C fast mode duty cycle.
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554 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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555 * @param I2C_DutyCycle: specifies the fast mode duty cycle.
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556 * This parameter can be one of the following values:
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557 * @arg I2C_DutyCycle_2: I2C fast mode Tlow/Thigh = 2
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558 * @arg I2C_DutyCycle_16_9: I2C fast mode Tlow/Thigh = 16/9
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561 void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle)
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563 /* Check the parameters */
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564 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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565 assert_param(IS_I2C_DUTY_CYCLE(I2C_DutyCycle));
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566 if (I2C_DutyCycle != I2C_DutyCycle_16_9)
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568 /* I2C fast mode Tlow/Thigh=2 */
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569 I2Cx->CCR &= I2C_DutyCycle_2;
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573 /* I2C fast mode Tlow/Thigh=16/9 */
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574 I2Cx->CCR |= I2C_DutyCycle_16_9;
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579 * @brief Transmits the address byte to select the slave device.
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580 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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581 * @param Address: specifies the slave address which will be transmitted
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582 * @param I2C_Direction: specifies whether the I2C device will be a
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583 * Transmitter or a Receiver. This parameter can be one of the following values
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584 * @arg I2C_Direction_Transmitter: Transmitter mode
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585 * @arg I2C_Direction_Receiver: Receiver mode
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588 void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction)
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590 /* Check the parameters */
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591 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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592 assert_param(IS_I2C_DIRECTION(I2C_Direction));
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593 /* Test on the direction to set/reset the read/write bit */
\r
594 if (I2C_Direction != I2C_Direction_Transmitter)
\r
596 /* Set the address bit0 for read */
\r
597 Address |= I2C_OAR1_ADD0;
\r
601 /* Reset the address bit0 for write */
\r
602 Address &= (uint8_t)~((uint8_t)I2C_OAR1_ADD0);
\r
604 /* Send the address */
\r
605 I2Cx->DR = Address;
\r
612 /** @defgroup I2C_Group2 Data transfers functions
\r
613 * @brief Data transfers functions
\r
616 ===============================================================================
\r
617 Data transfers functions
\r
618 ===============================================================================
\r
625 * @brief Sends a data byte through the I2Cx peripheral.
\r
626 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
627 * @param Data: Byte to be transmitted..
\r
630 void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data)
\r
632 /* Check the parameters */
\r
633 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
634 /* Write in the DR register the data to be sent */
\r
639 * @brief Returns the most recent received data by the I2Cx peripheral.
\r
640 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
641 * @retval The value of the received data.
\r
643 uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx)
\r
645 /* Check the parameters */
\r
646 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
647 /* Return the data in the DR register */
\r
648 return (uint8_t)I2Cx->DR;
\r
655 /** @defgroup I2C_Group3 PEC management functions
\r
656 * @brief PEC management functions
\r
659 ===============================================================================
\r
660 PEC management functions
\r
661 ===============================================================================
\r
668 * @brief Enables or disables the specified I2C PEC transfer.
\r
669 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
670 * @param NewState: new state of the I2C PEC transmission.
\r
671 * This parameter can be: ENABLE or DISABLE.
\r
674 void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState)
\r
676 /* Check the parameters */
\r
677 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
678 assert_param(IS_FUNCTIONAL_STATE(NewState));
\r
679 if (NewState != DISABLE)
\r
681 /* Enable the selected I2C PEC transmission */
\r
682 I2Cx->CR1 |= I2C_CR1_PEC;
\r
686 /* Disable the selected I2C PEC transmission */
\r
687 I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_PEC);
\r
692 * @brief Selects the specified I2C PEC position.
\r
693 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
694 * @param I2C_PECPosition: specifies the PEC position.
\r
695 * This parameter can be one of the following values:
\r
696 * @arg I2C_PECPosition_Next: indicates that the next byte is PEC
\r
697 * @arg I2C_PECPosition_Current: indicates that current byte is PEC
\r
700 void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition)
\r
702 /* Check the parameters */
\r
703 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
704 assert_param(IS_I2C_PEC_POSITION(I2C_PECPosition));
\r
705 if (I2C_PECPosition == I2C_PECPosition_Next)
\r
707 /* Next byte in shift register is PEC */
\r
708 I2Cx->CR1 |= I2C_PECPosition_Next;
\r
712 /* Current byte in shift register is PEC */
\r
713 I2Cx->CR1 &= I2C_PECPosition_Current;
\r
718 * @brief Enables or disables the PEC value calculation of the transferred bytes.
\r
719 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
720 * @param NewState: new state of the I2Cx PEC value calculation.
\r
721 * This parameter can be: ENABLE or DISABLE.
\r
724 void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState)
\r
726 /* Check the parameters */
\r
727 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
728 assert_param(IS_FUNCTIONAL_STATE(NewState));
\r
729 if (NewState != DISABLE)
\r
731 /* Enable the selected I2C PEC calculation */
\r
732 I2Cx->CR1 |= I2C_CR1_ENPEC;
\r
736 /* Disable the selected I2C PEC calculation */
\r
737 I2Cx->CR1 &= (uint16_t)~((uint16_t)I2C_CR1_ENPEC);
\r
742 * @brief Returns the PEC value for the specified I2C.
\r
743 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
744 * @retval The PEC value.
\r
746 uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx)
\r
748 /* Check the parameters */
\r
749 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
750 /* Return the selected I2C PEC value */
\r
751 return ((I2Cx->SR2) >> 8);
\r
758 /** @defgroup I2C_Group4 DMA transfers management functions
\r
759 * @brief DMA transfers management functions
\r
762 ===============================================================================
\r
763 DMA transfers management functions
\r
764 ===============================================================================
\r
765 This section provides functions allowing to configure the I2C DMA channels
\r
773 * @brief Enables or disables the specified I2C DMA requests.
\r
774 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
775 * @param NewState: new state of the I2C DMA transfer.
\r
776 * This parameter can be: ENABLE or DISABLE.
\r
779 void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
\r
781 /* Check the parameters */
\r
782 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
783 assert_param(IS_FUNCTIONAL_STATE(NewState));
\r
784 if (NewState != DISABLE)
\r
786 /* Enable the selected I2C DMA requests */
\r
787 I2Cx->CR2 |= I2C_CR2_DMAEN;
\r
791 /* Disable the selected I2C DMA requests */
\r
792 I2Cx->CR2 &= (uint16_t)~((uint16_t)I2C_CR2_DMAEN);
\r
797 * @brief Specifies that the next DMA transfer is the last one.
\r
798 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
799 * @param NewState: new state of the I2C DMA last transfer.
\r
800 * This parameter can be: ENABLE or DISABLE.
\r
803 void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
\r
805 /* Check the parameters */
\r
806 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
807 assert_param(IS_FUNCTIONAL_STATE(NewState));
\r
808 if (NewState != DISABLE)
\r
810 /* Next DMA transfer is the last transfer */
\r
811 I2Cx->CR2 |= I2C_CR2_LAST;
\r
815 /* Next DMA transfer is not the last transfer */
\r
816 I2Cx->CR2 &= (uint16_t)~((uint16_t)I2C_CR2_LAST);
\r
824 /** @defgroup I2C_Group5 Interrupts events and flags management functions
\r
825 * @brief Interrupts, events and flags management functions
\r
828 ===============================================================================
\r
829 Interrupts, events and flags management functions
\r
830 ===============================================================================
\r
831 This section provides functions allowing to configure the I2C Interrupts
\r
832 sources and check or clear the flags or pending bits status.
\r
833 The user should identify which mode will be used in his application to manage
\r
834 the communication: Polling mode, Interrupt mode or DMA mode.
\r
836 ===============================================================================
\r
837 I2C State Monitoring Functions
\r
838 ===============================================================================
\r
839 This I2C driver provides three different ways for I2C state monitoring
\r
840 depending on the application requirements and constraints:
\r
843 1. Basic state monitoring (Using I2C_CheckEvent() function)
\r
844 -----------------------------------------------------------
\r
845 It compares the status registers (SR1 and SR2) content to a given event
\r
846 (can be the combination of one or more flags).
\r
847 It returns SUCCESS if the current status includes the given flags
\r
848 and returns ERROR if one or more flags are missing in the current status.
\r
851 - This function is suitable for most applications as well as for startup
\r
852 activity since the events are fully described in the product reference
\r
854 - It is also suitable for users who need to define their own events.
\r
857 - If an error occurs (ie. error flags are set besides to the monitored
\r
858 flags), the I2C_CheckEvent() function may return SUCCESS despite
\r
859 the communication hold or corrupted real state.
\r
860 In this case, it is advised to use error interrupts to monitor
\r
861 the error events and handle them in the interrupt IRQ handler.
\r
864 For error management, it is advised to use the following functions:
\r
865 - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR).
\r
866 - I2Cx_ER_IRQHandler() which is called when the error interrupt occurs.
\r
867 Where x is the peripheral instance (I2C1, I2C2 ...)
\r
868 - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into the
\r
869 I2Cx_ER_IRQHandler() function in order to determine which error occurred.
\r
870 - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd()
\r
871 and/or I2C_GenerateStop() in order to clear the error flag and source
\r
872 and return to correct communication status.
\r
875 2. Advanced state monitoring (Using the function I2C_GetLastEvent())
\r
876 --------------------------------------------------------------------
\r
877 Using the function I2C_GetLastEvent() which returns the image of both status
\r
878 registers in a single word (uint32_t) (Status Register 2 value is shifted left
\r
879 by 16 bits and concatenated to Status Register 1).
\r
882 - This function is suitable for the same applications above but it
\r
883 allows to overcome the mentioned limitation of I2C_GetFlagStatus()
\r
885 - The returned value could be compared to events already defined in
\r
886 the library (stm32l1xx_i2c.h) or to custom values defined by user.
\r
887 This function is suitable when multiple flags are monitored at the
\r
889 - At the opposite of I2C_CheckEvent() function, this function allows
\r
890 user to choose when an event is accepted (when all events flags are
\r
891 set and no other flags are set or just when the needed flags are set
\r
892 like I2C_CheckEvent() function.
\r
895 - User may need to define his own events.
\r
896 - Same remark concerning the error management is applicable for this
\r
897 function if user decides to check only regular communication flags
\r
898 (and ignores error flags).
\r
901 3. Flag-based state monitoring (Using the function I2C_GetFlagStatus())
\r
902 -----------------------------------------------------------------------
\r
904 Using the function I2C_GetFlagStatus() which simply returns the status of
\r
905 one single flag (ie. I2C_FLAG_RXNE ...).
\r
908 - This function could be used for specific applications or in debug
\r
910 - It is suitable when only one flag checking is needed (most I2C
\r
911 events are monitored through multiple flags).
\r
913 - When calling this function, the Status register is accessed.
\r
914 Some flags are cleared when the status register is accessed.
\r
915 So checking the status of one Flag, may clear other ones.
\r
916 - Function may need to be called twice or more in order to monitor
\r
919 For detailed description of Events, please refer to section I2C_Events in
\r
920 stm32l1xx_i2c.h file.
\r
927 * @brief Reads the specified I2C register and returns its value.
\r
928 * @param I2C_Register: specifies the register to read.
\r
929 * This parameter can be one of the following values:
\r
930 * @arg I2C_Register_CR1: CR1 register.
\r
931 * @arg I2C_Register_CR2: CR2 register.
\r
932 * @arg I2C_Register_OAR1: OAR1 register.
\r
933 * @arg I2C_Register_OAR2: OAR2 register.
\r
934 * @arg I2C_Register_DR: DR register.
\r
935 * @arg I2C_Register_SR1: SR1 register.
\r
936 * @arg I2C_Register_SR2: SR2 register.
\r
937 * @arg I2C_Register_CCR: CCR register.
\r
938 * @arg I2C_Register_TRISE: TRISE register.
\r
939 * @retval The value of the read register.
\r
941 uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register)
\r
943 __IO uint32_t tmp = 0;
\r
945 /* Check the parameters */
\r
946 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
947 assert_param(IS_I2C_REGISTER(I2C_Register));
\r
949 tmp = (uint32_t) I2Cx;
\r
950 tmp += I2C_Register;
\r
952 /* Return the selected register value */
\r
953 return (*(__IO uint16_t *) tmp);
\r
957 * @brief Enables or disables the specified I2C interrupts.
\r
958 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
959 * @param I2C_IT: specifies the I2C interrupts sources to be enabled or disabled.
\r
960 * This parameter can be any combination of the following values:
\r
961 * @arg I2C_IT_BUF: Buffer interrupt mask
\r
962 * @arg I2C_IT_EVT: Event interrupt mask
\r
963 * @arg I2C_IT_ERR: Error interrupt mask
\r
964 * @param NewState: new state of the specified I2C interrupts.
\r
965 * This parameter can be: ENABLE or DISABLE.
\r
968 void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState)
\r
970 /* Check the parameters */
\r
971 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
972 assert_param(IS_FUNCTIONAL_STATE(NewState));
\r
973 assert_param(IS_I2C_CONFIG_IT(I2C_IT));
\r
975 if (NewState != DISABLE)
\r
977 /* Enable the selected I2C interrupts */
\r
978 I2Cx->CR2 |= I2C_IT;
\r
982 /* Disable the selected I2C interrupts */
\r
983 I2Cx->CR2 &= (uint16_t)~I2C_IT;
\r
988 ===============================================================================
\r
989 1. Basic state monitoring
\r
990 ===============================================================================
\r
994 * @brief Checks whether the last I2Cx Event is equal to the one passed
\r
996 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
997 * @param I2C_EVENT: specifies the event to be checked.
\r
998 * This parameter can be one of the following values:
\r
999 * @arg I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED : EV1
\r
1000 * @arg I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED : EV1
\r
1001 * @arg I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED : EV1
\r
1002 * @arg I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED : EV1
\r
1003 * @arg I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED : EV1
\r
1004 * @arg I2C_EVENT_SLAVE_BYTE_RECEIVED : EV2
\r
1005 * @arg (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF) : EV2
\r
1006 * @arg (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL) : EV2
\r
1007 * @arg I2C_EVENT_SLAVE_BYTE_TRANSMITTED : EV3
\r
1008 * @arg (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF) : EV3
\r
1009 * @arg (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL) : EV3
\r
1010 * @arg I2C_EVENT_SLAVE_ACK_FAILURE : EV3_2
\r
1011 * @arg I2C_EVENT_SLAVE_STOP_DETECTED : EV4
\r
1012 * @arg I2C_EVENT_MASTER_MODE_SELECT : EV5
\r
1013 * @arg I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED : EV6
\r
1014 * @arg I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED : EV6
\r
1015 * @arg I2C_EVENT_MASTER_BYTE_RECEIVED : EV7
\r
1016 * @arg I2C_EVENT_MASTER_BYTE_TRANSMITTING : EV8
\r
1017 * @arg I2C_EVENT_MASTER_BYTE_TRANSMITTED : EV8_2
\r
1018 * @arg I2C_EVENT_MASTER_MODE_ADDRESS10 : EV9
\r
1020 * @note: For detailed description of Events, please refer to section
\r
1021 * I2C_Events in stm32l1xx_i2c.h file.
\r
1023 * @retval An ErrorStatus enumeration value:
\r
1024 * - SUCCESS: Last event is equal to the I2C_EVENT
\r
1025 * - ERROR: Last event is different from the I2C_EVENT
\r
1027 ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT)
\r
1029 uint32_t lastevent = 0;
\r
1030 uint32_t flag1 = 0, flag2 = 0;
\r
1031 ErrorStatus status = ERROR;
\r
1033 /* Check the parameters */
\r
1034 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
1035 assert_param(IS_I2C_EVENT(I2C_EVENT));
\r
1037 /* Read the I2Cx status register */
\r
1038 flag1 = I2Cx->SR1;
\r
1039 flag2 = I2Cx->SR2;
\r
1040 flag2 = flag2 << 16;
\r
1042 /* Get the last event value from I2C status register */
\r
1043 lastevent = (flag1 | flag2) & FLAG_MASK;
\r
1045 /* Check whether the last event contains the I2C_EVENT */
\r
1046 if ((lastevent & I2C_EVENT) == I2C_EVENT)
\r
1048 /* SUCCESS: last event is equal to I2C_EVENT */
\r
1053 /* ERROR: last event is different from I2C_EVENT */
\r
1056 /* Return status */
\r
1061 ===============================================================================
\r
1062 2. Advanced state monitoring
\r
1063 ===============================================================================
\r
1067 * @brief Returns the last I2Cx Event.
\r
1068 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
1070 * @note: For detailed description of Events, please refer to section
\r
1071 * I2C_Events in stm32l1xx_i2c.h file.
\r
1073 * @retval The last event
\r
1075 uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx)
\r
1077 uint32_t lastevent = 0;
\r
1078 uint32_t flag1 = 0, flag2 = 0;
\r
1080 /* Check the parameters */
\r
1081 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
1083 /* Read the I2Cx status register */
\r
1084 flag1 = I2Cx->SR1;
\r
1085 flag2 = I2Cx->SR2;
\r
1086 flag2 = flag2 << 16;
\r
1088 /* Get the last event value from I2C status register */
\r
1089 lastevent = (flag1 | flag2) & FLAG_MASK;
\r
1091 /* Return status */
\r
1096 ===============================================================================
\r
1097 3. Flag-based state monitoring
\r
1098 ===============================================================================
\r
1102 * @brief Checks whether the specified I2C flag is set or not.
\r
1103 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
1104 * @param I2C_FLAG: specifies the flag to check.
\r
1105 * This parameter can be one of the following values:
\r
1106 * @arg I2C_FLAG_DUALF: Dual flag (Slave mode)
\r
1107 * @arg I2C_FLAG_SMBHOST: SMBus host header (Slave mode)
\r
1108 * @arg I2C_FLAG_SMBDEFAULT: SMBus default header (Slave mode)
\r
1109 * @arg I2C_FLAG_GENCALL: General call header flag (Slave mode)
\r
1110 * @arg I2C_FLAG_TRA: Transmitter/Receiver flag
\r
1111 * @arg I2C_FLAG_BUSY: Bus busy flag
\r
1112 * @arg I2C_FLAG_MSL: Master/Slave flag
\r
1113 * @arg I2C_FLAG_SMBALERT: SMBus Alert flag
\r
1114 * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag
\r
1115 * @arg I2C_FLAG_PECERR: PEC error in reception flag
\r
1116 * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode)
\r
1117 * @arg I2C_FLAG_AF: Acknowledge failure flag
\r
1118 * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode)
\r
1119 * @arg I2C_FLAG_BERR: Bus error flag
\r
1120 * @arg I2C_FLAG_TXE: Data register empty flag (Transmitter)
\r
1121 * @arg I2C_FLAG_RXNE: Data register not empty (Receiver) flag
\r
1122 * @arg I2C_FLAG_STOPF: Stop detection flag (Slave mode)
\r
1123 * @arg I2C_FLAG_ADD10: 10-bit header sent flag (Master mode)
\r
1124 * @arg I2C_FLAG_BTF: Byte transfer finished flag
\r
1125 * @arg I2C_FLAG_ADDR: Address sent flag (Master mode)
\93ADSL
\94\r
1126 * Address matched flag (Slave mode)
\94ENDAD
\94\r
1127 * @arg I2C_FLAG_SB: Start bit flag (Master mode)
\r
1128 * @retval The new state of I2C_FLAG (SET or RESET).
\r
1130 FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
\r
1132 FlagStatus bitstatus = RESET;
\r
1133 __IO uint32_t i2creg = 0, i2cxbase = 0;
\r
1135 /* Check the parameters */
\r
1136 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
1137 assert_param(IS_I2C_GET_FLAG(I2C_FLAG));
\r
1139 /* Get the I2Cx peripheral base address */
\r
1140 i2cxbase = (uint32_t)I2Cx;
\r
1142 /* Read flag register index */
\r
1143 i2creg = I2C_FLAG >> 28;
\r
1145 /* Get bit[23:0] of the flag */
\r
1146 I2C_FLAG &= FLAG_MASK;
\r
1150 /* Get the I2Cx SR1 register address */
\r
1155 /* Flag in I2Cx SR2 Register */
\r
1156 I2C_FLAG = (uint32_t)(I2C_FLAG >> 16);
\r
1157 /* Get the I2Cx SR2 register address */
\r
1161 if(((*(__IO uint32_t *)i2cxbase) & I2C_FLAG) != (uint32_t)RESET)
\r
1163 /* I2C_FLAG is set */
\r
1168 /* I2C_FLAG is reset */
\r
1169 bitstatus = RESET;
\r
1172 /* Return the I2C_FLAG status */
\r
1177 * @brief Clears the I2Cx's pending flags.
\r
1178 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
1179 * @param I2C_FLAG: specifies the flag to clear.
\r
1180 * This parameter can be any combination of the following values:
\r
1181 * @arg I2C_FLAG_SMBALERT: SMBus Alert flag
\r
1182 * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag
\r
1183 * @arg I2C_FLAG_PECERR: PEC error in reception flag
\r
1184 * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode)
\r
1185 * @arg I2C_FLAG_AF: Acknowledge failure flag
\r
1186 * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode)
\r
1187 * @arg I2C_FLAG_BERR: Bus error flag
\r
1190 * - STOPF (STOP detection) is cleared by software sequence: a read operation
\r
1191 * to I2C_SR1 register (I2C_GetFlagStatus()) followed by a write operation
\r
1192 * to I2C_CR1 register (I2C_Cmd() to re-enable the I2C peripheral).
\r
1193 * - ADD10 (10-bit header sent) is cleared by software sequence: a read
\r
1194 * operation to I2C_SR1 (I2C_GetFlagStatus()) followed by writing the
\r
1195 * second byte of the address in DR register.
\r
1196 * - BTF (Byte Transfer Finished) is cleared by software sequence: a read
\r
1197 * operation to I2C_SR1 register (I2C_GetFlagStatus()) followed by a
\r
1198 * read/write to I2C_DR register (I2C_SendData()).
\r
1199 * - ADDR (Address sent) is cleared by software sequence: a read operation to
\r
1200 * I2C_SR1 register (I2C_GetFlagStatus()) followed by a read operation to
\r
1201 * I2C_SR2 register ((void)(I2Cx->SR2)).
\r
1202 * - SB (Start Bit) is cleared software sequence: a read operation to I2C_SR1
\r
1203 * register (I2C_GetFlagStatus()) followed by a write operation to I2C_DR
\r
1204 * register (I2C_SendData()).
\r
1207 void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
\r
1209 uint32_t flagpos = 0;
\r
1210 /* Check the parameters */
\r
1211 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
1212 assert_param(IS_I2C_CLEAR_FLAG(I2C_FLAG));
\r
1213 /* Get the I2C flag position */
\r
1214 flagpos = I2C_FLAG & FLAG_MASK;
\r
1215 /* Clear the selected I2C flag */
\r
1216 I2Cx->SR1 = (uint16_t)~flagpos;
\r
1220 * @brief Checks whether the specified I2C interrupt has occurred or not.
\r
1221 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
1222 * @param I2C_IT: specifies the interrupt source to check.
\r
1223 * This parameter can be one of the following values:
\r
1224 * @arg I2C_IT_SMBALERT: SMBus Alert flag
\r
1225 * @arg I2C_IT_TIMEOUT: Timeout or Tlow error flag
\r
1226 * @arg I2C_IT_PECERR: PEC error in reception flag
\r
1227 * @arg I2C_IT_OVR: Overrun/Underrun flag (Slave mode)
\r
1228 * @arg I2C_IT_AF: Acknowledge failure flag
\r
1229 * @arg I2C_IT_ARLO: Arbitration lost flag (Master mode)
\r
1230 * @arg I2C_IT_BERR: Bus error flag
\r
1231 * @arg I2C_IT_TXE: Data register empty flag (Transmitter)
\r
1232 * @arg I2C_IT_RXNE: Data register not empty (Receiver) flag
\r
1233 * @arg I2C_IT_STOPF: Stop detection flag (Slave mode)
\r
1234 * @arg I2C_IT_ADD10: 10-bit header sent flag (Master mode)
\r
1235 * @arg I2C_IT_BTF: Byte transfer finished flag
\r
1236 * @arg I2C_IT_ADDR: Address sent flag (Master mode)
\93ADSL
\94\r
1237 * Address matched flag (Slave mode)
\94ENDAD
\94\r
1238 * @arg I2C_IT_SB: Start bit flag (Master mode)
\r
1239 * @retval The new state of I2C_IT (SET or RESET).
\r
1241 ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
\r
1243 ITStatus bitstatus = RESET;
\r
1244 uint32_t enablestatus = 0;
\r
1246 /* Check the parameters */
\r
1247 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
1248 assert_param(IS_I2C_GET_IT(I2C_IT));
\r
1250 /* Check if the interrupt source is enabled or not */
\r
1251 enablestatus = (uint32_t)(((I2C_IT & ITEN_MASK) >> 16) & (I2Cx->CR2)) ;
\r
1253 /* Get bit[23:0] of the flag */
\r
1254 I2C_IT &= FLAG_MASK;
\r
1256 /* Check the status of the specified I2C flag */
\r
1257 if (((I2Cx->SR1 & I2C_IT) != (uint32_t)RESET) && enablestatus)
\r
1259 /* I2C_IT is set */
\r
1264 /* I2C_IT is reset */
\r
1265 bitstatus = RESET;
\r
1267 /* Return the I2C_IT status */
\r
1272 * @brief Clears the I2Cx
\92s interrupt pending bits.
\r
1273 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
\r
1274 * @param I2C_IT: specifies the interrupt pending bit to clear.
\r
1275 * This parameter can be any combination of the following values:
\r
1276 * @arg I2C_IT_SMBALERT: SMBus Alert interrupt
\r
1277 * @arg I2C_IT_TIMEOUT: Timeout or Tlow error interrupt
\r
1278 * @arg I2C_IT_PECERR: PEC error in reception interrupt
\r
1279 * @arg I2C_IT_OVR: Overrun/Underrun interrupt (Slave mode)
\r
1280 * @arg I2C_IT_AF: Acknowledge failure interrupt
\r
1281 * @arg I2C_IT_ARLO: Arbitration lost interrupt (Master mode)
\r
1282 * @arg I2C_IT_BERR: Bus error interrupt
\r
1285 * - STOPF (STOP detection) is cleared by software sequence: a read operation
\r
1286 * to I2C_SR1 register (I2C_GetITStatus()) followed by a write operation to
\r
1287 * I2C_CR1 register (I2C_Cmd() to re-enable the I2C peripheral).
\r
1288 * - ADD10 (10-bit header sent) is cleared by software sequence: a read
\r
1289 * operation to I2C_SR1 (I2C_GetITStatus()) followed by writing the second
\r
1290 * byte of the address in I2C_DR register.
\r
1291 * - BTF (Byte Transfer Finished) is cleared by software sequence: a read
\r
1292 * operation to I2C_SR1 register (I2C_GetITStatus()) followed by a
\r
1293 * read/write to I2C_DR register (I2C_SendData()).
\r
1294 * - ADDR (Address sent) is cleared by software sequence: a read operation to
\r
1295 * I2C_SR1 register (I2C_GetITStatus()) followed by a read operation to
\r
1296 * I2C_SR2 register ((void)(I2Cx->SR2)).
\r
1297 * - SB (Start Bit) is cleared by software sequence: a read operation to
\r
1298 * I2C_SR1 register (I2C_GetITStatus()) followed by a write operation to
\r
1299 * I2C_DR register (I2C_SendData()).
\r
1302 void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
\r
1304 uint32_t flagpos = 0;
\r
1305 /* Check the parameters */
\r
1306 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
\r
1307 assert_param(IS_I2C_CLEAR_IT(I2C_IT));
\r
1308 /* Get the I2C flag position */
\r
1309 flagpos = I2C_IT & FLAG_MASK;
\r
1310 /* Clear the selected I2C flag */
\r
1311 I2Cx->SR1 = (uint16_t)~flagpos;
\r
1330 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
\r