2 ******************************************************************************
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3 * @file stm32l1xx_dac.c
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4 * @author MCD Application Team
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6 * @date 31-December-2010
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7 * @brief This file provides firmware functions to manage the following
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8 * functionalities of the Digital-to-Analog Converter (DAC) peripheral:
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9 * - DAC channels configuration: trigger, output buffer, data format
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11 * - Interrupts and flags management
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15 * ===================================================================
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16 * DAC Peripheral features
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17 * ===================================================================
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18 * The device integrates two 12-bit Digital Analog Converters that can
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19 * be used independently or simultaneously (dual mode):
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20 * 1- DAC channel1 with DAC_OUT1 (PA4) as output
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21 * 1- DAC channel2 with DAC_OUT2 (PA5) as output
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23 * Digital to Analog conversion can be non-triggered using DAC_Trigger_None
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24 * and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register using
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25 * DAC_SetChannel1Data()/DAC_SetChannel2Data.
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27 * Digital to Analog conversion can be triggered by:
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28 * 1- External event: EXTI Line 9 (any GPIOx_Pin9) using DAC_Trigger_Ext_IT9.
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29 * The used pin (GPIOx_Pin9) must be configured in input mode.
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31 * 2- Timers TRGO: TIM2, TIM4, TIM6, TIM7 and TIM9
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32 * (DAC_Trigger_T2_TRGO, DAC_Trigger_T4_TRGO...)
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33 * The timer TRGO event should be selected using TIM_SelectOutputTrigger()
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35 * 3- Software using DAC_Trigger_Software
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37 * Each DAC channel integrates an output buffer that can be used to
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38 * reduce the output impedance, and to drive external loads directly
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39 * without having to add an external operational amplifier.
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40 * To enable, the output buffer use
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41 * DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable;
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43 * Refer to the device datasheet for more details about output impedance
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44 * value with and without output buffer.
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46 * Both DAC channels can be used to generate
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47 * 1- Noise wave using DAC_WaveGeneration_Noise
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48 * 2- Triangle wave using DAC_WaveGeneration_Triangle
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50 * Wave generation can be disabled using DAC_WaveGeneration_None
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52 * The DAC data format can be:
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53 * 1- 8-bit right alignment using DAC_Align_8b_R
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54 * 2- 12-bit left alignment using DAC_Align_12b_L
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55 * 3- 12-bit right alignment using DAC_Align_12b_R
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57 * The analog output voltage on each DAC channel pin is determined
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58 * by the following equation: DAC_OUTx = VREF+ * DOR / 4095
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59 * with DOR is the Data Output Register
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60 * VEF+ is the input voltage reference (refer to the device datasheet)
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61 * e.g. To set DAC_OUT1 to 0.7V, use
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62 * DAC_SetChannel1Data(DAC_Align_12b_R, 868);
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63 * Assuming that VREF+ = 3.3, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
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65 * A DMA1 request can be generated when an external trigger (but not
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66 * a software trigger) occurs if DMA1 requests are enabled using
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68 * DMA1 requests are mapped as following:
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69 * 1- DAC channel1 is mapped on DMA1 channel3 which must be already
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71 * 2- DAC channel2 is mapped on DMA1 channel4 which must be already
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74 * ===================================================================
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75 * How to use this driver
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76 * ===================================================================
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77 * - DAC APB clock must be enabled to get write access to DAC
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79 * RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC, ENABLE)
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80 * - Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
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81 * - Configure the DAC channel using DAC_Init()
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82 * - Enable the DAC channel using DAC_Cmd()
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86 ******************************************************************************
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89 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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90 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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91 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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92 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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93 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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94 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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96 * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
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97 ******************************************************************************
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100 /* Includes ------------------------------------------------------------------*/
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101 #include "stm32l1xx_dac.h"
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102 #include "stm32l1xx_rcc.h"
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104 /** @addtogroup STM32L1xx_StdPeriph_Driver
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109 * @brief DAC driver modules
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113 /* Private typedef -----------------------------------------------------------*/
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114 /* Private define ------------------------------------------------------------*/
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115 /* CR register Mask */
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116 #define CR_CLEAR_MASK ((uint32_t)0x00000FFE)
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118 /* DAC Dual Channels SWTRIG masks */
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119 #define DUAL_SWTRIG_SET ((uint32_t)0x00000003)
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120 #define DUAL_SWTRIG_RESET ((uint32_t)0xFFFFFFFC)
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122 /* DHR registers offsets */
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123 #define DHR12R1_OFFSET ((uint32_t)0x00000008)
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124 #define DHR12R2_OFFSET ((uint32_t)0x00000014)
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125 #define DHR12RD_OFFSET ((uint32_t)0x00000020)
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127 /* DOR register offset */
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128 #define DOR_OFFSET ((uint32_t)0x0000002C)
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130 /* Private macro -------------------------------------------------------------*/
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131 /* Private variables ---------------------------------------------------------*/
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132 /* Private function prototypes -----------------------------------------------*/
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133 /* Private functions ---------------------------------------------------------*/
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135 /** @defgroup DAC_Private_Functions
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139 /** @defgroup DAC_Group1 DAC channels configuration
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140 * @brief DAC channels configuration: trigger, output buffer, data format
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143 ===============================================================================
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144 DAC channels configuration: trigger, output buffer, data format
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145 ===============================================================================
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152 * @brief Deinitializes the DAC peripheral registers to their default reset values.
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156 void DAC_DeInit(void)
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158 /* Enable DAC reset state */
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159 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, ENABLE);
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160 /* Release DAC from reset state */
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161 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, DISABLE);
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165 * @brief Initializes the DAC peripheral according to the specified
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166 * parameters in the DAC_InitStruct.
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167 * @param DAC_Channel: the selected DAC channel.
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168 * This parameter can be one of the following values:
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169 * @arg DAC_Channel_1: DAC Channel1 selected
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170 * @arg DAC_Channel_2: DAC Channel2 selected
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171 * @param DAC_InitStruct: pointer to a DAC_InitTypeDef structure that
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172 * contains the configuration information for the specified DAC channel.
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173 * DAC_Trigger selects the trigger source: EXTI Line 9, TIM2, TIM4....
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174 * DAC_WaveGeneration selects the waveform to be generated: noise, triangle
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175 * DAC_LFSRUnmask_TriangleAmplitude
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176 * defines the LFSR when noise waveform is selected by DAC_WaveGeneration
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177 * or defines the amplitude of the triangle waveform when it is
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178 * selected by DAC_WaveGeneration
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179 * DAC_OutputBuffer enables/disables the output buffer on DAC_OUTx
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182 void DAC_Init(uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct)
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184 uint32_t tmpreg1 = 0, tmpreg2 = 0;
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186 /* Check the DAC parameters */
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187 assert_param(IS_DAC_TRIGGER(DAC_InitStruct->DAC_Trigger));
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188 assert_param(IS_DAC_GENERATE_WAVE(DAC_InitStruct->DAC_WaveGeneration));
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189 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude));
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190 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(DAC_InitStruct->DAC_OutputBuffer));
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192 /*---------------------------- DAC CR Configuration --------------------------*/
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193 /* Get the DAC CR value */
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195 /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
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196 tmpreg1 &= ~(CR_CLEAR_MASK << DAC_Channel);
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197 /* Configure for the selected DAC channel: buffer output, trigger, wave generation,
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198 mask/amplitude for wave generation */
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199 /* Set TSELx and TENx bits according to DAC_Trigger value */
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200 /* Set WAVEx bits according to DAC_WaveGeneration value */
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201 /* Set MAMPx bits according to DAC_LFSRUnmask_TriangleAmplitude value */
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202 /* Set BOFFx bit according to DAC_OutputBuffer value */
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203 tmpreg2 = (DAC_InitStruct->DAC_Trigger | DAC_InitStruct->DAC_WaveGeneration |
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204 DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude | DAC_InitStruct->DAC_OutputBuffer);
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205 /* Calculate CR register value depending on DAC_Channel */
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206 tmpreg1 |= tmpreg2 << DAC_Channel;
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207 /* Write to DAC CR */
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212 * @brief Fills each DAC_InitStruct member with its default value.
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213 * @param DAC_InitStruct : pointer to a DAC_InitTypeDef structure which will
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217 void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct)
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219 /*--------------- Reset DAC init structure parameters values -----------------*/
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220 /* Initialize the DAC_Trigger member */
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221 DAC_InitStruct->DAC_Trigger = DAC_Trigger_None;
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222 /* Initialize the DAC_WaveGeneration member */
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223 DAC_InitStruct->DAC_WaveGeneration = DAC_WaveGeneration_None;
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224 /* Initialize the DAC_LFSRUnmask_TriangleAmplitude member */
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225 DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude = DAC_LFSRUnmask_Bit0;
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226 /* Initialize the DAC_OutputBuffer member */
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227 DAC_InitStruct->DAC_OutputBuffer = DAC_OutputBuffer_Enable;
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231 * @brief Enables or disables the specified DAC channel.
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232 * @param DAC_Channel: The selected DAC channel.
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233 * This parameter can be one of the following values:
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234 * @arg DAC_Channel_1: DAC Channel1 selected
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235 * @arg DAC_Channel_2: DAC Channel2 selected
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236 * @param NewState: new state of the DAC channel.
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237 * This parameter can be: ENABLE or DISABLE.
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238 * @note When the DAC channel is enabled the trigger source can no more
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242 void DAC_Cmd(uint32_t DAC_Channel, FunctionalState NewState)
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244 /* Check the parameters */
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245 assert_param(IS_DAC_CHANNEL(DAC_Channel));
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246 assert_param(IS_FUNCTIONAL_STATE(NewState));
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248 if (NewState != DISABLE)
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250 /* Enable the selected DAC channel */
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251 DAC->CR |= (DAC_CR_EN1 << DAC_Channel);
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255 /* Disable the selected DAC channel */
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256 DAC->CR &= (~(DAC_CR_EN1 << DAC_Channel));
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261 * @brief Enables or disables the selected DAC channel software trigger.
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262 * @param DAC_Channel: the selected DAC channel.
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263 * This parameter can be one of the following values:
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264 * @arg DAC_Channel_1: DAC Channel1 selected
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265 * @arg DAC_Channel_2: DAC Channel2 selected
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266 * @param NewState: new state of the selected DAC channel software trigger.
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267 * This parameter can be: ENABLE or DISABLE.
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270 void DAC_SoftwareTriggerCmd(uint32_t DAC_Channel, FunctionalState NewState)
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272 /* Check the parameters */
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273 assert_param(IS_DAC_CHANNEL(DAC_Channel));
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274 assert_param(IS_FUNCTIONAL_STATE(NewState));
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276 if (NewState != DISABLE)
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278 /* Enable software trigger for the selected DAC channel */
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279 DAC->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG1 << (DAC_Channel >> 4);
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283 /* Disable software trigger for the selected DAC channel */
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284 DAC->SWTRIGR &= ~((uint32_t)DAC_SWTRIGR_SWTRIG1 << (DAC_Channel >> 4));
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289 * @brief Enables or disables simultaneously the two DAC channels software
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291 * @param NewState: new state of the DAC channels software triggers.
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292 * This parameter can be: ENABLE or DISABLE.
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295 void DAC_DualSoftwareTriggerCmd(FunctionalState NewState)
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297 /* Check the parameters */
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298 assert_param(IS_FUNCTIONAL_STATE(NewState));
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300 if (NewState != DISABLE)
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302 /* Enable software trigger for both DAC channels */
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303 DAC->SWTRIGR |= DUAL_SWTRIG_SET;
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307 /* Disable software trigger for both DAC channels */
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308 DAC->SWTRIGR &= DUAL_SWTRIG_RESET;
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313 * @brief Enables or disables the selected DAC channel wave generation.
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314 * @param DAC_Channel: the selected DAC channel.
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315 * This parameter can be one of the following values:
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316 * @arg DAC_Channel_1: DAC Channel1 selected
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317 * @arg DAC_Channel_2: DAC Channel2 selected
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318 * @param DAC_Wave: Specifies the wave type to enable or disable.
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319 * This parameter can be one of the following values:
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320 * @arg DAC_Wave_Noise: noise wave generation
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321 * @arg DAC_Wave_Triangle: triangle wave generation
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322 * @param NewState: new state of the selected DAC channel wave generation.
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323 * This parameter can be: ENABLE or DISABLE.
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327 void DAC_WaveGenerationCmd(uint32_t DAC_Channel, uint32_t DAC_Wave, FunctionalState NewState)
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329 /* Check the parameters */
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330 assert_param(IS_DAC_CHANNEL(DAC_Channel));
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331 assert_param(IS_DAC_WAVE(DAC_Wave));
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332 assert_param(IS_FUNCTIONAL_STATE(NewState));
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334 if (NewState != DISABLE)
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336 /* Enable the selected wave generation for the selected DAC channel */
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337 DAC->CR |= DAC_Wave << DAC_Channel;
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341 /* Disable the selected wave generation for the selected DAC channel */
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342 DAC->CR &= ~(DAC_Wave << DAC_Channel);
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347 * @brief Set the specified data holding register value for DAC channel1.
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348 * @param DAC_Align: Specifies the data alignment for DAC channel1.
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349 * This parameter can be one of the following values:
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350 * @arg DAC_Align_8b_R: 8bit right data alignment selected
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351 * @arg DAC_Align_12b_L: 12bit left data alignment selected
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352 * @arg DAC_Align_12b_R: 12bit right data alignment selected
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353 * @param Data : Data to be loaded in the selected data holding register.
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356 void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data)
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358 __IO uint32_t tmp = 0;
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360 /* Check the parameters */
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361 assert_param(IS_DAC_ALIGN(DAC_Align));
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362 assert_param(IS_DAC_DATA(Data));
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364 tmp = (uint32_t)DAC_BASE;
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365 tmp += DHR12R1_OFFSET + DAC_Align;
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367 /* Set the DAC channel1 selected data holding register */
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368 *(__IO uint32_t *) tmp = Data;
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372 * @brief Set the specified data holding register value for DAC channel2.
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373 * @param DAC_Align: Specifies the data alignment for DAC channel2.
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374 * This parameter can be one of the following values:
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375 * @arg DAC_Align_8b_R: 8bit right data alignment selected
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376 * @arg DAC_Align_12b_L: 12bit left data alignment selected
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377 * @arg DAC_Align_12b_R: 12bit right data alignment selected
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378 * @param Data : Data to be loaded in the selected data holding register.
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381 void DAC_SetChannel2Data(uint32_t DAC_Align, uint16_t Data)
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383 __IO uint32_t tmp = 0;
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385 /* Check the parameters */
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386 assert_param(IS_DAC_ALIGN(DAC_Align));
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387 assert_param(IS_DAC_DATA(Data));
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389 tmp = (uint32_t)DAC_BASE;
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390 tmp += DHR12R2_OFFSET + DAC_Align;
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392 /* Set the DAC channel2 selected data holding register */
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393 *(__IO uint32_t *)tmp = Data;
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397 * @brief Set the specified data holding register value for dual channel DAC.
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398 * @param DAC_Align: Specifies the data alignment for dual channel DAC.
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399 * This parameter can be one of the following values:
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400 * @arg DAC_Align_8b_R: 8bit right data alignment selected
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401 * @arg DAC_Align_12b_L: 12bit left data alignment selected
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402 * @arg DAC_Align_12b_R: 12bit right data alignment selected
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403 * @param Data2: Data for DAC Channel2 to be loaded in the selected data
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404 * holding register.
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405 * @param Data1: Data for DAC Channel1 to be loaded in the selected data
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406 * holding register.
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407 * @note In dual mode, a unique register access is required to write in both
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408 * DAC channels at the same time.
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411 void DAC_SetDualChannelData(uint32_t DAC_Align, uint16_t Data2, uint16_t Data1)
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413 uint32_t data = 0, tmp = 0;
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415 /* Check the parameters */
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416 assert_param(IS_DAC_ALIGN(DAC_Align));
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417 assert_param(IS_DAC_DATA(Data1));
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418 assert_param(IS_DAC_DATA(Data2));
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420 /* Calculate and set dual DAC data holding register value */
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421 if (DAC_Align == DAC_Align_8b_R)
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423 data = ((uint32_t)Data2 << 8) | Data1;
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427 data = ((uint32_t)Data2 << 16) | Data1;
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430 tmp = (uint32_t)DAC_BASE;
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431 tmp += DHR12RD_OFFSET + DAC_Align;
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433 /* Set the dual DAC selected data holding register */
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434 *(__IO uint32_t *)tmp = data;
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438 * @brief Returns the last data output value of the selected DAC channel.
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439 * @param DAC_Channel: the selected DAC channel.
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440 * This parameter can be one of the following values:
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441 * @arg DAC_Channel_1: DAC Channel1 selected
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442 * @arg DAC_Channel_2: DAC Channel2 selected
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443 * @retval The selected DAC channel data output value.
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445 uint16_t DAC_GetDataOutputValue(uint32_t DAC_Channel)
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447 __IO uint32_t tmp = 0;
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449 /* Check the parameters */
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450 assert_param(IS_DAC_CHANNEL(DAC_Channel));
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452 tmp = (uint32_t) DAC_BASE ;
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453 tmp += DOR_OFFSET + ((uint32_t)DAC_Channel >> 2);
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455 /* Returns the DAC channel data output register value */
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456 return (uint16_t) (*(__IO uint32_t*) tmp);
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463 /** @defgroup DAC_Group2 DMA management functions
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464 * @brief DMA management functions
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467 ===============================================================================
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468 DMA management functions
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469 ===============================================================================
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476 * @brief Enables or disables the specified DAC channel DMA request.
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477 * When enabled DMA1 is generated when an external trigger (EXTI Line9,
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478 * TIM2, TIM4, TIM6, TIM7 or TIM9 but not a software trigger) occurs
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479 * @param DAC_Channel: the selected DAC channel.
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480 * This parameter can be one of the following values:
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481 * @arg DAC_Channel_1: DAC Channel1 selected
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482 * @arg DAC_Channel_2: DAC Channel2 selected
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483 * @param NewState: new state of the selected DAC channel DMA request.
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484 * This parameter can be: ENABLE or DISABLE.
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485 * The DAC channel1 (channel2) is mapped on DMA1 channel3 (channel4) which
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486 * must be already configured.
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489 void DAC_DMACmd(uint32_t DAC_Channel, FunctionalState NewState)
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491 /* Check the parameters */
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492 assert_param(IS_DAC_CHANNEL(DAC_Channel));
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493 assert_param(IS_FUNCTIONAL_STATE(NewState));
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495 if (NewState != DISABLE)
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497 /* Enable the selected DAC channel DMA request */
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498 DAC->CR |= (DAC_CR_DMAEN1 << DAC_Channel);
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502 /* Disable the selected DAC channel DMA request */
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503 DAC->CR &= (~(DAC_CR_DMAEN1 << DAC_Channel));
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511 /** @defgroup DAC_Group3 Interrupts and flags management functions
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512 * @brief Interrupts and flags management functions
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515 ===============================================================================
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516 Interrupts and flags management functions
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517 ===============================================================================
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524 * @brief Enables or disables the specified DAC interrupts.
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525 * @param DAC_Channel: the selected DAC channel.
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526 * This parameter can be one of the following values:
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527 * @arg DAC_Channel_1: DAC Channel1 selected
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528 * @arg DAC_Channel_2: DAC Channel2 selected
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529 * @param DAC_IT: specifies the DAC interrupt sources to be enabled or disabled.
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530 * This parameter can be the following values:
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531 * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask
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532 * @note The DMA underrun occurs when a second external trigger arrives before
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533 * the acknowledgement for the first external trigger is received (first request).
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534 * @param NewState: new state of the specified DAC interrupts.
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535 * This parameter can be: ENABLE or DISABLE.
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538 void DAC_ITConfig(uint32_t DAC_Channel, uint32_t DAC_IT, FunctionalState NewState)
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540 /* Check the parameters */
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541 assert_param(IS_DAC_CHANNEL(DAC_Channel));
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542 assert_param(IS_FUNCTIONAL_STATE(NewState));
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543 assert_param(IS_DAC_IT(DAC_IT));
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545 if (NewState != DISABLE)
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547 /* Enable the selected DAC interrupts */
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548 DAC->CR |= (DAC_IT << DAC_Channel);
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552 /* Disable the selected DAC interrupts */
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553 DAC->CR &= (~(uint32_t)(DAC_IT << DAC_Channel));
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558 * @brief Checks whether the specified DAC flag is set or not.
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559 * @param DAC_Channel: thee selected DAC channel.
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560 * This parameter can be one of the following values:
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561 * @arg DAC_Channel_1: DAC Channel1 selected
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562 * @arg DAC_Channel_2: DAC Channel2 selected
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563 * @param DAC_FLAG: specifies the flag to check.
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564 * This parameter can be only of the following value:
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565 * @arg DAC_FLAG_DMAUDR: DMA underrun flag
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566 * @note The DMA underrun occurs when a second external trigger arrives before
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567 * the acknowledgement for the first external trigger is received (first request).
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568 * @retval The new state of DAC_FLAG (SET or RESET).
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570 FlagStatus DAC_GetFlagStatus(uint32_t DAC_Channel, uint32_t DAC_FLAG)
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572 FlagStatus bitstatus = RESET;
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573 /* Check the parameters */
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574 assert_param(IS_DAC_CHANNEL(DAC_Channel));
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575 assert_param(IS_DAC_FLAG(DAC_FLAG));
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577 /* Check the status of the specified DAC flag */
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578 if ((DAC->SR & (DAC_FLAG << DAC_Channel)) != (uint8_t)RESET)
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580 /* DAC_FLAG is set */
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585 /* DAC_FLAG is reset */
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588 /* Return the DAC_FLAG status */
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593 * @brief Clears the DAC channel's pending flags.
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594 * @param DAC_Channel: the selected DAC channel.
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595 * This parameter can be one of the following values:
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596 * @arg DAC_Channel_1: DAC Channel1 selected
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597 * @arg DAC_Channel_2: DAC Channel2 selected
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598 * @param DAC_FLAG: specifies the flag to clear.
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599 * This parameter can be of the following value:
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600 * @arg DAC_FLAG_DMAUDR: DMA underrun flag
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603 void DAC_ClearFlag(uint32_t DAC_Channel, uint32_t DAC_FLAG)
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605 /* Check the parameters */
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606 assert_param(IS_DAC_CHANNEL(DAC_Channel));
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607 assert_param(IS_DAC_FLAG(DAC_FLAG));
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609 /* Clear the selected DAC flags */
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610 DAC->SR = (DAC_FLAG << DAC_Channel);
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614 * @brief Checks whether the specified DAC interrupt has occurred or not.
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615 * @param DAC_Channel: the selected DAC channel.
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616 * This parameter can be one of the following values:
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617 * @arg DAC_Channel_1: DAC Channel1 selected
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618 * @arg DAC_Channel_2: DAC Channel2 selected
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619 * @param DAC_IT: specifies the DAC interrupt source to check.
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620 * This parameter can be the following values:
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621 * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask
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622 * @note The DMA underrun occurs when a second external trigger arrives before
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623 * the acknowledgement for the first external trigger is received (first request).
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624 * @retval The new state of DAC_IT (SET or RESET).
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626 ITStatus DAC_GetITStatus(uint32_t DAC_Channel, uint32_t DAC_IT)
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628 ITStatus bitstatus = RESET;
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629 uint32_t enablestatus = 0;
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631 /* Check the parameters */
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632 assert_param(IS_DAC_CHANNEL(DAC_Channel));
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633 assert_param(IS_DAC_IT(DAC_IT));
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635 /* Get the DAC_IT enable bit status */
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636 enablestatus = (DAC->CR & (DAC_IT << DAC_Channel)) ;
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638 /* Check the status of the specified DAC interrupt */
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639 if (((DAC->SR & (DAC_IT << DAC_Channel)) != (uint32_t)RESET) && enablestatus)
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641 /* DAC_IT is set */
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646 /* DAC_IT is reset */
\r
649 /* Return the DAC_IT status */
\r
654 * @brief Clears the DAC channel
\92s interrupt pending bits.
\r
655 * @param DAC_Channel: the selected DAC channel.
\r
656 * This parameter can be one of the following values:
\r
657 * @arg DAC_Channel_1: DAC Channel1 selected
\r
658 * @arg DAC_Channel_2: DAC Channel2 selected
\r
659 * @param DAC_IT: specifies the DAC interrupt pending bit to clear.
\r
660 * This parameter can be the following values:
\r
661 * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask
\r
664 void DAC_ClearITPendingBit(uint32_t DAC_Channel, uint32_t DAC_IT)
\r
666 /* Check the parameters */
\r
667 assert_param(IS_DAC_CHANNEL(DAC_Channel));
\r
668 assert_param(IS_DAC_IT(DAC_IT));
\r
670 /* Clear the selected DAC interrupt pending bits */
\r
671 DAC->SR = (DAC_IT << DAC_Channel);
\r
690 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
\r