2 ******************************************************************************
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3 * @file stm32f10x_spi.c
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4 * @author MCD Application Team
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7 * @brief This file provides all the SPI firmware functions.
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8 ******************************************************************************
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11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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18 * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
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21 /* Includes ------------------------------------------------------------------*/
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22 #include "stm32f10x_spi.h"
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23 #include "stm32f10x_rcc.h"
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25 /** @addtogroup STM32F10x_StdPeriph_Driver
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30 * @brief SPI driver modules
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34 /** @defgroup SPI_Private_TypesDefinitions
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43 /** @defgroup SPI_Private_Defines
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48 #define CR1_SPE_Set ((uint16_t)0x0040)
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49 #define CR1_SPE_Reset ((uint16_t)0xFFBF)
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52 #define I2SCFGR_I2SE_Set ((uint16_t)0x0400)
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53 #define I2SCFGR_I2SE_Reset ((uint16_t)0xFBFF)
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55 /* SPI CRCNext mask */
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56 #define CR1_CRCNext_Set ((uint16_t)0x1000)
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58 /* SPI CRCEN mask */
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59 #define CR1_CRCEN_Set ((uint16_t)0x2000)
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60 #define CR1_CRCEN_Reset ((uint16_t)0xDFFF)
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63 #define CR2_SSOE_Set ((uint16_t)0x0004)
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64 #define CR2_SSOE_Reset ((uint16_t)0xFFFB)
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66 /* SPI registers Masks */
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67 #define CR1_CLEAR_Mask ((uint16_t)0x3040)
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68 #define I2SCFGR_CLEAR_Mask ((uint16_t)0xF040)
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70 /* SPI or I2S mode selection masks */
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71 #define SPI_Mode_Select ((uint16_t)0xF7FF)
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72 #define I2S_Mode_Select ((uint16_t)0x0800)
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74 /* I2S clock source selection masks */
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75 #define I2S2_CLOCK_SRC ((uint32_t)(0x00020000))
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76 #define I2S3_CLOCK_SRC ((uint32_t)(0x00040000))
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77 #define I2S_MUL_MASK ((uint32_t)(0x0000F000))
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78 #define I2S_DIV_MASK ((uint32_t)(0x000000F0))
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84 /** @defgroup SPI_Private_Macros
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92 /** @defgroup SPI_Private_Variables
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100 /** @defgroup SPI_Private_FunctionPrototypes
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108 /** @defgroup SPI_Private_Functions
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113 * @brief Deinitializes the SPIx peripheral registers to their default
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114 * reset values (Affects also the I2Ss).
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115 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
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118 void SPI_I2S_DeInit(SPI_TypeDef* SPIx)
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120 /* Check the parameters */
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121 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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125 /* Enable SPI1 reset state */
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126 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
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127 /* Release SPI1 from reset state */
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128 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
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130 else if (SPIx == SPI2)
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132 /* Enable SPI2 reset state */
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133 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
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134 /* Release SPI2 from reset state */
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135 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
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141 /* Enable SPI3 reset state */
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142 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE);
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143 /* Release SPI3 from reset state */
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144 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE);
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150 * @brief Initializes the SPIx peripheral according to the specified
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151 * parameters in the SPI_InitStruct.
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152 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
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153 * @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure that
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154 * contains the configuration information for the specified SPI peripheral.
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157 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
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159 uint16_t tmpreg = 0;
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161 /* check the parameters */
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162 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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164 /* Check the SPI parameters */
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165 assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
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166 assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
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167 assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize));
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168 assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
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169 assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
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170 assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
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171 assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
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172 assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
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173 assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
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175 /*---------------------------- SPIx CR1 Configuration ------------------------*/
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176 /* Get the SPIx CR1 value */
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177 tmpreg = SPIx->CR1;
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178 /* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */
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179 tmpreg &= CR1_CLEAR_Mask;
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180 /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
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181 master/salve mode, CPOL and CPHA */
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182 /* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
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183 /* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */
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184 /* Set LSBFirst bit according to SPI_FirstBit value */
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185 /* Set BR bits according to SPI_BaudRatePrescaler value */
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186 /* Set CPOL bit according to SPI_CPOL value */
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187 /* Set CPHA bit according to SPI_CPHA value */
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188 tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode |
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189 SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL |
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190 SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS |
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191 SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit);
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192 /* Write to SPIx CR1 */
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193 SPIx->CR1 = tmpreg;
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195 /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
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196 SPIx->I2SCFGR &= SPI_Mode_Select;
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198 /*---------------------------- SPIx CRCPOLY Configuration --------------------*/
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199 /* Write to SPIx CRCPOLY */
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200 SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
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204 * @brief Initializes the SPIx peripheral according to the specified
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205 * parameters in the I2S_InitStruct.
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206 * @param SPIx: where x can be 2 or 3 to select the SPI peripheral
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207 * (configured in I2S mode).
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208 * @param I2S_InitStruct: pointer to an I2S_InitTypeDef structure that
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209 * contains the configuration information for the specified SPI peripheral
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210 * configured in I2S mode.
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212 * The function calculates the optimal prescaler needed to obtain the most
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213 * accurate audio frequency (depending on the I2S clock source, the PLL values
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214 * and the product configuration). But in case the prescaler value is greater
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215 * than 511, the default value (0x02) will be configured instead. *
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218 void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct)
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220 uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
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222 RCC_ClocksTypeDef RCC_Clocks;
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223 uint32_t sourceclock = 0;
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225 /* Check the I2S parameters */
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226 assert_param(IS_SPI_23_PERIPH(SPIx));
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227 assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode));
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228 assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard));
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229 assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat));
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230 assert_param(IS_I2S_MCLK_OUTPUT(I2S_InitStruct->I2S_MCLKOutput));
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231 assert_param(IS_I2S_AUDIO_FREQ(I2S_InitStruct->I2S_AudioFreq));
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232 assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL));
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234 /*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/
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235 /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
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236 SPIx->I2SCFGR &= I2SCFGR_CLEAR_Mask;
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237 SPIx->I2SPR = 0x0002;
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239 /* Get the I2SCFGR register value */
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240 tmpreg = SPIx->I2SCFGR;
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242 /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
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243 if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default)
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245 i2sodd = (uint16_t)0;
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246 i2sdiv = (uint16_t)2;
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248 /* If the requested audio frequency is not the default, compute the prescaler */
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251 /* Check the frame length (For the Prescaler computing) */
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252 if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b)
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254 /* Packet length is 16 bits */
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259 /* Packet length is 32 bits */
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263 /* Get the I2S clock source mask depending on the peripheral number */
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264 if(((uint32_t)SPIx) == SPI2_BASE)
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266 /* The mask is relative to I2S2 */
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267 tmp = I2S2_CLOCK_SRC;
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271 /* The mask is relative to I2S3 */
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272 tmp = I2S3_CLOCK_SRC;
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275 /* Check the I2S clock source configuration depending on the Device:
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276 Only Connectivity line devices have the PLL3 VCO clock */
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277 #ifdef STM32F10X_CL
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278 if((RCC->CFGR2 & tmp) != 0)
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280 /* Get the configuration bits of RCC PLL3 multiplier */
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281 tmp = (uint32_t)((RCC->CFGR2 & I2S_MUL_MASK) >> 12);
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283 /* Get the value of the PLL3 multiplier */
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284 if((tmp > 5) && (tmp < 15))
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286 /* Multplier is between 8 and 14 (value 15 is forbidden) */
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293 /* Multiplier is 20 */
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297 /* Get the PREDIV2 value */
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298 sourceclock = (uint32_t)(((RCC->CFGR2 & I2S_DIV_MASK) >> 4) + 1);
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300 /* Calculate the Source Clock frequency based on PLL3 and PREDIV2 values */
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301 sourceclock = (uint32_t) ((HSE_Value / sourceclock) * tmp * 2);
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305 /* I2S Clock source is System clock: Get System Clock frequency */
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306 RCC_GetClocksFreq(&RCC_Clocks);
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308 /* Get the source clock value: based on System Clock value */
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309 sourceclock = RCC_Clocks.SYSCLK_Frequency;
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311 #else /* STM32F10X_HD */
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312 /* I2S Clock source is System clock: Get System Clock frequency */
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313 RCC_GetClocksFreq(&RCC_Clocks);
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315 /* Get the source clock value: based on System Clock value */
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316 sourceclock = RCC_Clocks.SYSCLK_Frequency;
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317 #endif /* STM32F10X_CL */
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319 /* Compute the Real divider depending on the MCLK output state with a flaoting point */
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320 if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable)
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322 /* MCLK output is enabled */
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323 tmp = (uint16_t)(((((sourceclock / 256) * 10) / I2S_InitStruct->I2S_AudioFreq)) + 5);
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327 /* MCLK output is disabled */
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328 tmp = (uint16_t)(((((sourceclock / (32 * packetlength)) *10 ) / I2S_InitStruct->I2S_AudioFreq)) + 5);
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331 /* Remove the flaoting point */
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334 /* Check the parity of the divider */
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335 i2sodd = (uint16_t)(tmp & (uint16_t)0x0001);
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337 /* Compute the i2sdiv prescaler */
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338 i2sdiv = (uint16_t)((tmp - i2sodd) / 2);
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340 /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
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341 i2sodd = (uint16_t) (i2sodd << 8);
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344 /* Test if the divider is 1 or 0 or greater than 0xFF */
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345 if ((i2sdiv < 2) || (i2sdiv > 0xFF))
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347 /* Set the default values */
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352 /* Write to SPIx I2SPR register the computed value */
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353 SPIx->I2SPR = (uint16_t)(i2sdiv | (uint16_t)(i2sodd | (uint16_t)I2S_InitStruct->I2S_MCLKOutput));
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355 /* Configure the I2S with the SPI_InitStruct values */
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356 tmpreg |= (uint16_t)(I2S_Mode_Select | (uint16_t)(I2S_InitStruct->I2S_Mode | \
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357 (uint16_t)(I2S_InitStruct->I2S_Standard | (uint16_t)(I2S_InitStruct->I2S_DataFormat | \
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358 (uint16_t)I2S_InitStruct->I2S_CPOL))));
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360 /* Write to SPIx I2SCFGR */
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361 SPIx->I2SCFGR = tmpreg;
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365 * @brief Fills each SPI_InitStruct member with its default value.
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366 * @param SPI_InitStruct : pointer to a SPI_InitTypeDef structure which will be initialized.
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369 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct)
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371 /*--------------- Reset SPI init structure parameters values -----------------*/
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372 /* Initialize the SPI_Direction member */
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373 SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;
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374 /* initialize the SPI_Mode member */
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375 SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
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376 /* initialize the SPI_DataSize member */
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377 SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
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378 /* Initialize the SPI_CPOL member */
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379 SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
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380 /* Initialize the SPI_CPHA member */
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381 SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
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382 /* Initialize the SPI_NSS member */
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383 SPI_InitStruct->SPI_NSS = SPI_NSS_Hard;
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384 /* Initialize the SPI_BaudRatePrescaler member */
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385 SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
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386 /* Initialize the SPI_FirstBit member */
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387 SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
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388 /* Initialize the SPI_CRCPolynomial member */
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389 SPI_InitStruct->SPI_CRCPolynomial = 7;
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393 * @brief Fills each I2S_InitStruct member with its default value.
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394 * @param I2S_InitStruct : pointer to a I2S_InitTypeDef structure which will be initialized.
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397 void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct)
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399 /*--------------- Reset I2S init structure parameters values -----------------*/
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400 /* Initialize the I2S_Mode member */
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401 I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx;
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403 /* Initialize the I2S_Standard member */
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404 I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips;
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406 /* Initialize the I2S_DataFormat member */
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407 I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b;
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409 /* Initialize the I2S_MCLKOutput member */
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410 I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable;
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412 /* Initialize the I2S_AudioFreq member */
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413 I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default;
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415 /* Initialize the I2S_CPOL member */
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416 I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low;
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420 * @brief Enables or disables the specified SPI peripheral.
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421 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
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422 * @param NewState: new state of the SPIx peripheral.
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423 * This parameter can be: ENABLE or DISABLE.
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426 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
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428 /* Check the parameters */
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429 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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430 assert_param(IS_FUNCTIONAL_STATE(NewState));
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431 if (NewState != DISABLE)
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433 /* Enable the selected SPI peripheral */
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434 SPIx->CR1 |= CR1_SPE_Set;
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438 /* Disable the selected SPI peripheral */
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439 SPIx->CR1 &= CR1_SPE_Reset;
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444 * @brief Enables or disables the specified SPI peripheral (in I2S mode).
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445 * @param SPIx: where x can be 2 or 3 to select the SPI peripheral.
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446 * @param NewState: new state of the SPIx peripheral.
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447 * This parameter can be: ENABLE or DISABLE.
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450 void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
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452 /* Check the parameters */
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453 assert_param(IS_SPI_23_PERIPH(SPIx));
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454 assert_param(IS_FUNCTIONAL_STATE(NewState));
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455 if (NewState != DISABLE)
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457 /* Enable the selected SPI peripheral (in I2S mode) */
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458 SPIx->I2SCFGR |= I2SCFGR_I2SE_Set;
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462 /* Disable the selected SPI peripheral (in I2S mode) */
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463 SPIx->I2SCFGR &= I2SCFGR_I2SE_Reset;
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468 * @brief Enables or disables the specified SPI/I2S interrupts.
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469 * @param SPIx: where x can be
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470 * - 1, 2 or 3 in SPI mode
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471 * - 2 or 3 in I2S mode
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472 * @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to be enabled or disabled.
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473 * This parameter can be one of the following values:
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474 * @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask
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475 * @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask
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476 * @arg SPI_I2S_IT_ERR: Error interrupt mask
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477 * @param NewState: new state of the specified SPI/I2S interrupt.
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478 * This parameter can be: ENABLE or DISABLE.
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481 void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState)
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483 uint16_t itpos = 0, itmask = 0 ;
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484 /* Check the parameters */
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485 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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486 assert_param(IS_FUNCTIONAL_STATE(NewState));
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487 assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT));
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489 /* Get the SPI/I2S IT index */
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490 itpos = SPI_I2S_IT >> 4;
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492 /* Set the IT mask */
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493 itmask = (uint16_t)1 << (uint16_t)itpos;
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495 if (NewState != DISABLE)
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497 /* Enable the selected SPI/I2S interrupt */
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498 SPIx->CR2 |= itmask;
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502 /* Disable the selected SPI/I2S interrupt */
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503 SPIx->CR2 &= (uint16_t)~itmask;
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508 * @brief Enables or disables the SPIx/I2Sx DMA interface.
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509 * @param SPIx: where x can be
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510 * - 1, 2 or 3 in SPI mode
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511 * - 2 or 3 in I2S mode
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512 * @param SPI_I2S_DMAReq: specifies the SPI/I2S DMA transfer request to be enabled or disabled.
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513 * This parameter can be any combination of the following values:
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514 * @arg SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request
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515 * @arg SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request
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516 * @param NewState: new state of the selected SPI/I2S DMA transfer request.
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517 * This parameter can be: ENABLE or DISABLE.
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520 void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState)
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522 /* Check the parameters */
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523 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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524 assert_param(IS_FUNCTIONAL_STATE(NewState));
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525 assert_param(IS_SPI_I2S_DMAREQ(SPI_I2S_DMAReq));
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526 if (NewState != DISABLE)
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528 /* Enable the selected SPI/I2S DMA requests */
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529 SPIx->CR2 |= SPI_I2S_DMAReq;
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533 /* Disable the selected SPI/I2S DMA requests */
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534 SPIx->CR2 &= (uint16_t)~SPI_I2S_DMAReq;
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539 * @brief Transmits a Data through the SPIx/I2Sx peripheral.
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540 * @param SPIx: where x can be
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541 * - 1, 2 or 3 in SPI mode
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542 * - 2 or 3 in I2S mode
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543 * @param Data : Data to be transmitted.
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546 void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data)
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548 /* Check the parameters */
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549 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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551 /* Write in the DR register the data to be sent */
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556 * @brief Returns the most recent received data by the SPIx/I2Sx peripheral.
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557 * @param SPIx: where x can be
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558 * - 1, 2 or 3 in SPI mode
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559 * - 2 or 3 in I2S mode
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560 * @retval The value of the received data.
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562 uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx)
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564 /* Check the parameters */
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565 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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567 /* Return the data in the DR register */
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572 * @brief Configures internally by software the NSS pin for the selected SPI.
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573 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
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574 * @param SPI_NSSInternalSoft: specifies the SPI NSS internal state.
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575 * This parameter can be one of the following values:
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576 * @arg SPI_NSSInternalSoft_Set: Set NSS pin internally
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577 * @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally
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580 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft)
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582 /* Check the parameters */
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583 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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584 assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft));
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585 if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset)
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587 /* Set NSS pin internally by software */
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588 SPIx->CR1 |= SPI_NSSInternalSoft_Set;
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592 /* Reset NSS pin internally by software */
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593 SPIx->CR1 &= SPI_NSSInternalSoft_Reset;
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598 * @brief Enables or disables the SS output for the selected SPI.
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599 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
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600 * @param NewState: new state of the SPIx SS output.
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601 * This parameter can be: ENABLE or DISABLE.
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604 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
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606 /* Check the parameters */
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607 assert_param(IS_SPI_ALL_PERIPH(SPIx));
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608 assert_param(IS_FUNCTIONAL_STATE(NewState));
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609 if (NewState != DISABLE)
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611 /* Enable the selected SPI SS output */
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612 SPIx->CR2 |= CR2_SSOE_Set;
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616 /* Disable the selected SPI SS output */
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617 SPIx->CR2 &= CR2_SSOE_Reset;
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622 * @brief Configures the data size for the selected SPI.
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623 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
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624 * @param SPI_DataSize: specifies the SPI data size.
\r
625 * This parameter can be one of the following values:
\r
626 * @arg SPI_DataSize_16b: Set data frame format to 16bit
\r
627 * @arg SPI_DataSize_8b: Set data frame format to 8bit
\r
630 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize)
\r
632 /* Check the parameters */
\r
633 assert_param(IS_SPI_ALL_PERIPH(SPIx));
\r
634 assert_param(IS_SPI_DATASIZE(SPI_DataSize));
\r
635 /* Clear DFF bit */
\r
636 SPIx->CR1 &= (uint16_t)~SPI_DataSize_16b;
\r
637 /* Set new DFF bit value */
\r
638 SPIx->CR1 |= SPI_DataSize;
\r
642 * @brief Transmit the SPIx CRC value.
\r
643 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
\r
646 void SPI_TransmitCRC(SPI_TypeDef* SPIx)
\r
648 /* Check the parameters */
\r
649 assert_param(IS_SPI_ALL_PERIPH(SPIx));
\r
651 /* Enable the selected SPI CRC transmission */
\r
652 SPIx->CR1 |= CR1_CRCNext_Set;
\r
656 * @brief Enables or disables the CRC value calculation of the transfered bytes.
\r
657 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
\r
658 * @param NewState: new state of the SPIx CRC value calculation.
\r
659 * This parameter can be: ENABLE or DISABLE.
\r
662 void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState)
\r
664 /* Check the parameters */
\r
665 assert_param(IS_SPI_ALL_PERIPH(SPIx));
\r
666 assert_param(IS_FUNCTIONAL_STATE(NewState));
\r
667 if (NewState != DISABLE)
\r
669 /* Enable the selected SPI CRC calculation */
\r
670 SPIx->CR1 |= CR1_CRCEN_Set;
\r
674 /* Disable the selected SPI CRC calculation */
\r
675 SPIx->CR1 &= CR1_CRCEN_Reset;
\r
680 * @brief Returns the transmit or the receive CRC register value for the specified SPI.
\r
681 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
\r
682 * @param SPI_CRC: specifies the CRC register to be read.
\r
683 * This parameter can be one of the following values:
\r
684 * @arg SPI_CRC_Tx: Selects Tx CRC register
\r
685 * @arg SPI_CRC_Rx: Selects Rx CRC register
\r
686 * @retval The selected CRC register value..
\r
688 uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC)
\r
690 uint16_t crcreg = 0;
\r
691 /* Check the parameters */
\r
692 assert_param(IS_SPI_ALL_PERIPH(SPIx));
\r
693 assert_param(IS_SPI_CRC(SPI_CRC));
\r
694 if (SPI_CRC != SPI_CRC_Rx)
\r
696 /* Get the Tx CRC register */
\r
697 crcreg = SPIx->TXCRCR;
\r
701 /* Get the Rx CRC register */
\r
702 crcreg = SPIx->RXCRCR;
\r
704 /* Return the selected CRC register */
\r
709 * @brief Returns the CRC Polynomial register value for the specified SPI.
\r
710 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
\r
711 * @retval The CRC Polynomial register value.
\r
713 uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx)
\r
715 /* Check the parameters */
\r
716 assert_param(IS_SPI_ALL_PERIPH(SPIx));
\r
718 /* Return the CRC polynomial register */
\r
719 return SPIx->CRCPR;
\r
723 * @brief Selects the data transfer direction in bi-directional mode for the specified SPI.
\r
724 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
\r
725 * @param SPI_Direction: specifies the data transfer direction in bi-directional mode.
\r
726 * This parameter can be one of the following values:
\r
727 * @arg SPI_Direction_Tx: Selects Tx transmission direction
\r
728 * @arg SPI_Direction_Rx: Selects Rx receive direction
\r
731 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction)
\r
733 /* Check the parameters */
\r
734 assert_param(IS_SPI_ALL_PERIPH(SPIx));
\r
735 assert_param(IS_SPI_DIRECTION(SPI_Direction));
\r
736 if (SPI_Direction == SPI_Direction_Tx)
\r
738 /* Set the Tx only mode */
\r
739 SPIx->CR1 |= SPI_Direction_Tx;
\r
743 /* Set the Rx only mode */
\r
744 SPIx->CR1 &= SPI_Direction_Rx;
\r
749 * @brief Checks whether the specified SPI/I2S flag is set or not.
\r
750 * @param SPIx: where x can be
\r
751 * - 1, 2 or 3 in SPI mode
\r
752 * - 2 or 3 in I2S mode
\r
753 * @param SPI_I2S_FLAG: specifies the SPI/I2S flag to check.
\r
754 * This parameter can be one of the following values:
\r
755 * @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag.
\r
756 * @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag.
\r
757 * @arg SPI_I2S_FLAG_BSY: Busy flag.
\r
758 * @arg SPI_I2S_FLAG_OVR: Overrun flag.
\r
759 * @arg SPI_FLAG_MODF: Mode Fault flag.
\r
760 * @arg SPI_FLAG_CRCERR: CRC Error flag.
\r
761 * @arg I2S_FLAG_UDR: Underrun Error flag.
\r
762 * @arg I2S_FLAG_CHSIDE: Channel Side flag.
\r
763 * @retval The new state of SPI_I2S_FLAG (SET or RESET).
\r
765 FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
\r
767 FlagStatus bitstatus = RESET;
\r
768 /* Check the parameters */
\r
769 assert_param(IS_SPI_ALL_PERIPH(SPIx));
\r
770 assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG));
\r
771 /* Check the status of the specified SPI/I2S flag */
\r
772 if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET)
\r
774 /* SPI_I2S_FLAG is set */
\r
779 /* SPI_I2S_FLAG is reset */
\r
782 /* Return the SPI_I2S_FLAG status */
\r
787 * @brief Clears the SPIx CRC Error (CRCERR) flag.
\r
788 * @param SPIx: where x can be
\r
789 * - 1, 2 or 3 in SPI mode
\r
790 * @param SPI_I2S_FLAG: specifies the SPI flag to clear.
\r
791 * This function clears only CRCERR flag.
\r
793 * - OVR (OverRun error) flag is cleared by software sequence: a read
\r
794 * operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by a read
\r
795 * operation to SPI_SR register (SPI_I2S_GetFlagStatus()).
\r
796 * - UDR (UnderRun error) flag is cleared by a read operation to
\r
797 * SPI_SR register (SPI_I2S_GetFlagStatus()).
\r
798 * - MODF (Mode Fault) flag is cleared by software sequence: a read/write
\r
799 * operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by a
\r
800 * write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI).
\r
803 void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
\r
805 /* Check the parameters */
\r
806 assert_param(IS_SPI_ALL_PERIPH(SPIx));
\r
807 assert_param(IS_SPI_I2S_CLEAR_FLAG(SPI_I2S_FLAG));
\r
809 /* Clear the selected SPI CRC Error (CRCERR) flag */
\r
810 SPIx->SR = (uint16_t)~SPI_I2S_FLAG;
\r
814 * @brief Checks whether the specified SPI/I2S interrupt has occurred or not.
\r
815 * @param SPIx: where x can be
\r
816 * - 1, 2 or 3 in SPI mode
\r
817 * - 2 or 3 in I2S mode
\r
818 * @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to check.
\r
819 * This parameter can be one of the following values:
\r
820 * @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt.
\r
821 * @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt.
\r
822 * @arg SPI_I2S_IT_OVR: Overrun interrupt.
\r
823 * @arg SPI_IT_MODF: Mode Fault interrupt.
\r
824 * @arg SPI_IT_CRCERR: CRC Error interrupt.
\r
825 * @arg I2S_IT_UDR: Underrun Error interrupt.
\r
826 * @retval The new state of SPI_I2S_IT (SET or RESET).
\r
828 ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
\r
830 ITStatus bitstatus = RESET;
\r
831 uint16_t itpos = 0, itmask = 0, enablestatus = 0;
\r
833 /* Check the parameters */
\r
834 assert_param(IS_SPI_ALL_PERIPH(SPIx));
\r
835 assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT));
\r
837 /* Get the SPI/I2S IT index */
\r
838 itpos = 0x01 << (SPI_I2S_IT & 0x0F);
\r
840 /* Get the SPI/I2S IT mask */
\r
841 itmask = SPI_I2S_IT >> 4;
\r
843 /* Set the IT mask */
\r
844 itmask = 0x01 << itmask;
\r
846 /* Get the SPI_I2S_IT enable bit status */
\r
847 enablestatus = (SPIx->CR2 & itmask) ;
\r
849 /* Check the status of the specified SPI/I2S interrupt */
\r
850 if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus)
\r
852 /* SPI_I2S_IT is set */
\r
857 /* SPI_I2S_IT is reset */
\r
860 /* Return the SPI_I2S_IT status */
\r
865 * @brief Clears the SPIx CRC Error (CRCERR) interrupt pending bit.
\r
866 * @param SPIx: where x can be
\r
867 * - 1, 2 or 3 in SPI mode
\r
868 * @param SPI_I2S_IT: specifies the SPI interrupt pending bit to clear.
\r
869 * This function clears only CRCERR intetrrupt pending bit.
\r
871 * - OVR (OverRun Error) interrupt pending bit is cleared by software
\r
872 * sequence: a read operation to SPI_DR register (SPI_I2S_ReceiveData())
\r
873 * followed by a read operation to SPI_SR register (SPI_I2S_GetITStatus()).
\r
874 * - UDR (UnderRun Error) interrupt pending bit is cleared by a read
\r
875 * operation to SPI_SR register (SPI_I2S_GetITStatus()).
\r
876 * - MODF (Mode Fault) interrupt pending bit is cleared by software sequence:
\r
877 * a read/write operation to SPI_SR register (SPI_I2S_GetITStatus())
\r
878 * followed by a write operation to SPI_CR1 register (SPI_Cmd() to enable
\r
882 void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
\r
884 uint16_t itpos = 0;
\r
885 /* Check the parameters */
\r
886 assert_param(IS_SPI_ALL_PERIPH(SPIx));
\r
887 assert_param(IS_SPI_I2S_CLEAR_IT(SPI_I2S_IT));
\r
889 /* Get the SPI IT index */
\r
890 itpos = 0x01 << (SPI_I2S_IT & 0x0F);
\r
892 /* Clear the selected SPI CRC Error (CRCERR) interrupt pending bit */
\r
893 SPIx->SR = (uint16_t)~itpos;
\r
907 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
\r