2 ******************************************************************************
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3 * @file stm32f10x_gpio.c
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4 * @author MCD Application Team
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7 * @brief This file provides all the GPIO firmware functions.
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8 ******************************************************************************
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11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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18 * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
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21 /* Includes ------------------------------------------------------------------*/
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22 #include "stm32f10x_gpio.h"
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23 #include "stm32f10x_rcc.h"
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25 /** @addtogroup STM32F10x_StdPeriph_Driver
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30 * @brief GPIO driver modules
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34 /** @defgroup GPIO_Private_TypesDefinitions
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42 /** @defgroup GPIO_Private_Defines
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46 /* ------------ RCC registers bit address in the alias region ----------------*/
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47 #define AFIO_OFFSET (AFIO_BASE - PERIPH_BASE)
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49 /* --- EVENTCR Register -----*/
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51 /* Alias word address of EVOE bit */
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52 #define EVCR_OFFSET (AFIO_OFFSET + 0x00)
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53 #define EVOE_BitNumber ((uint8_t)0x07)
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54 #define EVCR_EVOE_BB (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4))
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57 /* --- MAPR Register ---*/
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58 /* Alias word address of MII_RMII_SEL bit */
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59 #define MAPR_OFFSET (AFIO_OFFSET + 0x04)
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60 #define MII_RMII_SEL_BitNumber ((u8)0x17)
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61 #define MAPR_MII_RMII_SEL_BB (PERIPH_BB_BASE + (MAPR_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4))
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64 #define EVCR_PORTPINCONFIG_MASK ((uint16_t)0xFF80)
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65 #define LSB_MASK ((uint16_t)0xFFFF)
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66 #define DBGAFR_POSITION_MASK ((uint32_t)0x000F0000)
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67 #define DBGAFR_SWJCFG_MASK ((uint32_t)0xF0FFFFFF)
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68 #define DBGAFR_LOCATION_MASK ((uint32_t)0x00200000)
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69 #define DBGAFR_NUMBITS_MASK ((uint32_t)0x00100000)
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74 /** @defgroup GPIO_Private_Macros
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82 /** @defgroup GPIO_Private_Variables
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90 /** @defgroup GPIO_Private_FunctionPrototypes
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98 /** @defgroup GPIO_Private_Functions
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103 * @brief Deinitializes the GPIOx peripheral registers to their default reset values.
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104 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
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107 void GPIO_DeInit(GPIO_TypeDef* GPIOx)
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109 /* Check the parameters */
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110 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
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112 if (GPIOx == GPIOA)
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114 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE);
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115 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE);
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117 else if (GPIOx == GPIOB)
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119 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE);
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120 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE);
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122 else if (GPIOx == GPIOC)
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124 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE);
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125 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE);
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127 else if (GPIOx == GPIOD)
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129 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE);
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130 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE);
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132 else if (GPIOx == GPIOE)
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134 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE);
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135 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE);
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137 else if (GPIOx == GPIOF)
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139 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, ENABLE);
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140 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, DISABLE);
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144 if (GPIOx == GPIOG)
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146 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, ENABLE);
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147 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, DISABLE);
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153 * @brief Deinitializes the Alternate Functions (remap, event control
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154 * and EXTI configuration) registers to their default reset values.
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158 void GPIO_AFIODeInit(void)
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160 RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE);
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161 RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE);
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165 * @brief Initializes the GPIOx peripheral according to the specified
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166 * parameters in the GPIO_InitStruct.
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167 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
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168 * @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that
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169 * contains the configuration information for the specified GPIO peripheral.
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172 void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
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174 uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
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175 uint32_t tmpreg = 0x00, pinmask = 0x00;
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176 /* Check the parameters */
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177 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
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178 assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
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179 assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
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181 /*---------------------------- GPIO Mode Configuration -----------------------*/
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182 currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F);
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183 if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00)
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185 /* Check the parameters */
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186 assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
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188 currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed;
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190 /*---------------------------- GPIO CRL Configuration ------------------------*/
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191 /* Configure the eight low port pins */
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192 if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00)
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194 tmpreg = GPIOx->CRL;
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195 for (pinpos = 0x00; pinpos < 0x08; pinpos++)
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197 pos = ((uint32_t)0x01) << pinpos;
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198 /* Get the port pins position */
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199 currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
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200 if (currentpin == pos)
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203 /* Clear the corresponding low control register bits */
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204 pinmask = ((uint32_t)0x0F) << pos;
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205 tmpreg &= ~pinmask;
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206 /* Write the mode configuration in the corresponding bits */
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207 tmpreg |= (currentmode << pos);
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208 /* Reset the corresponding ODR bit */
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209 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
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211 GPIOx->BRR = (((uint32_t)0x01) << pinpos);
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215 /* Set the corresponding ODR bit */
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216 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
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218 GPIOx->BSRR = (((uint32_t)0x01) << pinpos);
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223 GPIOx->CRL = tmpreg;
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225 /*---------------------------- GPIO CRH Configuration ------------------------*/
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226 /* Configure the eight high port pins */
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227 if (GPIO_InitStruct->GPIO_Pin > 0x00FF)
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229 tmpreg = GPIOx->CRH;
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230 for (pinpos = 0x00; pinpos < 0x08; pinpos++)
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232 pos = (((uint32_t)0x01) << (pinpos + 0x08));
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233 /* Get the port pins position */
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234 currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos);
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235 if (currentpin == pos)
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238 /* Clear the corresponding high control register bits */
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239 pinmask = ((uint32_t)0x0F) << pos;
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240 tmpreg &= ~pinmask;
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241 /* Write the mode configuration in the corresponding bits */
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242 tmpreg |= (currentmode << pos);
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243 /* Reset the corresponding ODR bit */
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244 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
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246 GPIOx->BRR = (((uint32_t)0x01) << (pinpos + 0x08));
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248 /* Set the corresponding ODR bit */
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249 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
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251 GPIOx->BSRR = (((uint32_t)0x01) << (pinpos + 0x08));
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255 GPIOx->CRH = tmpreg;
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260 * @brief Fills each GPIO_InitStruct member with its default value.
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261 * @param GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will
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265 void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
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267 /* Reset GPIO init structure parameters values */
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268 GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All;
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269 GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz;
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270 GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING;
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274 * @brief Reads the specified input port pin.
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275 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
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276 * @param GPIO_Pin: specifies the port bit to read.
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277 * This parameter can be GPIO_Pin_x where x can be (0..15).
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278 * @retval The input port pin value.
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280 uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
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282 uint8_t bitstatus = 0x00;
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284 /* Check the parameters */
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285 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
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286 assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
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288 if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET)
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290 bitstatus = (uint8_t)Bit_SET;
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294 bitstatus = (uint8_t)Bit_RESET;
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300 * @brief Reads the specified GPIO input data port.
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301 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
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302 * @retval GPIO input data port value.
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304 uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
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306 /* Check the parameters */
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307 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
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309 return ((uint16_t)GPIOx->IDR);
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313 * @brief Reads the specified output data port bit.
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314 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
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315 * @param GPIO_Pin: specifies the port bit to read.
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316 * This parameter can be GPIO_Pin_x where x can be (0..15).
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317 * @retval The output port pin value.
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319 uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
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321 uint8_t bitstatus = 0x00;
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322 /* Check the parameters */
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323 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
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324 assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
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326 if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET)
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328 bitstatus = (uint8_t)Bit_SET;
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332 bitstatus = (uint8_t)Bit_RESET;
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338 * @brief Reads the specified GPIO output data port.
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339 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
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340 * @retval GPIO output data port value.
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342 uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
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344 /* Check the parameters */
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345 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
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347 return ((uint16_t)GPIOx->ODR);
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351 * @brief Sets the selected data port bits.
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352 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
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353 * @param GPIO_Pin: specifies the port bits to be written.
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354 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
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357 void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
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359 /* Check the parameters */
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360 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
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361 assert_param(IS_GPIO_PIN(GPIO_Pin));
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363 GPIOx->BSRR = GPIO_Pin;
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367 * @brief Clears the selected data port bits.
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368 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
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369 * @param GPIO_Pin: specifies the port bits to be written.
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370 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
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373 void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
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375 /* Check the parameters */
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376 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
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377 assert_param(IS_GPIO_PIN(GPIO_Pin));
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379 GPIOx->BRR = GPIO_Pin;
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383 * @brief Sets or clears the selected data port bit.
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384 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
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385 * @param GPIO_Pin: specifies the port bit to be written.
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386 * This parameter can be one of GPIO_Pin_x where x can be (0..15).
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387 * @param BitVal: specifies the value to be written to the selected bit.
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388 * This parameter can be one of the BitAction enum values:
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389 * @arg Bit_RESET: to clear the port pin
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390 * @arg Bit_SET: to set the port pin
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393 void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
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395 /* Check the parameters */
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396 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
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397 assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
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398 assert_param(IS_GPIO_BIT_ACTION(BitVal));
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400 if (BitVal != Bit_RESET)
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402 GPIOx->BSRR = GPIO_Pin;
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406 GPIOx->BRR = GPIO_Pin;
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411 * @brief Writes data to the specified GPIO data port.
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412 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
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413 * @param PortVal: specifies the value to be written to the port output data register.
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416 void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
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418 /* Check the parameters */
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419 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
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421 GPIOx->ODR = PortVal;
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425 * @brief Locks GPIO Pins configuration registers.
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426 * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
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427 * @param GPIO_Pin: specifies the port bit to be written.
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428 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
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431 void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
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433 uint32_t tmp = 0x00010000;
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435 /* Check the parameters */
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436 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
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437 assert_param(IS_GPIO_PIN(GPIO_Pin));
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442 /* Reset LCKK bit */
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443 GPIOx->LCKR = GPIO_Pin;
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453 * @brief Selects the GPIO pin used as Event output.
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454 * @param GPIO_PortSource: selects the GPIO port to be used as source
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455 * for Event output.
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456 * This parameter can be GPIO_PortSourceGPIOx where x can be (A..E).
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457 * @param GPIO_PinSource: specifies the pin for the Event output.
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458 * This parameter can be GPIO_PinSourcex where x can be (0..15).
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461 void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
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463 uint32_t tmpreg = 0x00;
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464 /* Check the parameters */
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465 assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(GPIO_PortSource));
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466 assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
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468 tmpreg = AFIO->EVCR;
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469 /* Clear the PORT[6:4] and PIN[3:0] bits */
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470 tmpreg &= EVCR_PORTPINCONFIG_MASK;
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471 tmpreg |= (uint32_t)GPIO_PortSource << 0x04;
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472 tmpreg |= GPIO_PinSource;
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473 AFIO->EVCR = tmpreg;
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477 * @brief Enables or disables the Event Output.
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478 * @param NewState: new state of the Event output.
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479 * This parameter can be: ENABLE or DISABLE.
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482 void GPIO_EventOutputCmd(FunctionalState NewState)
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484 /* Check the parameters */
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485 assert_param(IS_FUNCTIONAL_STATE(NewState));
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487 *(__IO uint32_t *) EVCR_EVOE_BB = (uint32_t)NewState;
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491 * @brief Changes the mapping of the specified pin.
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492 * @param GPIO_Remap: selects the pin to remap.
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493 * This parameter can be one of the following values:
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494 * @arg GPIO_Remap_SPI1
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495 * @arg GPIO_Remap_I2C1
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496 * @arg GPIO_Remap_USART1
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497 * @arg GPIO_Remap_USART2
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498 * @arg GPIO_PartialRemap_USART3
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499 * @arg GPIO_FullRemap_USART3
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500 * @arg GPIO_PartialRemap_TIM1
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501 * @arg GPIO_FullRemap_TIM1
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502 * @arg GPIO_PartialRemap1_TIM2
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503 * @arg GPIO_PartialRemap2_TIM2
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504 * @arg GPIO_FullRemap_TIM2
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505 * @arg GPIO_PartialRemap_TIM3
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506 * @arg GPIO_FullRemap_TIM3
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507 * @arg GPIO_Remap_TIM4
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508 * @arg GPIO_Remap1_CAN1
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509 * @arg GPIO_Remap2_CAN1
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510 * @arg GPIO_Remap_PD01
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511 * @arg GPIO_Remap_TIM5CH4_LSI
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512 * @arg GPIO_Remap_ADC1_ETRGINJ
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513 * @arg GPIO_Remap_ADC1_ETRGREG
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514 * @arg GPIO_Remap_ADC2_ETRGINJ
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515 * @arg GPIO_Remap_ADC2_ETRGREG
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516 * @arg GPIO_Remap_ETH
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517 * @arg GPIO_Remap_CAN2
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518 * @arg GPIO_Remap_SWJ_NoJTRST
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519 * @arg GPIO_Remap_SWJ_JTAGDisable
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520 * @arg GPIO_Remap_SWJ_Disable
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521 * @arg GPIO_Remap_SPI3
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522 * @arg GPIO_Remap_TIM2ITR1_PTP_SOF
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523 * @arg GPIO_Remap_PTP_PPS
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524 * @arg GPIO_Remap_TIM15
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525 * @arg GPIO_Remap_TIM16
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526 * @arg GPIO_Remap_TIM17
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527 * @arg GPIO_Remap_CEC
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528 * @arg GPIO_Remap_TIM1_DMA
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529 * @arg GPIO_Remap_TIM9
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530 * @arg GPIO_Remap_TIM10
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531 * @arg GPIO_Remap_TIM11
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532 * @arg GPIO_Remap_TIM13
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533 * @arg GPIO_Remap_TIM14
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534 * @arg GPIO_Remap_FSMC_NADV
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535 * @note If the GPIO_Remap_TIM2ITR1_PTP_SOF is enabled the TIM2 ITR1 is connected
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536 * to Ethernet PTP output. When Reset TIM2 ITR1 is connected to USB OTG SOF output.
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537 * @param NewState: new state of the port pin remapping.
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538 * This parameter can be: ENABLE or DISABLE.
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541 void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState)
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543 uint32_t tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00;
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545 /* Check the parameters */
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546 assert_param(IS_GPIO_REMAP(GPIO_Remap));
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547 assert_param(IS_FUNCTIONAL_STATE(NewState));
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549 if((GPIO_Remap & 0x80000000) == 0x80000000)
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551 tmpreg = AFIO->MAPR2;
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555 tmpreg = AFIO->MAPR;
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558 tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10;
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559 tmp = GPIO_Remap & LSB_MASK;
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561 if ((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK))
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563 tmpreg &= DBGAFR_SWJCFG_MASK;
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564 AFIO->MAPR &= DBGAFR_SWJCFG_MASK;
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566 else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK)
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568 tmp1 = ((uint32_t)0x03) << tmpmask;
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570 tmpreg |= ~DBGAFR_SWJCFG_MASK;
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574 tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15)*0x10));
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575 tmpreg |= ~DBGAFR_SWJCFG_MASK;
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578 if (NewState != DISABLE)
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580 tmpreg |= (tmp << ((GPIO_Remap >> 0x15)*0x10));
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583 if((GPIO_Remap & 0x80000000) == 0x80000000)
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585 AFIO->MAPR2 = tmpreg;
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589 AFIO->MAPR = tmpreg;
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594 * @brief Selects the GPIO pin used as EXTI Line.
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595 * @param GPIO_PortSource: selects the GPIO port to be used as source for EXTI lines.
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596 * This parameter can be GPIO_PortSourceGPIOx where x can be (A..G).
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597 * @param GPIO_PinSource: specifies the EXTI line to be configured.
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598 * This parameter can be GPIO_PinSourcex where x can be (0..15).
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601 void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
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603 uint32_t tmp = 0x00;
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604 /* Check the parameters */
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605 assert_param(IS_GPIO_EXTI_PORT_SOURCE(GPIO_PortSource));
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606 assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
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608 tmp = ((uint32_t)0x0F) << (0x04 * (GPIO_PinSource & (uint8_t)0x03));
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609 AFIO->EXTICR[GPIO_PinSource >> 0x02] &= ~tmp;
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610 AFIO->EXTICR[GPIO_PinSource >> 0x02] |= (((uint32_t)GPIO_PortSource) << (0x04 * (GPIO_PinSource & (uint8_t)0x03)));
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614 * @brief Selects the Ethernet media interface.
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615 * @note This function applies only to STM32 Connectivity line devices.
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616 * @param GPIO_ETH_MediaInterface: specifies the Media Interface mode.
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617 * This parameter can be one of the following values:
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618 * @arg GPIO_ETH_MediaInterface_MII: MII mode
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619 * @arg GPIO_ETH_MediaInterface_RMII: RMII mode
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622 void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface)
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624 assert_param(IS_GPIO_ETH_MEDIA_INTERFACE(GPIO_ETH_MediaInterface));
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626 /* Configure MII_RMII selection bit */
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627 *(__IO uint32_t *) MAPR_MII_RMII_SEL_BB = GPIO_ETH_MediaInterface;
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642 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
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