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   1 /**\r
   2   ******************************************************************************\r
   3   * @file    stm32l1xx_tim.h\r
   4   * @author  MCD Application Team\r
   5   * @version V1.0.0\r
   6   * @date    31-December-2010\r
   7   * @brief   This file contains all the functions prototypes for the TIM firmware \r
   8   *          library.\r
   9   ******************************************************************************\r
  10   * @attention\r
  11   *\r
  12   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS\r
  13   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE\r
  14   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY\r
  15   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING\r
  16   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE\r
  17   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.\r
  18   *\r
  19   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>\r
  20   ******************************************************************************  \r
  21   */ \r
  22 \r
  23 /* Define to prevent recursive inclusion -------------------------------------*/\r
  24 #ifndef __STM32L1xx_TIM_H\r
  25 #define __STM32L1xx_TIM_H\r
  26 \r
  27 #ifdef __cplusplus\r
  28  extern "C" {\r
  29 #endif\r
  30 \r
  31 /* Includes ------------------------------------------------------------------*/\r
  32 #include "stm32l1xx.h"\r
  33 \r
  34 /** @addtogroup STM32L1xx_StdPeriph_Driver\r
  35   * @{\r
  36   */\r
  37 \r
  38 /** @addtogroup TIM\r
  39   * @{\r
  40   */ \r
  41 \r
  42 /* Exported types ------------------------------------------------------------*/\r
  43 \r
  44 /** \r
  45   * @brief  TIM Time Base Init structure definition\r
  46   * @note   This structure is used with all TIMx except for TIM6 and TIM7.    \r
  47   */\r
  48 \r
  49 typedef struct\r
  50 {\r
  51   uint16_t TIM_Prescaler;         /*!< Specifies the prescaler value used to divide the TIM clock.\r
  52                                        This parameter can be a number between 0x0000 and 0xFFFF */\r
  53 \r
  54   uint16_t TIM_CounterMode;       /*!< Specifies the counter mode.\r
  55                                        This parameter can be a value of @ref TIM_Counter_Mode */\r
  56 \r
  57   uint16_t TIM_Period;            /*!< Specifies the period value to be loaded into the active\r
  58                                        Auto-Reload Register at the next update event.\r
  59                                        This parameter must be a number between 0x0000 and 0xFFFF.  */ \r
  60 \r
  61   uint16_t TIM_ClockDivision;     /*!< Specifies the clock division.\r
  62                                       This parameter can be a value of @ref TIM_Clock_Division_CKD */\r
  63 \r
  64 } TIM_TimeBaseInitTypeDef;       \r
  65 \r
  66 /** \r
  67   * @brief  TIM Output Compare Init structure definition  \r
  68   */\r
  69 \r
  70 typedef struct\r
  71 {\r
  72   uint16_t TIM_OCMode;        /*!< Specifies the TIM mode.\r
  73                                    This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */\r
  74 \r
  75   uint16_t TIM_OutputState;   /*!< Specifies the TIM Output Compare state.\r
  76                                    This parameter can be a value of @ref TIM_Output_Compare_state */\r
  77 \r
  78   uint16_t TIM_Pulse;         /*!< Specifies the pulse value to be loaded into the Capture Compare Register. \r
  79                                    This parameter can be a number between 0x0000 and 0xFFFF */\r
  80 \r
  81   uint16_t TIM_OCPolarity;    /*!< Specifies the output polarity.\r
  82                                    This parameter can be a value of @ref TIM_Output_Compare_Polarity */\r
  83 \r
  84 } TIM_OCInitTypeDef;\r
  85 \r
  86 /** \r
  87   * @brief  TIM Input Capture Init structure definition  \r
  88   */\r
  89 \r
  90 typedef struct\r
  91 {\r
  92 \r
  93   uint16_t TIM_Channel;      /*!< Specifies the TIM channel.\r
  94                                   This parameter can be a value of @ref TIM_Channel */\r
  95 \r
  96   uint16_t TIM_ICPolarity;   /*!< Specifies the active edge of the input signal.\r
  97                                   This parameter can be a value of @ref TIM_Input_Capture_Polarity */\r
  98 \r
  99   uint16_t TIM_ICSelection;  /*!< Specifies the input.\r
 100                                   This parameter can be a value of @ref TIM_Input_Capture_Selection */\r
 101 \r
 102   uint16_t TIM_ICPrescaler;  /*!< Specifies the Input Capture Prescaler.\r
 103                                   This parameter can be a value of @ref TIM_Input_Capture_Prescaler */\r
 104 \r
 105   uint16_t TIM_ICFilter;     /*!< Specifies the input capture filter.\r
 106                                   This parameter can be a number between 0x0 and 0xF */\r
 107 } TIM_ICInitTypeDef;\r
 108 \r
 109 /* Exported constants --------------------------------------------------------*/\r
 110 \r
 111   \r
 112 /** @defgroup TIM_Exported_constants \r
 113   * @{\r
 114   */\r
 115 \r
 116 #define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM2) || \\r
 117                                    ((PERIPH) == TIM3) || \\r
 118                                    ((PERIPH) == TIM4) || \\r
 119                                    ((PERIPH) == TIM6) || \\r
 120                                    ((PERIPH) == TIM7) || \\r
 121                                    ((PERIPH) == TIM9) || \\r
 122                                    ((PERIPH) == TIM10) || \\r
 123                                    ((PERIPH) == TIM11))\r
 124 \r
 125 /* LIST1: TIM2, TIM3, TIM4, TIM9, TIM10 and TIM11 */\r
 126 #define IS_TIM_LIST1_PERIPH(PERIPH) (((PERIPH) == TIM2) || \\r
 127                                      ((PERIPH) == TIM3) || \\r
 128                                      ((PERIPH) == TIM4) || \\r
 129                                      ((PERIPH) == TIM9) || \\r
 130                                      ((PERIPH) == TIM10) || \\r
 131                                      ((PERIPH) == TIM11))\r
 132 \r
 133 /* LIST3: TIM2, TIM3 and TIM4 */\r
 134 #define IS_TIM_LIST3_PERIPH(PERIPH) (((PERIPH) == TIM2) || \\r
 135                                      ((PERIPH) == TIM3) || \\r
 136                                      ((PERIPH) == TIM4))\r
 137 \r
 138 /* LIST2: TIM2, TIM3, TIM4 and TIM9 */\r
 139 #define IS_TIM_LIST2_PERIPH(PERIPH) (((PERIPH) == TIM2) || \\r
 140                                      ((PERIPH) == TIM3) || \\r
 141                                      ((PERIPH) == TIM4) ||\\r
 142                                      ((PERIPH) == TIM9))\r
 143 \r
 144 /* LIST5: TIM2, TIM3, TIM4, TIM6, TIM7 and TIM9 */\r
 145 #define IS_TIM_LIST5_PERIPH(PERIPH) (((PERIPH) == TIM2) || \\r
 146                                      ((PERIPH) == TIM3) || \\r
 147                                      ((PERIPH) == TIM4) ||\\r
 148                                      ((PERIPH) == TIM6) || \\r
 149                                      ((PERIPH) == TIM7) ||\\r
 150                                      ((PERIPH) == TIM9))\r
 151 \r
 152 /* LIST4: TIM2, TIM3, TIM4, TIM6 and TIM7 */\r
 153 #define IS_TIM_LIST4_PERIPH(PERIPH) (((PERIPH) == TIM2) || \\r
 154                                      ((PERIPH) == TIM3) || \\r
 155                                      ((PERIPH) == TIM4) ||\\r
 156                                      ((PERIPH) == TIM6) || \\r
 157                                      ((PERIPH) == TIM7))\r
 158 \r
 159 /* LIST6: TIM9, TIM10 and TIM11 */\r
 160 #define IS_TIM_LIST6_PERIPH(PERIPH) (((PERIPH) == TIM9) || \\r
 161                                      ((PERIPH) == TIM10) ||\\r
 162                                      ((PERIPH) == TIM11))\r
 163 \r
 164 \r
 165 \r
 166 /** @defgroup TIM_Output_Compare_and_PWM_modes \r
 167   * @{\r
 168   */\r
 169 \r
 170 #define TIM_OCMode_Timing                  ((uint16_t)0x0000)\r
 171 #define TIM_OCMode_Active                  ((uint16_t)0x0010)\r
 172 #define TIM_OCMode_Inactive                ((uint16_t)0x0020)\r
 173 #define TIM_OCMode_Toggle                  ((uint16_t)0x0030)\r
 174 #define TIM_OCMode_PWM1                    ((uint16_t)0x0060)\r
 175 #define TIM_OCMode_PWM2                    ((uint16_t)0x0070)\r
 176 #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \\r
 177                               ((MODE) == TIM_OCMode_Active) || \\r
 178                               ((MODE) == TIM_OCMode_Inactive) || \\r
 179                               ((MODE) == TIM_OCMode_Toggle)|| \\r
 180                               ((MODE) == TIM_OCMode_PWM1) || \\r
 181                               ((MODE) == TIM_OCMode_PWM2))\r
 182 #define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \\r
 183                           ((MODE) == TIM_OCMode_Active) || \\r
 184                           ((MODE) == TIM_OCMode_Inactive) || \\r
 185                           ((MODE) == TIM_OCMode_Toggle)|| \\r
 186                           ((MODE) == TIM_OCMode_PWM1) || \\r
 187                           ((MODE) == TIM_OCMode_PWM2) ||        \\r
 188                           ((MODE) == TIM_ForcedAction_Active) || \\r
 189                           ((MODE) == TIM_ForcedAction_InActive))\r
 190 /**\r
 191   * @}\r
 192   */\r
 193 \r
 194 /** @defgroup TIM_One_Pulse_Mode \r
 195   * @{\r
 196   */\r
 197 \r
 198 #define TIM_OPMode_Single                  ((uint16_t)0x0008)\r
 199 #define TIM_OPMode_Repetitive              ((uint16_t)0x0000)\r
 200 #define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \\r
 201                                ((MODE) == TIM_OPMode_Repetitive))\r
 202 /**\r
 203   * @}\r
 204   */ \r
 205 \r
 206 /** @defgroup TIM_Channel \r
 207   * @{\r
 208   */\r
 209 \r
 210 #define TIM_Channel_1                      ((uint16_t)0x0000)\r
 211 #define TIM_Channel_2                      ((uint16_t)0x0004)\r
 212 #define TIM_Channel_3                      ((uint16_t)0x0008)\r
 213 #define TIM_Channel_4                      ((uint16_t)0x000C)\r
 214 \r
 215 #define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \\r
 216                                  ((CHANNEL) == TIM_Channel_2) || \\r
 217                                  ((CHANNEL) == TIM_Channel_3) || \\r
 218                                  ((CHANNEL) == TIM_Channel_4))\r
 219                                  \r
 220 #define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \\r
 221                                       ((CHANNEL) == TIM_Channel_2))\r
 222 \r
 223 /**\r
 224   * @}\r
 225   */ \r
 226 \r
 227 /** @defgroup TIM_Clock_Division_CKD \r
 228   * @{\r
 229   */\r
 230 \r
 231 #define TIM_CKD_DIV1                       ((uint16_t)0x0000)\r
 232 #define TIM_CKD_DIV2                       ((uint16_t)0x0100)\r
 233 #define TIM_CKD_DIV4                       ((uint16_t)0x0200)\r
 234 #define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \\r
 235                              ((DIV) == TIM_CKD_DIV2) || \\r
 236                              ((DIV) == TIM_CKD_DIV4))\r
 237 /**\r
 238   * @}\r
 239   */\r
 240 \r
 241 /** @defgroup TIM_Counter_Mode \r
 242   * @{\r
 243   */\r
 244 \r
 245 #define TIM_CounterMode_Up                 ((uint16_t)0x0000)\r
 246 #define TIM_CounterMode_Down               ((uint16_t)0x0010)\r
 247 #define TIM_CounterMode_CenterAligned1     ((uint16_t)0x0020)\r
 248 #define TIM_CounterMode_CenterAligned2     ((uint16_t)0x0040)\r
 249 #define TIM_CounterMode_CenterAligned3     ((uint16_t)0x0060)\r
 250 #define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) ||  \\r
 251                                    ((MODE) == TIM_CounterMode_Down) || \\r
 252                                    ((MODE) == TIM_CounterMode_CenterAligned1) || \\r
 253                                    ((MODE) == TIM_CounterMode_CenterAligned2) || \\r
 254                                    ((MODE) == TIM_CounterMode_CenterAligned3))\r
 255 /**\r
 256   * @}\r
 257   */ \r
 258 \r
 259 /** @defgroup TIM_Output_Compare_Polarity \r
 260   * @{\r
 261   */\r
 262 \r
 263 #define TIM_OCPolarity_High                ((uint16_t)0x0000)\r
 264 #define TIM_OCPolarity_Low                 ((uint16_t)0x0002)\r
 265 #define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \\r
 266                                       ((POLARITY) == TIM_OCPolarity_Low))\r
 267 /**\r
 268   * @}\r
 269   */\r
 270 \r
 271 \r
 272 /** @defgroup TIM_Output_Compare_state\r
 273   * @{\r
 274   */\r
 275 \r
 276 #define TIM_OutputState_Disable            ((uint16_t)0x0000)\r
 277 #define TIM_OutputState_Enable             ((uint16_t)0x0001)\r
 278 #define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \\r
 279                                     ((STATE) == TIM_OutputState_Enable))\r
 280 /**\r
 281   * @}\r
 282   */ \r
 283 \r
 284 \r
 285 /** @defgroup TIM_Capture_Compare_state \r
 286   * @{\r
 287   */\r
 288 \r
 289 #define TIM_CCx_Enable                      ((uint16_t)0x0001)\r
 290 #define TIM_CCx_Disable                     ((uint16_t)0x0000)\r
 291 #define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \\r
 292                          ((CCX) == TIM_CCx_Disable))\r
 293 /**\r
 294   * @}\r
 295   */ \r
 296 \r
 297 /** @defgroup TIM_Input_Capture_Polarity \r
 298   * @{\r
 299   */\r
 300 \r
 301 #define  TIM_ICPolarity_Rising             ((uint16_t)0x0000)\r
 302 #define  TIM_ICPolarity_Falling            ((uint16_t)0x0002)\r
 303 #define  TIM_ICPolarity_BothEdge           ((uint16_t)0x000A)\r
 304 #define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \\r
 305                                       ((POLARITY) == TIM_ICPolarity_Falling)|| \\r
 306                                       ((POLARITY) == TIM_ICPolarity_BothEdge))\r
 307 /**\r
 308   * @}\r
 309   */ \r
 310 \r
 311 /** @defgroup TIM_Input_Capture_Selection \r
 312   * @{\r
 313   */\r
 314 \r
 315 #define TIM_ICSelection_DirectTI           ((uint16_t)0x0001) /*!< TIM Input 1, 2, 3 or 4 is selected to be \r
 316                                                                    connected to IC1, IC2, IC3 or IC4, respectively */\r
 317 #define TIM_ICSelection_IndirectTI         ((uint16_t)0x0002) /*!< TIM Input 1, 2, 3 or 4 is selected to be\r
 318                                                                    connected to IC2, IC1, IC4 or IC3, respectively. */\r
 319 #define TIM_ICSelection_TRC                ((uint16_t)0x0003) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC. */\r
 320 #define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \\r
 321                                         ((SELECTION) == TIM_ICSelection_IndirectTI) || \\r
 322                                         ((SELECTION) == TIM_ICSelection_TRC))\r
 323 /**\r
 324   * @}\r
 325   */ \r
 326 \r
 327 /** @defgroup TIM_Input_Capture_Prescaler \r
 328   * @{\r
 329   */\r
 330 \r
 331 #define TIM_ICPSC_DIV1                     ((uint16_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input. */\r
 332 #define TIM_ICPSC_DIV2                     ((uint16_t)0x0004) /*!< Capture performed once every 2 events. */\r
 333 #define TIM_ICPSC_DIV4                     ((uint16_t)0x0008) /*!< Capture performed once every 4 events. */\r
 334 #define TIM_ICPSC_DIV8                     ((uint16_t)0x000C) /*!< Capture performed once every 8 events. */\r
 335 #define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) || \\r
 336                                         ((PRESCALER) == TIM_ICPSC_DIV2) || \\r
 337                                         ((PRESCALER) == TIM_ICPSC_DIV4) || \\r
 338                                         ((PRESCALER) == TIM_ICPSC_DIV8))\r
 339 /**\r
 340   * @}\r
 341   */ \r
 342 \r
 343 /** @defgroup TIM_interrupt_sources \r
 344   * @{\r
 345   */\r
 346 \r
 347 #define TIM_IT_Update                      ((uint16_t)0x0001)\r
 348 #define TIM_IT_CC1                         ((uint16_t)0x0002)\r
 349 #define TIM_IT_CC2                         ((uint16_t)0x0004)\r
 350 #define TIM_IT_CC3                         ((uint16_t)0x0008)\r
 351 #define TIM_IT_CC4                         ((uint16_t)0x0010)\r
 352 #define TIM_IT_Trigger                     ((uint16_t)0x0040)\r
 353 #define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFFA0) == 0x0000) && ((IT) != 0x0000))\r
 354 \r
 355 #define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \\r
 356                            ((IT) == TIM_IT_CC1) || \\r
 357                            ((IT) == TIM_IT_CC2) || \\r
 358                            ((IT) == TIM_IT_CC3) || \\r
 359                            ((IT) == TIM_IT_CC4) || \\r
 360                            ((IT) == TIM_IT_Trigger))\r
 361 /**\r
 362   * @}\r
 363   */ \r
 364 \r
 365 /** @defgroup TIM_DMA_Base_address \r
 366   * @{\r
 367   */\r
 368 \r
 369 #define TIM_DMABase_CR1                    ((uint16_t)0x0000)\r
 370 #define TIM_DMABase_CR2                    ((uint16_t)0x0001)\r
 371 #define TIM_DMABase_SMCR                   ((uint16_t)0x0002)\r
 372 #define TIM_DMABase_DIER                   ((uint16_t)0x0003)\r
 373 #define TIM_DMABase_SR                     ((uint16_t)0x0004)\r
 374 #define TIM_DMABase_EGR                    ((uint16_t)0x0005)\r
 375 #define TIM_DMABase_CCMR1                  ((uint16_t)0x0006)\r
 376 #define TIM_DMABase_CCMR2                  ((uint16_t)0x0007)\r
 377 #define TIM_DMABase_CCER                   ((uint16_t)0x0008)\r
 378 #define TIM_DMABase_CNT                    ((uint16_t)0x0009)\r
 379 #define TIM_DMABase_PSC                    ((uint16_t)0x000A)\r
 380 #define TIM_DMABase_ARR                    ((uint16_t)0x000B)\r
 381 #define TIM_DMABase_RCR                    ((uint16_t)0x000C)\r
 382 #define TIM_DMABase_CCR1                   ((uint16_t)0x000D)\r
 383 #define TIM_DMABase_CCR2                   ((uint16_t)0x000E)\r
 384 #define TIM_DMABase_CCR3                   ((uint16_t)0x000F)\r
 385 #define TIM_DMABase_CCR4                   ((uint16_t)0x0010)\r
 386 #define TIM_DMABase_DCR                    ((uint16_t)0x0012)\r
 387 #define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \\r
 388                                ((BASE) == TIM_DMABase_CR2) || \\r
 389                                ((BASE) == TIM_DMABase_SMCR) || \\r
 390                                ((BASE) == TIM_DMABase_DIER) || \\r
 391                                ((BASE) == TIM_DMABase_SR) || \\r
 392                                ((BASE) == TIM_DMABase_EGR) || \\r
 393                                ((BASE) == TIM_DMABase_CCMR1) || \\r
 394                                ((BASE) == TIM_DMABase_CCMR2) || \\r
 395                                ((BASE) == TIM_DMABase_CCER) || \\r
 396                                ((BASE) == TIM_DMABase_CNT) || \\r
 397                                ((BASE) == TIM_DMABase_PSC) || \\r
 398                                ((BASE) == TIM_DMABase_ARR) || \\r
 399                                ((BASE) == TIM_DMABase_CCR1) || \\r
 400                                ((BASE) == TIM_DMABase_CCR2) || \\r
 401                                ((BASE) == TIM_DMABase_CCR3) || \\r
 402                                ((BASE) == TIM_DMABase_CCR4) || \\r
 403                                ((BASE) == TIM_DMABase_DCR))                     \r
 404 /**\r
 405   * @}\r
 406   */ \r
 407 \r
 408 /** @defgroup TIM_DMA_Burst_Length \r
 409   * @{\r
 410   */\r
 411 \r
 412 #define TIM_DMABurstLength_1Byte           ((uint16_t)0x0000)\r
 413 #define TIM_DMABurstLength_2Bytes          ((uint16_t)0x0100)\r
 414 #define TIM_DMABurstLength_3Bytes          ((uint16_t)0x0200)\r
 415 #define TIM_DMABurstLength_4Bytes          ((uint16_t)0x0300)\r
 416 #define TIM_DMABurstLength_5Bytes          ((uint16_t)0x0400)\r
 417 #define TIM_DMABurstLength_6Bytes          ((uint16_t)0x0500)\r
 418 #define TIM_DMABurstLength_7Bytes          ((uint16_t)0x0600)\r
 419 #define TIM_DMABurstLength_8Bytes          ((uint16_t)0x0700)\r
 420 #define TIM_DMABurstLength_9Bytes          ((uint16_t)0x0800)\r
 421 #define TIM_DMABurstLength_10Bytes         ((uint16_t)0x0900)\r
 422 #define TIM_DMABurstLength_11Bytes         ((uint16_t)0x0A00)\r
 423 #define TIM_DMABurstLength_12Bytes         ((uint16_t)0x0B00)\r
 424 #define TIM_DMABurstLength_13Bytes         ((uint16_t)0x0C00)\r
 425 #define TIM_DMABurstLength_14Bytes         ((uint16_t)0x0D00)\r
 426 #define TIM_DMABurstLength_15Bytes         ((uint16_t)0x0E00)\r
 427 #define TIM_DMABurstLength_16Bytes         ((uint16_t)0x0F00)\r
 428 #define TIM_DMABurstLength_17Bytes         ((uint16_t)0x1000)\r
 429 #define TIM_DMABurstLength_18Bytes         ((uint16_t)0x1100)\r
 430 #define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Byte) || \\r
 431                                    ((LENGTH) == TIM_DMABurstLength_2Bytes) || \\r
 432                                    ((LENGTH) == TIM_DMABurstLength_3Bytes) || \\r
 433                                    ((LENGTH) == TIM_DMABurstLength_4Bytes) || \\r
 434                                    ((LENGTH) == TIM_DMABurstLength_5Bytes) || \\r
 435                                    ((LENGTH) == TIM_DMABurstLength_6Bytes) || \\r
 436                                    ((LENGTH) == TIM_DMABurstLength_7Bytes) || \\r
 437                                    ((LENGTH) == TIM_DMABurstLength_8Bytes) || \\r
 438                                    ((LENGTH) == TIM_DMABurstLength_9Bytes) || \\r
 439                                    ((LENGTH) == TIM_DMABurstLength_10Bytes) || \\r
 440                                    ((LENGTH) == TIM_DMABurstLength_11Bytes) || \\r
 441                                    ((LENGTH) == TIM_DMABurstLength_12Bytes) || \\r
 442                                    ((LENGTH) == TIM_DMABurstLength_13Bytes) || \\r
 443                                    ((LENGTH) == TIM_DMABurstLength_14Bytes) || \\r
 444                                    ((LENGTH) == TIM_DMABurstLength_15Bytes) || \\r
 445                                    ((LENGTH) == TIM_DMABurstLength_16Bytes) || \\r
 446                                    ((LENGTH) == TIM_DMABurstLength_17Bytes) || \\r
 447                                    ((LENGTH) == TIM_DMABurstLength_18Bytes))\r
 448 /**\r
 449   * @}\r
 450   */ \r
 451 \r
 452 /** @defgroup TIM_DMA_sources \r
 453   * @{\r
 454   */\r
 455 \r
 456 #define TIM_DMA_Update                     ((uint16_t)0x0100)\r
 457 #define TIM_DMA_CC1                        ((uint16_t)0x0200)\r
 458 #define TIM_DMA_CC2                        ((uint16_t)0x0400)\r
 459 #define TIM_DMA_CC3                        ((uint16_t)0x0800)\r
 460 #define TIM_DMA_CC4                        ((uint16_t)0x1000)\r
 461 #define TIM_DMA_Trigger                    ((uint16_t)0x4000)\r
 462 #define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xA0FF) == 0x0000) && ((SOURCE) != 0x0000))\r
 463 \r
 464 /**\r
 465   * @}\r
 466   */ \r
 467 \r
 468 /** @defgroup TIM_External_Trigger_Prescaler \r
 469   * @{\r
 470   */\r
 471 \r
 472 #define TIM_ExtTRGPSC_OFF                  ((uint16_t)0x0000)\r
 473 #define TIM_ExtTRGPSC_DIV2                 ((uint16_t)0x1000)\r
 474 #define TIM_ExtTRGPSC_DIV4                 ((uint16_t)0x2000)\r
 475 #define TIM_ExtTRGPSC_DIV8                 ((uint16_t)0x3000)\r
 476 #define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \\r
 477                                          ((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \\r
 478                                          ((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \\r
 479                                          ((PRESCALER) == TIM_ExtTRGPSC_DIV8))\r
 480 /**\r
 481   * @}\r
 482   */ \r
 483 \r
 484 /** @defgroup TIM_Internal_Trigger_Selection \r
 485   * @{\r
 486   */\r
 487 \r
 488 #define TIM_TS_ITR0                        ((uint16_t)0x0000)\r
 489 #define TIM_TS_ITR1                        ((uint16_t)0x0010)\r
 490 #define TIM_TS_ITR2                        ((uint16_t)0x0020)\r
 491 #define TIM_TS_ITR3                        ((uint16_t)0x0030)\r
 492 #define TIM_TS_TI1F_ED                     ((uint16_t)0x0040)\r
 493 #define TIM_TS_TI1FP1                      ((uint16_t)0x0050)\r
 494 #define TIM_TS_TI2FP2                      ((uint16_t)0x0060)\r
 495 #define TIM_TS_ETRF                        ((uint16_t)0x0070)\r
 496 #define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \\r
 497                                              ((SELECTION) == TIM_TS_ITR1) || \\r
 498                                              ((SELECTION) == TIM_TS_ITR2) || \\r
 499                                              ((SELECTION) == TIM_TS_ITR3) || \\r
 500                                              ((SELECTION) == TIM_TS_TI1F_ED) || \\r
 501                                              ((SELECTION) == TIM_TS_TI1FP1) || \\r
 502                                              ((SELECTION) == TIM_TS_TI2FP2) || \\r
 503                                              ((SELECTION) == TIM_TS_ETRF))\r
 504 #define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \\r
 505                                                       ((SELECTION) == TIM_TS_ITR1) || \\r
 506                                                       ((SELECTION) == TIM_TS_ITR2) || \\r
 507                                                       ((SELECTION) == TIM_TS_ITR3))\r
 508 /**\r
 509   * @}\r
 510   */ \r
 511 \r
 512 /** @defgroup TIM_TIx_External_Clock_Source \r
 513   * @{\r
 514   */\r
 515 \r
 516 #define TIM_TIxExternalCLK1Source_TI1      ((uint16_t)0x0050)\r
 517 #define TIM_TIxExternalCLK1Source_TI2      ((uint16_t)0x0060)\r
 518 #define TIM_TIxExternalCLK1Source_TI1ED    ((uint16_t)0x0040)\r
 519 \r
 520 /**\r
 521   * @}\r
 522   */ \r
 523 \r
 524 /** @defgroup TIM_External_Trigger_Polarity \r
 525   * @{\r
 526   */ \r
 527 #define TIM_ExtTRGPolarity_Inverted        ((uint16_t)0x8000)\r
 528 #define TIM_ExtTRGPolarity_NonInverted     ((uint16_t)0x0000)\r
 529 #define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \\r
 530                                        ((POLARITY) == TIM_ExtTRGPolarity_NonInverted))\r
 531 /**\r
 532   * @}\r
 533   */\r
 534 \r
 535 /** @defgroup TIM_Prescaler_Reload_Mode \r
 536   * @{\r
 537   */\r
 538 \r
 539 #define TIM_PSCReloadMode_Update           ((uint16_t)0x0000)\r
 540 #define TIM_PSCReloadMode_Immediate        ((uint16_t)0x0001)\r
 541 #define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \\r
 542                                          ((RELOAD) == TIM_PSCReloadMode_Immediate))\r
 543 /**\r
 544   * @}\r
 545   */ \r
 546 \r
 547 /** @defgroup TIM_Forced_Action \r
 548   * @{\r
 549   */\r
 550 \r
 551 #define TIM_ForcedAction_Active            ((uint16_t)0x0050)\r
 552 #define TIM_ForcedAction_InActive          ((uint16_t)0x0040)\r
 553 #define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \\r
 554                                       ((ACTION) == TIM_ForcedAction_InActive))\r
 555 /**\r
 556   * @}\r
 557   */ \r
 558 \r
 559 /** @defgroup TIM_Encoder_Mode \r
 560   * @{\r
 561   */\r
 562 \r
 563 #define TIM_EncoderMode_TI1                ((uint16_t)0x0001)\r
 564 #define TIM_EncoderMode_TI2                ((uint16_t)0x0002)\r
 565 #define TIM_EncoderMode_TI12               ((uint16_t)0x0003)\r
 566 #define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \\r
 567                                    ((MODE) == TIM_EncoderMode_TI2) || \\r
 568                                    ((MODE) == TIM_EncoderMode_TI12))\r
 569 /**\r
 570   * @}\r
 571   */ \r
 572 \r
 573 \r
 574 /** @defgroup TIM_Event_Source \r
 575   * @{\r
 576   */\r
 577 \r
 578 #define TIM_EventSource_Update             ((uint16_t)0x0001)\r
 579 #define TIM_EventSource_CC1                ((uint16_t)0x0002)\r
 580 #define TIM_EventSource_CC2                ((uint16_t)0x0004)\r
 581 #define TIM_EventSource_CC3                ((uint16_t)0x0008)\r
 582 #define TIM_EventSource_CC4                ((uint16_t)0x0010)\r
 583 #define TIM_EventSource_Trigger            ((uint16_t)0x0040)\r
 584 #define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFFA0) == 0x0000) && ((SOURCE) != 0x0000))                                          \r
 585    \r
 586 /**\r
 587   * @}\r
 588   */ \r
 589 \r
 590 /** @defgroup TIM_Update_Source \r
 591   * @{\r
 592   */\r
 593 \r
 594 #define TIM_UpdateSource_Global            ((uint16_t)0x0000) /*!< Source of update is the counter overflow/underflow\r
 595                                                                    or the setting of UG bit, or an update generation\r
 596                                                                    through the slave mode controller. */\r
 597 #define TIM_UpdateSource_Regular           ((uint16_t)0x0001) /*!< Source of update is counter overflow/underflow. */\r
 598 #define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \\r
 599                                       ((SOURCE) == TIM_UpdateSource_Regular))\r
 600 /**\r
 601   * @}\r
 602   */ \r
 603 \r
 604 /** @defgroup TIM_Output_Compare_Preload_State \r
 605   * @{\r
 606   */\r
 607 \r
 608 #define TIM_OCPreload_Enable               ((uint16_t)0x0008)\r
 609 #define TIM_OCPreload_Disable              ((uint16_t)0x0000)\r
 610 #define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \\r
 611                                        ((STATE) == TIM_OCPreload_Disable))\r
 612 /**\r
 613   * @}\r
 614   */ \r
 615 \r
 616 /** @defgroup TIM_Output_Compare_Fast_State \r
 617   * @{\r
 618   */\r
 619 \r
 620 #define TIM_OCFast_Enable                  ((uint16_t)0x0004)\r
 621 #define TIM_OCFast_Disable                 ((uint16_t)0x0000)\r
 622 #define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \\r
 623                                     ((STATE) == TIM_OCFast_Disable))\r
 624                                      \r
 625 /**\r
 626   * @}\r
 627   */ \r
 628 \r
 629 /** @defgroup TIM_Output_Compare_Clear_State \r
 630   * @{\r
 631   */\r
 632 \r
 633 #define TIM_OCClear_Enable                 ((uint16_t)0x0080)\r
 634 #define TIM_OCClear_Disable                ((uint16_t)0x0000)\r
 635 #define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \\r
 636                                      ((STATE) == TIM_OCClear_Disable))\r
 637 /**\r
 638   * @}\r
 639   */ \r
 640 \r
 641 /** @defgroup TIM_Trigger_Output_Source \r
 642   * @{\r
 643   */\r
 644 \r
 645 #define TIM_TRGOSource_Reset               ((uint16_t)0x0000)\r
 646 #define TIM_TRGOSource_Enable              ((uint16_t)0x0010)\r
 647 #define TIM_TRGOSource_Update              ((uint16_t)0x0020)\r
 648 #define TIM_TRGOSource_OC1                 ((uint16_t)0x0030)\r
 649 #define TIM_TRGOSource_OC1Ref              ((uint16_t)0x0040)\r
 650 #define TIM_TRGOSource_OC2Ref              ((uint16_t)0x0050)\r
 651 #define TIM_TRGOSource_OC3Ref              ((uint16_t)0x0060)\r
 652 #define TIM_TRGOSource_OC4Ref              ((uint16_t)0x0070)\r
 653 #define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \\r
 654                                     ((SOURCE) == TIM_TRGOSource_Enable) || \\r
 655                                     ((SOURCE) == TIM_TRGOSource_Update) || \\r
 656                                     ((SOURCE) == TIM_TRGOSource_OC1) || \\r
 657                                     ((SOURCE) == TIM_TRGOSource_OC1Ref) || \\r
 658                                     ((SOURCE) == TIM_TRGOSource_OC2Ref) || \\r
 659                                     ((SOURCE) == TIM_TRGOSource_OC3Ref) || \\r
 660                                     ((SOURCE) == TIM_TRGOSource_OC4Ref))\r
 661 /**\r
 662   * @}\r
 663   */ \r
 664 \r
 665 /** @defgroup TIM_Slave_Mode \r
 666   * @{\r
 667   */\r
 668 \r
 669 #define TIM_SlaveMode_Reset                ((uint16_t)0x0004)\r
 670 #define TIM_SlaveMode_Gated                ((uint16_t)0x0005)\r
 671 #define TIM_SlaveMode_Trigger              ((uint16_t)0x0006)\r
 672 #define TIM_SlaveMode_External1            ((uint16_t)0x0007)\r
 673 #define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \\r
 674                                  ((MODE) == TIM_SlaveMode_Gated) || \\r
 675                                  ((MODE) == TIM_SlaveMode_Trigger) || \\r
 676                                  ((MODE) == TIM_SlaveMode_External1))\r
 677 /**\r
 678   * @}\r
 679   */ \r
 680 \r
 681 /** @defgroup TIM_Master_Slave_Mode \r
 682   * @{\r
 683   */\r
 684 \r
 685 #define TIM_MasterSlaveMode_Enable         ((uint16_t)0x0080)\r
 686 #define TIM_MasterSlaveMode_Disable        ((uint16_t)0x0000)\r
 687 #define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \\r
 688                                  ((STATE) == TIM_MasterSlaveMode_Disable))\r
 689 /**\r
 690   * @}\r
 691   */ \r
 692   \r
 693 /** @defgroup TIM_Flags \r
 694   * @{\r
 695   */\r
 696 \r
 697 #define TIM_FLAG_Update                    ((uint16_t)0x0001)\r
 698 #define TIM_FLAG_CC1                       ((uint16_t)0x0002)\r
 699 #define TIM_FLAG_CC2                       ((uint16_t)0x0004)\r
 700 #define TIM_FLAG_CC3                       ((uint16_t)0x0008)\r
 701 #define TIM_FLAG_CC4                       ((uint16_t)0x0010)\r
 702 #define TIM_FLAG_Trigger                   ((uint16_t)0x0040)\r
 703 #define TIM_FLAG_CC1OF                     ((uint16_t)0x0200)\r
 704 #define TIM_FLAG_CC2OF                     ((uint16_t)0x0400)\r
 705 #define TIM_FLAG_CC3OF                     ((uint16_t)0x0800)\r
 706 #define TIM_FLAG_CC4OF                     ((uint16_t)0x1000)\r
 707 #define IS_TIM_GET_FLAG(FLAG) (((FLAG) == TIM_FLAG_Update) || \\r
 708                                ((FLAG) == TIM_FLAG_CC1) || \\r
 709                                ((FLAG) == TIM_FLAG_CC2) || \\r
 710                                ((FLAG) == TIM_FLAG_CC3) || \\r
 711                                ((FLAG) == TIM_FLAG_CC4) || \\r
 712                                ((FLAG) == TIM_FLAG_Trigger) || \\r
 713                                ((FLAG) == TIM_FLAG_CC1OF) || \\r
 714                                ((FLAG) == TIM_FLAG_CC2OF) || \\r
 715                                ((FLAG) == TIM_FLAG_CC3OF) || \\r
 716                                ((FLAG) == TIM_FLAG_CC4OF))\r
 717 #define IS_TIM_CLEAR_FLAG(TIM_FLAG) ((((TIM_FLAG) & (uint16_t)0xE1A0) == 0x0000) && ((TIM_FLAG) != 0x0000)) \r
 718 \r
 719 /**\r
 720   * @}\r
 721   */ \r
 722 \r
 723 /** @defgroup TIM_Input_Capture_Filer_Value \r
 724   * @{\r
 725   */\r
 726 \r
 727 #define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF) \r
 728 /**\r
 729   * @}\r
 730   */ \r
 731 \r
 732 /** @defgroup TIM_External_Trigger_Filter \r
 733   * @{\r
 734   */\r
 735 \r
 736 #define IS_TIM_EXT_FILTER(EXTFILTER) ((EXTFILTER) <= 0xF)\r
 737 /**\r
 738   * @}\r
 739   */\r
 740 \r
 741 /** @defgroup TIM_OCReferenceClear \r
 742   * @{\r
 743   */\r
 744 #define TIM_OCReferenceClear_ETRF          ((uint16_t)0x0008)\r
 745 #define TIM_OCReferenceClear_OCREFCLR      ((uint16_t)0x0000)\r
 746 #define TIM_OCREFERENCECECLEAR_SOURCE(SOURCE) (((SOURCE) == TIM_OCReferenceClear_ETRF) || \\r
 747                                               ((SOURCE) == TIM_OCReferenceClear_OCREFCLR)) \r
 748 \r
 749 /**\r
 750   * @}\r
 751   */\r
 752 \r
 753 /** @defgroup TIM_Remap \r
 754   * @{\r
 755   */\r
 756 \r
 757 #define TIM9_GPIO                          ((uint16_t)0x0000)\r
 758 #define TIM9_LSE                           ((uint16_t)0x0001)\r
 759 \r
 760 #define TIM10_GPIO                         ((uint16_t)0x0000)\r
 761 #define TIM10_LSI                          ((uint16_t)0x0001)\r
 762 #define TIM10_LSE                          ((uint16_t)0x0002)\r
 763 #define TIM10_RTC                          ((uint16_t)0x0003)\r
 764 \r
 765 #define TIM11_GPIO                         ((uint16_t)0x0000)\r
 766 #define TIM11_MSI                          ((uint16_t)0x0001)\r
 767 #define TIM11_HSE_RTC                      ((uint16_t)0x0002)\r
 768 \r
 769 #define IS_TIM_REMAP(TIM_REMAP)  (((TIM_REMAP) == TIM9_GPIO)||\\r
 770                                   ((TIM_REMAP) == TIM9_LSE)||\\r
 771                                   ((TIM_REMAP) == TIM10_GPIO)||\\r
 772                                   ((TIM_REMAP) == TIM10_LSI)||\\r
 773                                   ((TIM_REMAP) == TIM10_LSE)||\\r
 774                                   ((TIM_REMAP) == TIM10_RTC)||\\r
 775                                   ((TIM_REMAP) == TIM11_GPIO)||\\r
 776                                   ((TIM_REMAP) == TIM11_MSI)||\\r
 777                                   ((TIM_REMAP) == TIM11_HSE_RTC)) \r
 778 \r
 779 /**\r
 780   * @}\r
 781   */\r
 782 \r
 783 /**\r
 784   * @}\r
 785   */\r
 786   \r
 787 /* Exported macro ------------------------------------------------------------*/\r
 788 /* Exported functions ------------------------------------------------------- */ \r
 789 \r
 790 /* TimeBase management ********************************************************/\r
 791 void TIM_DeInit(TIM_TypeDef* TIMx);\r
 792 void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);\r
 793 void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);\r
 794 void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode);\r
 795 void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode);\r
 796 void TIM_SetCounter(TIM_TypeDef* TIMx, uint32_t Counter);\r
 797 void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint32_t Autoreload);\r
 798 uint32_t TIM_GetCounter(TIM_TypeDef* TIMx);\r
 799 uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx);\r
 800 void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState);\r
 801 void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource);\r
 802 void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState);\r
 803 void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode);\r
 804 void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD);\r
 805 void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState);\r
 806 \r
 807 /* Output Compare management **************************************************/\r
 808 void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);\r
 809 void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);\r
 810 void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);\r
 811 void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);\r
 812 void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct);\r
 813 void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode);\r
 814 void TIM_SetCompare1(TIM_TypeDef* TIMx, uint32_t Compare1);\r
 815 void TIM_SetCompare2(TIM_TypeDef* TIMx, uint32_t Compare2);\r
 816 void TIM_SetCompare3(TIM_TypeDef* TIMx, uint32_t Compare3);\r
 817 void TIM_SetCompare4(TIM_TypeDef* TIMx, uint32_t Compare4);\r
 818 void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);\r
 819 void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);\r
 820 void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);\r
 821 void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction);\r
 822 void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);\r
 823 void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);\r
 824 void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);\r
 825 void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload);\r
 826 void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);\r
 827 void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);\r
 828 void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);\r
 829 void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast);\r
 830 void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);\r
 831 void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);\r
 832 void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);\r
 833 void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear);\r
 834 void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);\r
 835 void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);\r
 836 void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);\r
 837 void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity);\r
 838 void TIM_SelectOCREFClear(TIM_TypeDef* TIMx, uint16_t TIM_OCReferenceClear);\r
 839 void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx);\r
 840 \r
 841 /* Input Capture management ***************************************************/\r
 842 void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);\r
 843 void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct);\r
 844 void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);\r
 845 uint32_t TIM_GetCapture1(TIM_TypeDef* TIMx);\r
 846 uint32_t TIM_GetCapture2(TIM_TypeDef* TIMx);\r
 847 uint32_t TIM_GetCapture3(TIM_TypeDef* TIMx);\r
 848 uint32_t TIM_GetCapture4(TIM_TypeDef* TIMx);\r
 849 void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);\r
 850 void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);\r
 851 void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);\r
 852 void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC);\r
 853 \r
 854 /* Interrupts, DMA and flags management ***************************************/\r
 855 void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState);\r
 856 void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource);\r
 857 FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG);\r
 858 void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG);\r
 859 ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT);\r
 860 void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT);\r
 861 void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength);\r
 862 void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState);\r
 863 void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState);\r
 864 \r
 865 /* Clocks management **********************************************************/\r
 866 void TIM_InternalClockConfig(TIM_TypeDef* TIMx);\r
 867 void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource);\r
 868 void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource,\r
 869                                 uint16_t TIM_ICPolarity, uint16_t ICFilter);\r
 870 void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,\r
 871                              uint16_t ExtTRGFilter);\r
 872 void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, \r
 873                              uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter);\r
 874 \r
 875 \r
 876 /* Synchronization management *************************************************/\r
 877 void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource);\r
 878 void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource);\r
 879 void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode);\r
 880 void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode);\r
 881 void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,\r
 882                    uint16_t ExtTRGFilter);\r
 883 \r
 884 /* Specific interface management **********************************************/                   \r
 885 void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode,\r
 886                                 uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity);\r
 887 void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState);\r
 888 \r
 889 /* Specific remapping management **********************************************/\r
 890 void TIM_RemapConfig(TIM_TypeDef* TIMx, uint16_t TIM_Remap);\r
 891 \r
 892 \r
 893 #ifdef __cplusplus\r
 894 }\r
 895 #endif\r
 896 \r
 897 #endif /*__STM32L1xx_TIM_H */\r
 898 \r
 899 /**\r
 900   * @}\r
 901   */ \r
 902 \r
 903 /**\r
 904   * @}\r
 905   */\r
 906 \r
 907 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/\r