2 ******************************************************************************
\r
3 * @file stm32l1xx_flash.h
\r
4 * @author MCD Application Team
\r
6 * @date 31-December-2010
\r
7 * @brief This file contains all the functions prototypes for the FLASH
\r
9 ******************************************************************************
\r
12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
\r
13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
\r
14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
\r
15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
\r
16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
\r
17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
\r
19 * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
\r
20 ******************************************************************************
\r
23 /* Define to prevent recursive inclusion -------------------------------------*/
\r
24 #ifndef __STM32L1xx_FLASH_H
\r
25 #define __STM32L1xx_FLASH_H
\r
31 /* Includes ------------------------------------------------------------------*/
\r
32 #include "stm32l1xx.h"
\r
34 /** @addtogroup STM32L1xx_StdPeriph_Driver
\r
38 /** @addtogroup FLASH
\r
42 /* Exported types ------------------------------------------------------------*/
\r
45 * @brief FLASH Status
\r
51 FLASH_ERROR_PROGRAM,
\r
56 /* Exported constants --------------------------------------------------------*/
\r
58 /** @defgroup FLASH_Exported_Constants
\r
62 /** @defgroup FLASH_Latency
\r
65 #define FLASH_Latency_0 ((uint8_t)0x00) /*!< FLASH Zero Latency cycle */
\r
66 #define FLASH_Latency_1 ((uint8_t)0x01) /*!< FLASH One Latency cycle */
\r
68 #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_Latency_0) || \
\r
69 ((LATENCY) == FLASH_Latency_1))
\r
74 /** @defgroup FLASH_Interrupts
\r
78 #define FLASH_IT_EOP FLASH_PECR_EOPIE /*!< End of programming interrupt source */
\r
79 #define FLASH_IT_ERR FLASH_PECR_ERRIE /*!< Error interrupt source */
\r
80 #define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0xFFFCFFFF) == 0x00000000) && (((IT) != 0x00000000)))
\r
85 /** @defgroup FLASH_Address
\r
89 #define IS_FLASH_DATA_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08080000) && ((ADDRESS) <= 0x08080FFF))
\r
90 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0801FFFF))
\r
96 /** @defgroup Option_Bytes_Write_Protection
\r
101 #define OB_WRP_Pages0to15 ((uint32_t)0x00000001) /* Write protection of Sector0 */
\r
102 #define OB_WRP_Pages16to31 ((uint32_t)0x00000002) /* Write protection of Sector1 */
\r
103 #define OB_WRP_Pages32to47 ((uint32_t)0x00000004) /* Write protection of Sector2 */
\r
104 #define OB_WRP_Pages48to63 ((uint32_t)0x00000008) /* Write protection of Sector3 */
\r
105 #define OB_WRP_Pages64to79 ((uint32_t)0x00000010) /* Write protection of Sector4 */
\r
106 #define OB_WRP_Pages80to95 ((uint32_t)0x00000020) /* Write protection of Sector5 */
\r
107 #define OB_WRP_Pages96to111 ((uint32_t)0x00000040) /* Write protection of Sector6 */
\r
108 #define OB_WRP_Pages112to127 ((uint32_t)0x00000080) /* Write protection of Sector7 */
\r
109 #define OB_WRP_Pages128to143 ((uint32_t)0x00000100) /* Write protection of Sector8 */
\r
110 #define OB_WRP_Pages144to159 ((uint32_t)0x00000200) /* Write protection of Sector9 */
\r
111 #define OB_WRP_Pages160to175 ((uint32_t)0x00000400) /* Write protection of Sector10 */
\r
112 #define OB_WRP_Pages176to191 ((uint32_t)0x00000800) /* Write protection of Sector11 */
\r
113 #define OB_WRP_Pages192to207 ((uint32_t)0x00001000) /* Write protection of Sector12 */
\r
114 #define OB_WRP_Pages208to223 ((uint32_t)0x00002000) /* Write protection of Sector13 */
\r
115 #define OB_WRP_Pages224to239 ((uint32_t)0x00004000) /* Write protection of Sector14 */
\r
116 #define OB_WRP_Pages240to255 ((uint32_t)0x00008000) /* Write protection of Sector15 */
\r
117 #define OB_WRP_Pages256to271 ((uint32_t)0x00010000) /* Write protection of Sector16 */
\r
118 #define OB_WRP_Pages272to287 ((uint32_t)0x00020000) /* Write protection of Sector17 */
\r
119 #define OB_WRP_Pages288to303 ((uint32_t)0x00040000) /* Write protection of Sector18 */
\r
120 #define OB_WRP_Pages304to319 ((uint32_t)0x00080000) /* Write protection of Sector19 */
\r
121 #define OB_WRP_Pages320to335 ((uint32_t)0x00100000) /* Write protection of Sector20 */
\r
122 #define OB_WRP_Pages336to351 ((uint32_t)0x00200000) /* Write protection of Sector21 */
\r
123 #define OB_WRP_Pages352to367 ((uint32_t)0x00400000) /* Write protection of Sector22 */
\r
124 #define OB_WRP_Pages368to383 ((uint32_t)0x00800000) /* Write protection of Sector23 */
\r
125 #define OB_WRP_Pages384to399 ((uint32_t)0x01000000) /* Write protection of Sector24 */
\r
126 #define OB_WRP_Pages400to415 ((uint32_t)0x02000000) /* Write protection of Sector25 */
\r
127 #define OB_WRP_Pages416to431 ((uint32_t)0x04000000) /* Write protection of Sector26 */
\r
128 #define OB_WRP_Pages432to447 ((uint32_t)0x08000000) /* Write protection of Sector27 */
\r
129 #define OB_WRP_Pages448to463 ((uint32_t)0x10000000) /* Write protection of Sector28 */
\r
130 #define OB_WRP_Pages464to479 ((uint32_t)0x20000000) /* Write protection of Sector29 */
\r
131 #define OB_WRP_Pages480to495 ((uint32_t)0x40000000) /* Write protection of Sector30 */
\r
132 #define OB_WRP_Pages496to511 ((uint32_t)0x80000000) /* Write protection of Sector31 */
\r
134 #define OB_WRP_AllPages ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Sectors */
\r
136 #define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000))
\r
142 /** @defgroup Option_Bytes_Read_Protection
\r
147 * @brief Read Protection Level
\r
149 #define OB_RDP_Level_0 ((uint8_t)0xAA)
\r
150 #define OB_RDP_Level_1 ((uint8_t)0xBB)
\r
151 /*#define OB_RDP_Level_2 ((uint8_t)0xCC)*/ /* Warning: When enabling read protection level 2
\r
152 it's no more possible to go back to level 1 or 0 */
\r
154 #define IS_OB_RDP(LEVEL) (((LEVEL) == OB_RDP_Level_0)||\
\r
155 ((LEVEL) == OB_RDP_Level_1))/*||\
\r
156 ((LEVEL) == OB_RDP_Level_2))*/
\r
161 /** @defgroup Option_Bytes_IWatchdog
\r
165 #define OB_IWDG_SW ((uint8_t)0x10) /*!< Software WDG selected */
\r
166 #define OB_IWDG_HW ((uint8_t)0x00) /*!< Hardware WDG selected */
\r
167 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
\r
173 /** @defgroup Option_Bytes_nRST_STOP
\r
177 #define OB_STOP_NoRST ((uint8_t)0x20) /*!< No reset generated when entering in STOP */
\r
178 #define OB_STOP_RST ((uint8_t)0x00) /*!< Reset generated when entering in STOP */
\r
179 #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NoRST) || ((SOURCE) == OB_STOP_RST))
\r
185 /** @defgroup Option_Bytes_nRST_STDBY
\r
189 #define OB_STDBY_NoRST ((uint8_t)0x40) /*!< No reset generated when entering in STANDBY */
\r
190 #define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */
\r
191 #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST))
\r
197 /** @defgroup Option_Bytes_BOR_Level
\r
201 #define OB_BOR_OFF ((uint8_t)0x00) /*!< BOR is disabled at power down, the reset is asserted when the VDD
\r
202 power supply reaches the PDR(Power Down Reset) threshold (1.5V) */
\r
203 #define OB_BOR_LEVEL1 ((uint8_t)0x08) /*!< BOR Reset threshold levels for 1.7V - 1.8V VDD power supply */
\r
204 #define OB_BOR_LEVEL2 ((uint8_t)0x09) /*!< BOR Reset threshold levels for 1.9V - 2.0V VDD power supply */
\r
205 #define OB_BOR_LEVEL3 ((uint8_t)0x0A) /*!< BOR Reset threshold levels for 2.3V - 2.4V VDD power supply */
\r
206 #define OB_BOR_LEVEL4 ((uint8_t)0x0B) /*!< BOR Reset threshold levels for 2.55V - 2.65V VDD power supply */
\r
207 #define OB_BOR_LEVEL5 ((uint8_t)0x0C) /*!< BOR Reset threshold levels for 2.8V - 2.9V VDD power supply */
\r
209 #define IS_OB_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_OFF) || \
\r
210 ((LEVEL) == OB_BOR_LEVEL1) || \
\r
211 ((LEVEL) == OB_BOR_LEVEL2) || \
\r
212 ((LEVEL) == OB_BOR_LEVEL3) || \
\r
213 ((LEVEL) == OB_BOR_LEVEL4) || \
\r
214 ((LEVEL) == OB_BOR_LEVEL5))
\r
220 /** @defgroup FLASH_Flags
\r
224 #define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */
\r
225 #define FLASH_FLAG_EOP FLASH_SR_EOP /*!< FLASH End of Programming flag */
\r
226 #define FLASH_FLAG_ENDHV FLASH_SR_ENHV /*!< FLASH End of High Voltage flag */
\r
227 #define FLASH_FLAG_READY FLASH_SR_READY /*!< FLASH Ready flag after low power mode */
\r
228 #define FLASH_FLAG_WRPERR FLASH_SR_WRPERR /*!< FLASH Write protected error flag */
\r
229 #define FLASH_FLAG_PGAERR FLASH_SR_PGAERR /*!< FLASH Programming Alignment error flag */
\r
230 #define FLASH_FLAG_SIZERR FLASH_SR_SIZERR /*!< FLASH Size error flag */
\r
231 #define FLASH_FLAG_OPTVERR FLASH_SR_OPTVERR /*!< FLASH Option Validity error flag */
\r
233 #define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFF0FD) == 0x00000000) && ((FLAG) != 0x00000000))
\r
235 #define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_EOP) || \
\r
236 ((FLAG) == FLASH_FLAG_ENDHV) || ((FLAG) == FLASH_FLAG_READY ) || \
\r
237 ((FLAG) == FLASH_FLAG_WRPERR) || ((FLAG) == FLASH_FLAG_PGAERR ) || \
\r
238 ((FLAG) == FLASH_FLAG_SIZERR) || ((FLAG) == FLASH_FLAG_OPTVERR))
\r
243 /** @defgroup FLASH_Keys
\r
247 #define FLASH_PDKEY1 ((uint32_t)0x04152637) /*!< Flash power down key1 */
\r
248 #define FLASH_PDKEY2 ((uint32_t)0xFAFBFCFD) /*!< Flash power down key2: used with FLASH_PDKEY1
\r
249 to unlock the RUN_PD bit in FLASH_ACR */
\r
251 #define FLASH_PEKEY1 ((uint32_t)0x89ABCDEF) /*!< Flash program erase key1 */
\r
252 #define FLASH_PEKEY2 ((uint32_t)0x02030405) /*!< Flash program erase key: used with FLASH_PEKEY2
\r
253 to unlock the write access to the FLASH_PECR register and
\r
256 #define FLASH_PRGKEY1 ((uint32_t)0x8C9DAEBF) /*!< Flash program memory key1 */
\r
257 #define FLASH_PRGKEY2 ((uint32_t)0x13141516) /*!< Flash program memory key2: used with FLASH_PRGKEY2
\r
258 to unlock the program memory */
\r
260 #define FLASH_OPTKEY1 ((uint32_t)0xFBEAD9C8) /*!< Flash option key1 */
\r
261 #define FLASH_OPTKEY2 ((uint32_t)0x24252627) /*!< Flash option key2: used with FLASH_OPTKEY1 to
\r
262 unlock the write access to the option byte block */
\r
267 /** @defgroup Timeout_definition
\r
270 #define FLASH_ER_PRG_TIMEOUT ((uint32_t)0x8000)
\r
280 /* Exported macro ------------------------------------------------------------*/
\r
281 /* Exported functions ------------------------------------------------------- */
\r
284 * @brief FLASH memory functions that can be executed from FLASH.
\r
286 /* FLASH Interface configuration functions ************************************/
\r
287 void FLASH_SetLatency(uint32_t FLASH_Latency);
\r
288 void FLASH_PrefetchBufferCmd(FunctionalState NewState);
\r
289 void FLASH_ReadAccess64Cmd(FunctionalState NewState);
\r
290 void FLASH_SLEEPPowerDownCmd(FunctionalState NewState);
\r
292 /* FLASH Memory Programming functions *****************************************/
\r
293 void FLASH_Unlock(void);
\r
294 void FLASH_Lock(void);
\r
295 FLASH_Status FLASH_ErasePage(uint32_t Page_Address);
\r
296 FLASH_Status FLASH_FastProgramWord(uint32_t Address, uint32_t Data);
\r
298 /* DATA EEPROM Programming functions ******************************************/
\r
299 void DATA_EEPROM_Unlock(void);
\r
300 void DATA_EEPROM_Lock(void);
\r
301 void DATA_EEPROM_FixedTimeProgramCmd(FunctionalState NewState);
\r
302 FLASH_Status DATA_EEPROM_EraseWord(uint32_t Address);
\r
303 FLASH_Status DATA_EEPROM_FastProgramByte(uint32_t Address, uint8_t Data);
\r
304 FLASH_Status DATA_EEPROM_FastProgramHalfWord(uint32_t Address, uint16_t Data);
\r
305 FLASH_Status DATA_EEPROM_FastProgramWord(uint32_t Address, uint32_t Data);
\r
306 FLASH_Status DATA_EEPROM_ProgramByte(uint32_t Address, uint8_t Data);
\r
307 FLASH_Status DATA_EEPROM_ProgramHalfWord(uint32_t Address, uint16_t Data);
\r
308 FLASH_Status DATA_EEPROM_ProgramWord(uint32_t Address, uint32_t Data);
\r
310 /* Option Bytes Programming functions *****************************************/
\r
311 void FLASH_OB_Unlock(void);
\r
312 void FLASH_OB_Lock(void);
\r
313 void FLASH_OB_Launch(void);
\r
314 FLASH_Status FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState);
\r
315 FLASH_Status FLASH_OB_RDPConfig(uint8_t OB_RDP);
\r
316 FLASH_Status FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY);
\r
317 FLASH_Status FLASH_OB_BORConfig(uint8_t OB_BOR);
\r
318 uint8_t FLASH_OB_GetUser(void);
\r
319 uint32_t FLASH_OB_GetWRP(void);
\r
320 FlagStatus FLASH_OB_GetRDP(void);
\r
321 uint8_t FLASH_OB_GetBOR(void);
\r
323 /* Interrupts and flags management functions **********************************/
\r
324 void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState);
\r
325 FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG);
\r
326 void FLASH_ClearFlag(uint32_t FLASH_FLAG);
\r
327 FLASH_Status FLASH_GetStatus(void);
\r
328 FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout);
\r
331 * @brief FLASH memory functions that should be executed from internal SRAM.
\r
332 * These functions are defined inside the "stm32l1xx_flash_ramfunc.c"
\r
335 FLASH_Status FLASH_RUNPowerDownCmd(FunctionalState NewState);
\r
336 FLASH_Status FLASH_ProgramHalfPage(uint32_t Address, uint32_t* pBuffer);
\r
337 FLASH_Status DATA_EEPROM_EraseDoubleWord(uint32_t Address);
\r
338 FLASH_Status DATA_EEPROM_ProgramDoubleWord(uint32_t Address, uint64_t Data);
\r
344 #endif /* __STM32L1xx_FLASH_H */
\r
354 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
\r