1 \input texinfo @c -*-texinfo-*-
3 @setfilename openocd.info
4 @settitle Open On-Chip Debugger (OpenOCD)
5 @dircategory Development
8 * OpenOCD: (openocd). Open On-Chip Debugger.
17 @item Copyright @copyright{} 2008 The OpenOCD Project
18 @item Copyright @copyright{} 2007-2008 Spencer Oliver @email{spen@@spen-soft.co.uk}
19 @item Copyright @copyright{} 2008 Oyvind Harboe @email{oyvind.harboe@@zylin.com}
20 @item Copyright @copyright{} 2008 Duane Ellis @email{openocd@@duaneellis.com}
24 Permission is granted to copy, distribute and/or modify this document
25 under the terms of the GNU Free Documentation License, Version 1.2 or
26 any later version published by the Free Software Foundation; with no
27 Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
28 Texts. A copy of the license is included in the section entitled ``GNU
29 Free Documentation License''.
34 @title Open On-Chip Debugger (OpenOCD)
35 @subtitle Edition @value{EDITION} for OpenOCD version @value{VERSION}
36 @subtitle @value{UPDATED}
38 @vskip 0pt plus 1filll
45 @node Top, About, , (dir)
48 This manual documents edition @value{EDITION} of the Open On-Chip Debugger
49 (OpenOCD) version @value{VERSION}, @value{UPDATED}.
54 * About:: About OpenOCD
55 * Developers:: OpenOCD Developers
56 * Building:: Building OpenOCD
57 * JTAG Hardware Dongles:: JTAG Hardware Dongles
58 * Running:: Running OpenOCD
59 * Simple Configuration Files:: Simple Configuration Files
60 * Config File Guidelines:: Config File Guidelines
61 * About JIM-Tcl:: About JIM-Tcl
62 * Daemon Configuration:: Daemon Configuration
63 * Interface - Dongle Configuration:: Interface - Dongle Configuration
64 * Reset Configuration:: Reset Configuration
65 * Tap Creation:: Tap Creation
66 * Target Configuration:: Target Configuration
67 * Flash Configuration:: Flash Configuration
68 * General Commands:: General Commands
69 * JTAG Commands:: JTAG Commands
70 * Sample Scripts:: Sample Target Scripts
72 * GDB and OpenOCD:: Using GDB and OpenOCD
73 * Tcl Scripting API:: Tcl Scripting API
74 * Upgrading:: Deprecated/Removed Commands
75 * Target Library:: Target Library
76 * FAQ:: Frequently Asked Questions
77 * Tcl Crash Course:: Tcl Crash Course
78 * License:: GNU Free Documentation License
79 @comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
80 @comment case issue with ``Index.html'' and ``index.html''
81 @comment Occurs when creating ``--html --no-split'' output
82 @comment This fix is based on: http://sourceware.org/ml/binutils/2006-05/msg00215.html
83 * OpenOCD Index:: Main Index
90 The Open On-Chip Debugger (OpenOCD) aims to provide debugging,
91 in-system programming and boundary-scan testing for embedded target
94 @b{JTAG:} OpenOCD uses a ``hardware interface dongle'' to communicate
95 with the JTAG (IEEE 1149.1) compliant taps on your target board.
97 @b{Dongles:} OpenOCD currently supports many types of hardware dongles: USB
98 based, parallel port based, and other standalone boxes that run
99 OpenOCD internally. See the section titled: @xref{JTAG Hardware Dongles}.
101 @b{GDB Debug:} It allows ARM7 (ARM7TDMI and ARM720t), ARM9 (ARM920T,
102 ARM922T, ARM926EJ--S, ARM966E--S), XScale (PXA25x, IXP42x) and
103 Cortex-M3 (Luminary Stellaris LM3 and ST STM32) based cores to be
104 debugged via the GDB protocol.
106 @b{Flash Programing:} Flash writing is supported for external CFI
107 compatible flashes (Intel and AMD/Spansion command set) and several
108 internal flashes (LPC2000, AT91SAM7, STR7x, STR9x, LM3, and
109 STM32x). Preliminary support for using the LPC3180's NAND flash
110 controller is included.
116 OpenOCD was created by Dominic Rath as part of a diploma thesis written at the
117 University of Applied Sciences Augsburg (@uref{http://www.fh-augsburg.de}).
118 Others interested in improving the state of free and open debug and testing technology
119 are welcome to participate.
121 Other developers have contributed support for additional targets and flashes as well
122 as numerous bugfixes and enhancements. See the AUTHORS file for regular contributors.
124 The main OpenOCD web site is available at @uref{http://openocd.berlios.de/web/}.
128 @cindex building OpenOCD
130 @section Pre-Built Tools
131 If you are interested in getting actual work done rather than building
132 OpenOCD, then check if your interface supplier provides binaries for
133 you. Chances are that that binary is from some SVN version that is more
134 stable than SVN trunk where bleeding edge development takes place.
136 @section Packagers Please Read!
138 You are a @b{PACKAGER} of OpenOCD if you
141 @item @b{Sell dongles} and include pre-built binaries
142 @item @b{Supply tools} i.e.: A complete development solution
143 @item @b{Supply IDEs} like Eclipse, or RHIDE, etc.
144 @item @b{Build packages} i.e.: RPM files, or DEB files for a Linux Distro
147 As a @b{PACKAGER} - you are at the top of the food chain. You solve
148 problems for downstream users. What you fix or solve - solves hundreds
149 if not thousands of user questions. If something does not work for you
150 please let us know. That said, would also like you to follow a few
154 @item @b{Always build with printer ports enabled.}
155 @item @b{Try to use LIBFTDI + LIBUSB where possible. You cover more bases.}
159 @item @b{Why YES to LIBFTDI + LIBUSB?}
161 @item @b{LESS} work - libusb perhaps already there
162 @item @b{LESS} work - identical code, multiple platforms
163 @item @b{MORE} dongles are supported
164 @item @b{MORE} platforms are supported
165 @item @b{MORE} complete solution
167 @item @b{Why not LIBFTDI + LIBUSB} (i.e.: ftd2xx instead)?
169 @item @b{LESS} speed - some say it is slower
170 @item @b{LESS} complex to distribute (external dependencies)
174 @section Building From Source
176 You can download the current SVN version with an SVN client of your choice from the
177 following repositories:
179 @uref{svn://svn.berlios.de/openocd/trunk}
183 @uref{http://svn.berlios.de/svnroot/repos/openocd/trunk}
185 Using the SVN command line client, you can use the following command to fetch the
186 latest version (make sure there is no (non-svn) directory called "openocd" in the
190 svn checkout svn://svn.berlios.de/openocd/trunk openocd
193 Building OpenOCD requires a recent version of the GNU autotools (autoconf >= 2.59 and automake >= 1.9).
194 For building on Windows,
195 you have to use Cygwin. Make sure that your @env{PATH} environment variable contains no
196 other locations with Unix utils (like UnxUtils) - these can't handle the Cygwin
197 paths, resulting in obscure dependency errors (This is an observation I've gathered
198 from the logs of one user - correct me if I'm wrong).
200 You further need the appropriate driver files, if you want to build support for
201 a FTDI FT2232 based interface:
204 @item @b{ftdi2232} libftdi (@uref{http://www.intra2net.com/opensource/ftdi/})
205 @item @b{ftd2xx} libftd2xx (@uref{http://www.ftdichip.com/Drivers/D2XX.htm})
206 @item When using the Amontec JTAGkey, you have to get the drivers from the Amontec
207 homepage (@uref{http://www.amontec.com}), as the JTAGkey uses a non-standard VID/PID.
210 libftdi is supported under Windows. Do not use versions earlier than 0.14.
212 In general, the D2XX driver provides superior performance (several times as fast),
213 but has the draw-back of being binary-only - though that isn't that bad, as it isn't
214 a kernel module, only a user space library.
216 To build OpenOCD (on both Linux and Cygwin), use the following commands:
222 Bootstrap generates the configure script, and prepares building on your system.
225 ./configure [options, see below]
228 Configure generates the Makefiles used to build OpenOCD.
235 Make builds OpenOCD, and places the final executable in ./src/, the last step, ``make install'' is optional.
237 The configure script takes several options, specifying which JTAG interfaces
238 should be included (among other things):
242 @option{--enable-parport} - Enable building the PC parallel port driver.
244 @option{--enable-parport_ppdev} - Enable use of ppdev (/dev/parportN) for parport.
246 @option{--enable-parport_giveio} - Enable use of giveio for parport instead of ioperm.
248 @option{--enable-amtjtagaccel} - Enable building the Amontec JTAG-Accelerator driver.
250 @option{--enable-ecosboard} - Enable building support for eCosBoard based JTAG debugger.
252 @option{--enable-ioutil} - Enable ioutil functions - useful for standalone OpenOCD implementations.
254 @option{--enable-httpd} - Enable builtin httpd server - useful for standalone OpenOCD implementations.
256 @option{--enable-ep93xx} - Enable building support for EP93xx based SBCs.
258 @option{--enable-at91rm9200} - Enable building support for AT91RM9200 based SBCs.
260 @option{--enable-gw16012} - Enable building support for the Gateworks GW16012 JTAG programmer.
262 @option{--enable-ft2232_ftd2xx} - Numerous USB type ARM JTAG dongles use the FT2232C chip from this FTDICHIP.COM chip (closed source).
264 @option{--enable-ft2232_libftdi} - An open source (free) alternative to FTDICHIP.COM ftd2xx solution (Linux, MacOS, Cygwin).
266 @option{--with-ftd2xx-win32-zipdir=PATH} - If using FTDICHIP.COM ft2232c, point at the directory where the Win32 FTDICHIP.COM 'CDM' driver zip file was unpacked.
268 @option{--with-ftd2xx-linux-tardir=PATH} - Linux only. Equivalent of @option{--with-ftd2xx-win32-zipdir}, where you unpacked the TAR.GZ file.
270 @option{--with-ftd2xx-lib=shared|static} - Linux only. Default: static. Specifies how the FTDICHIP.COM libftd2xx driver should be linked. Note: 'static' only works in conjunction with @option{--with-ftd2xx-linux-tardir}. The 'shared' value is supported (12/26/2008), however you must manually install the required header files and shared libraries in an appropriate place. This uses ``libusb'' internally.
272 @option{--enable-presto_libftdi} - Enable building support for ASIX Presto programmer using the libftdi driver.
274 @option{--enable-presto_ftd2xx} - Enable building support for ASIX Presto programmer using the FTD2XX driver.
276 @option{--enable-usbprog} - Enable building support for the USBprog JTAG programmer.
278 @option{--enable-oocd_trace} - Enable building support for the OpenOCD+trace ETM capture device.
280 @option{--enable-jlink} - Enable building support for the Segger J-Link JTAG programmer.
282 @option{--enable-vsllink} - Enable building support for the Versaloon-Link JTAG programmer.
284 @option{--enable-rlink} - Enable building support for the Raisonance RLink JTAG programmer.
286 @option{--enable-arm-jtag-ew} - Enable building support for the Olimex ARM-JTAG-EW programmer.
288 @option{--enable-dummy} - Enable building the dummy port driver.
291 @section Parallel Port Dongles
293 If you want to access the parallel port using the PPDEV interface you have to specify
294 both the @option{--enable-parport} AND the @option{--enable-parport_ppdev} option since
295 the @option{--enable-parport_ppdev} option actually is an option to the parport driver
296 (see @uref{http://forum.sparkfun.com/viewtopic.php?t=3795} for more info).
298 The same is true for the @option{--enable-parport_giveio} option, you have to
299 use both the @option{--enable-parport} AND the @option{--enable-parport_giveio} option if you want to use giveio instead of ioperm parallel port access method.
301 @section FT2232C Based USB Dongles
303 There are 2 methods of using the FTD2232, either (1) using the
304 FTDICHIP.COM closed source driver, or (2) the open (and free) driver
305 libftdi. Some claim the (closed) FTDICHIP.COM solution is faster.
307 The FTDICHIP drivers come as either a (win32) ZIP file, or a (Linux)
308 TAR.GZ file. You must unpack them ``some where'' convient. As of this
309 writing (12/26/2008) FTDICHIP does not supply means to install these
310 files ``in an appropriate place'' As a result, there are two
311 ``./configure'' options that help.
313 Below is an example build process:
315 1) Check out the latest version of ``openocd'' from SVN.
317 2) Download & unpack either the Windows or Linux FTD2xx drivers
318 (@uref{http://www.ftdichip.com/Drivers/D2XX.htm}).
321 /home/duane/ftd2xx.win32 => the Cygwin/Win32 ZIP file contents.
322 /home/duane/libftd2xx0.4.16 => the Linux TAR.GZ file contents.
325 3) Configure with these options:
328 Cygwin FTDICHIP solution:
329 ./configure --prefix=/home/duane/mytools \
330 --enable-ft2232_ftd2xx \
331 --with-ftd2xx-win32-zipdir=/home/duane/ftd2xx.win32
333 Linux FTDICHIP solution:
334 ./configure --prefix=/home/duane/mytools \
335 --enable-ft2232_ftd2xx \
336 --with-ft2xx-linux-tardir=/home/duane/libftd2xx0.4.16
338 Cygwin/Linux LIBFTDI solution:
340 1a) For Windows: The Windows port of LIBUSB is in place.
341 1b) For Linux: libusb has been built/installed and is in place.
343 2) And libftdi has been built and installed
344 Note: libftdi - relies upon libusb.
346 ./configure --prefix=/home/duane/mytools \
347 --enable-ft2232_libftdi
351 4) Then just type ``make'', and perhaps ``make install''.
354 @section Miscellaneous Configure Options
358 @option{--disable-option-checking} - Ignore unrecognized @option{--enable} and @option{--with} options.
360 @option{--enable-gccwarnings} - Enable extra gcc warnings during build.
363 @option{--enable-release} - Enable building of an OpenOCD release, generally
364 this is for developers. It simply omits the svn version string when the
365 openocd @option{-v} is executed.
368 @node JTAG Hardware Dongles
369 @chapter JTAG Hardware Dongles
378 Defined: @b{dongle}: A small device that plugins into a computer and serves as
379 an adapter .... [snip]
381 In the OpenOCD case, this generally refers to @b{a small adapater} one
382 attaches to your computer via USB or the Parallel Printer Port. The
383 execption being the Zylin ZY1000 which is a small box you attach via
384 an ethernet cable. The Zylin ZY1000 has the advantage that it does not
385 require any drivers to be installed on the developer PC. It also has
386 a built in web interface. It supports RTCK/RCLK or adaptive clocking
387 and has a built in relay to power cycle targets remotely.
390 @section Choosing a Dongle
392 There are three things you should keep in mind when choosing a dongle.
395 @item @b{Voltage} What voltage is your target? 1.8, 2.8, 3.3, or 5V? Does your dongle support it?
396 @item @b{Connection} Printer Ports - Does your computer have one?
397 @item @b{Connection} Is that long printer bit-bang cable practical?
398 @item @b{RTCK} Do you require RTCK? Also known as ``adaptive clocking''
401 @section Stand alone Systems
403 @b{ZY1000} See: @url{http://www.zylin.com/zy1000.html} Technically, not a
404 dongle, but a standalone box. The ZY1000 has the advantage that it does
405 not require any drivers installed on the developer PC. It also has
406 a built in web interface. It supports RTCK/RCLK or adaptive clocking
407 and has a built in relay to power cycle targets remotely.
409 @section USB FT2232 Based
411 There are many USB JTAG dongles on the market, many of them are based
412 on a chip from ``Future Technology Devices International'' (FTDI)
413 known as the FTDI FT2232.
415 See: @url{http://www.ftdichip.com} or @url{http://www.ftdichip.com/Products/FT2232H.htm}
417 As of 28/Nov/2008, the following are supported:
421 @* Link @url{http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html}
423 @* See: @url{http://www.amontec.com/jtagkey.shtml}
425 @* See: @url{http://www.oocdlink.com} By Joern Kaipf
427 @* See: @url{http://www.signalyzer.com}
428 @item @b{evb_lm3s811}
429 @* See: @url{http://www.luminarymicro.com} - The Luminary Micro Stellaris LM3S811 eval board has an FTD2232C chip built in.
430 @item @b{olimex-jtag}
431 @* See: @url{http://www.olimex.com}
433 @* See: @url{http://www.tincantools.com}
434 @item @b{turtelizer2}
435 @* See: @url{http://www.ethernut.de}, or @url{http://www.ethernut.de/en/hardware/turtelizer/index.html}
437 @* Link: @url{http://www.hitex.com/index.php?id=383}
439 @* Link @url{http://www.hitex.com/stm32-stick}
440 @item @b{axm0432_jtag}
441 @* Axiom AXM-0432 Link @url{http://www.axman.com}
444 @section USB JLINK based
445 There are several OEM versions of the Segger @b{JLINK} adapter. It is
446 an example of a micro controller based JTAG adapter, it uses an
447 AT91SAM764 internally.
450 @item @b{ATMEL SAMICE} Only works with ATMEL chips!
451 @* Link: @url{http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3892}
452 @item @b{SEGGER JLINK}
453 @* Link: @url{http://www.segger.com/jlink.html}
455 @* Link: @url{http://www.iar.com/website1/1.0.1.0/369/1/index.php}
458 @section USB RLINK based
459 Raisonance has an adapter called @b{RLink}. It exists in a stripped-down form on the STM32 Primer, permanently attached to the JTAG lines. It also exists on the STM32 Primer2, but that is wired for SWD and not JTAG, thus not supported.
462 @item @b{Raisonance RLink}
463 @* Link: @url{http://www.raisonance.com/products/RLink.php}
464 @item @b{STM32 Primer}
465 @* Link: @url{http://www.stm32circle.com/resources/stm32primer.php}
466 @item @b{STM32 Primer2}
467 @* Link: @url{http://www.stm32circle.com/resources/stm32primer2.php}
473 @* Link: @url{http://www.embedded-projects.net/usbprog} - which uses an Atmel MEGA32 and a UBN9604
475 @item @b{USB - Presto}
476 @* Link: @url{http://tools.asix.net/prg_presto.htm}
478 @item @b{Versaloon-Link}
479 @* Link: @url{http://www.simonqian.com/en/Versaloon}
481 @item @b{ARM-JTAG-EW}
482 @* Link: @url{http://www.olimex.com/dev/arm-jtag-ew.html}
485 @section IBM PC Parallel Printer Port Based
487 The two well known ``JTAG Parallel Ports'' cables are the Xilnx DLC5
488 and the MacGraigor Wiggler. There are many clones and variations of
493 @item @b{Wiggler} - There are many clones of this.
494 @* Link: @url{http://www.macraigor.com/wiggler.htm}
496 @item @b{DLC5} - From XILINX - There are many clones of this
497 @* Link: Search the web for: ``XILINX DLC5'' - it is no longer
498 produced, PDF schematics are easily found and it is easy to make.
500 @item @b{Amontec - JTAG Accelerator}
501 @* Link: @url{http://www.amontec.com/jtag_accelerator.shtml}
504 @* Link: @url{http://www.gateworks.com/products/avila_accessories/gw16042.php}
507 @* Link: @url{http://www.ccac.rwth-aachen.de/~michaels/index.php/hardware/armjtag}
509 @item @b{Wiggler_ntrst_inverted}
510 @* Yet another variation - See the source code, src/jtag/parport.c
512 @item @b{old_amt_wiggler}
513 @* Unknown - probably not on the market today
516 @* Link: Most likely @url{http://www.olimex.com/dev/arm-jtag.html} [another wiggler clone]
519 @* Link: @url{http://www.amontec.com/chameleon.shtml}
525 @* ispDownload from Lattice Semiconductor @url{http://www.latticesemi.com/lit/docs/devtools/dlcable.pdf}
528 @* From ST Microsystems, link:
529 @url{http://www.st.com/stonline/products/literature/um/7889.pdf}
530 Title: FlashLINK JTAG programing cable for PSD and uPSD
538 @* An EP93xx based Linux machine using the GPIO pins directly.
541 @* Like the EP93xx - but an ATMEL AT91RM9200 based solution using the GPIO pins on the chip.
547 @cindex running OpenOCD
549 @cindex --debug_level
553 The @option{--help} option shows:
557 --help | -h display this help
558 --version | -v display OpenOCD version
559 --file | -f use configuration file <name>
560 --search | -s dir to search for config files and scripts
561 --debug | -d set debug level <0-3>
562 --log_output | -l redirect log output to file <name>
563 --command | -c run <command>
564 --pipe | -p use pipes when talking to gdb
567 By default OpenOCD reads the file configuration file ``openocd.cfg''
568 in the current directory. To specify a different (or multiple)
569 configuration file, you can use the ``-f'' option. For example:
572 openocd -f config1.cfg -f config2.cfg -f config3.cfg
575 Once started, OpenOCD runs as a daemon, waiting for connections from
576 clients (Telnet, GDB, Other).
578 If you are having problems, you can enable internal debug messages via
581 Also it is possible to interleave commands w/config scripts using the
582 @option{-c} command line switch.
584 To enable debug output (when reporting problems or working on OpenOCD
585 itself), use the @option{-d} command line switch. This sets the
586 @option{debug_level} to "3", outputting the most information,
587 including debug messages. The default setting is "2", outputting only
588 informational messages, warnings and errors. You can also change this
589 setting from within a telnet or gdb session using @option{debug_level
590 <n>} @xref{debug_level}.
592 You can redirect all output from the daemon to a file using the
593 @option{-l <logfile>} switch.
595 Search paths for config/script files can be added to OpenOCD by using
596 the @option{-s <search>} switch. The current directory and the OpenOCD
597 target library is in the search path by default.
599 For details on the @option{-p} option. @xref{Connecting to GDB}.
601 Note! OpenOCD will launch the GDB & telnet server even if it can not
602 establish a connection with the target. In general, it is possible for
603 the JTAG controller to be unresponsive until the target is set up
604 correctly via e.g. GDB monitor commands in a GDB init script.
606 @node Simple Configuration Files
607 @chapter Simple Configuration Files
608 @cindex configuration
611 There are 4 basic ways of ``configurating'' OpenOCD to run, they are:
614 @item A small openocd.cfg file which ``sources'' other configuration files
615 @item A monolithic openocd.cfg file
616 @item Many -f filename options on the command line
617 @item Your Mixed Solution
620 @section Small configuration file method
622 This is the preferred method. It is simple and works well for many
623 people. The developers of OpenOCD would encourage you to use this
624 method. If you create a new configuration please email new
625 configurations to the development list.
627 Here is an example of an openocd.cfg file for an ATMEL at91sam7x256
630 source [find interface/signalyzer.cfg]
632 # Change the default telnet port...
636 # GDB can also flash my flash!
637 gdb_memory_map enable
638 gdb_flash_program enable
640 source [find target/sam7x256.cfg]
643 There are many example configuration scripts you can work with. You
644 should look in the directory: @t{$(INSTALLDIR)/lib/openocd}. You
648 @item @b{board} - eval board level configurations
649 @item @b{interface} - specific dongle configurations
650 @item @b{target} - the target chips
651 @item @b{tcl} - helper scripts
652 @item @b{xscale} - things specific to the xscale.
655 Look first in the ``boards'' area, then the ``targets'' area. Often a board
656 configuration is a good example to work from.
658 @section Many -f filename options
659 Some believe this is a wonderful solution, others find it painful.
661 You can use a series of ``-f filename'' options on the command line,
662 OpenOCD will read each filename in sequence, for example:
665 openocd -f file1.cfg -f file2.cfg -f file2.cfg
668 You can also intermix various commands with the ``-c'' command line
671 @section Monolithic file
672 The ``Monolithic File'' dispenses with all ``source'' statements and
673 puts everything in one self contained (monolithic) file. This is not
676 Please try to ``source'' various files or use the multiple -f
679 @section Advice for you
680 Often, one uses a ``mixed approach''. Where possible, please try to
681 ``source'' common things, and if needed cut/paste parts of the
682 standard distribution configuration files as needed.
684 @b{REMEMBER:} The ``important parts'' of your configuration file are:
687 @item @b{Interface} - Defines the dongle
688 @item @b{Taps} - Defines the JTAG Taps
689 @item @b{GDB Targets} - What GDB talks to
690 @item @b{Flash Programing} - Very Helpful
693 Some key things you should look at and understand are:
696 @item The reset configuration of your debug environment as a whole
697 @item Is there a ``work area'' that OpenOCD can use?
698 @* For ARM - work areas mean up to 10x faster downloads.
699 @item For MMU/MPU based ARM chips (i.e.: ARM9 and later) will that work area still be available?
700 @item For complex targets (multiple chips) the JTAG SPEED becomes an issue.
705 @node Config File Guidelines
706 @chapter Config File Guidelines
708 This section/chapter is aimed at developers and integrators of
709 OpenOCD. These are guidelines for creating new boards and new target
710 configurations as of 28/Nov/2008.
712 However, you, the user of OpenOCD, should be somewhat familiar with
713 this section as it should help explain some of the internals of what
714 you might be looking at.
716 The user should find the following directories under @t{$(INSTALLDIR)/lib/openocd} :
720 @*Think JTAG Dongle. Files that configure the JTAG dongle go here.
722 @* Think Circuit Board, PWA, PCB, they go by many names. Board files
723 contain initialization items that are specific to a board - for
724 example: The SDRAM initialization sequence for the board, or the type
725 of external flash and what address it is found at. Any initialization
726 sequence to enable that external flash or SDRAM should be found in the
727 board file. Boards may also contain multiple targets, i.e.: Two CPUs, or
728 a CPU and an FPGA or CPLD.
730 @* Think chip. The ``target'' directory represents a JTAG tap (or
731 chip) OpenOCD should control, not a board. Two common types of targets
732 are ARM chips and FPGA or CPLD chips.
735 @b{If needed...} The user in their ``openocd.cfg'' file or the board
736 file might override a specific feature in any of the above files by
737 setting a variable or two before sourcing the target file. Or adding
738 various commands specific to their situation.
740 @section Interface Config Files
742 The user should be able to source one of these files via a command like this:
745 source [find interface/FOOBAR.cfg]
747 openocd -f interface/FOOBAR.cfg
750 A preconfigured interface file should exist for every interface in use
751 today, that said, perhaps some interfaces have only been used by the
752 sole developer who created it.
754 @b{FIXME/NOTE:} We need to add support for a variable like Tcl variable
755 tcl_platform(platform), it should be called jim_platform (because it
756 is jim, not real tcl) and it should contain 1 of 3 words: ``linux'',
757 ``cygwin'' or ``mingw''
759 Interface files should be found in @t{$(INSTALLDIR)/lib/openocd/interface}
761 @section Board Config Files
763 @b{Note: BOARD directory NEW as of 28/nov/2008}
765 The user should be able to source one of these files via a command like this:
768 source [find board/FOOBAR.cfg]
770 openocd -f board/FOOBAR.cfg
774 The board file should contain one or more @t{source [find
775 target/FOO.cfg]} statements along with any board specific things.
777 In summary the board files should contain (if present)
780 @item External flash configuration (i.e.: the flash on CS0)
781 @item SDRAM configuration (size, speed, etc.
782 @item Board specific IO configuration (i.e.: GPIO pins might disable a 2nd flash)
783 @item Multiple TARGET source statements
784 @item All things that are not ``inside a chip''
785 @item Things inside a chip go in a 'target' file
788 @section Target Config Files
790 The user should be able to source one of these files via a command like this:
793 source [find target/FOOBAR.cfg]
795 openocd -f target/FOOBAR.cfg
798 In summary the target files should contain
803 @item Reset configuration
805 @item CPU/Chip/CPU-Core specific features
809 @subsection Important variable names
811 By default, the end user should never need to set these
812 variables. However, if the user needs to override a setting they only
813 need to set the variable in a simple way.
817 @* This gives a name to the overall chip, and is used as part of the
818 tap identifier dotted name.
820 @* By default little - unless the chip or board is not normally used that way.
822 @* When OpenOCD examines the JTAG chain, it will attempt to identify
823 every chip. If the @t{-expected-id} is nonzero, OpenOCD attempts
824 to verify the tap id number verses configuration file and may issue an
825 error or warning like this. The hope is that this will help to pinpoint
826 problems in OpenOCD configurations.
829 Info: JTAG tap: sam7x256.cpu tap/device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)
830 Error: ERROR: Tap: sam7x256.cpu - Expected id: 0x12345678, Got: 0x3f0f0f0f
831 Error: ERROR: expected: mfg: 0x33c, part: 0x2345, ver: 0x1
832 Error: ERROR: got: mfg: 0x787, part: 0xf0f0, ver: 0x3
835 @item @b{_TARGETNAME}
836 @* By convention, this variable is created by the target configuration
837 script. The board configuration file may make use of this variable to
838 configure things like a ``reset init'' script, or other things
839 specific to that board and that target.
841 If the chip has 2 targets, use the names @b{_TARGETNAME0},
842 @b{_TARGETNAME1}, ... etc.
844 @b{Remember:} The ``board file'' may include multiple targets.
846 At no time should the name ``target0'' (the default target name if
847 none was specified) be used. The name ``target0'' is a hard coded name
848 - the next target on the board will be some other number.
850 The user (or board file) should reasonably be able to:
853 source [find target/FOO.cfg]
854 $_TARGETNAME configure ... FOO specific parameters
856 source [find target/BAR.cfg]
857 $_TARGETNAME configure ... BAR specific parameters
862 @subsection Tcl Variables Guide Line
863 The Full Tcl/Tk language supports ``namespaces'' - JIM-Tcl does not.
865 Thus the rule we follow in OpenOCD is this: Variables that begin with
866 a leading underscore are temporary in nature, and can be modified and
867 used at will within a ?TARGET? configuration file.
869 @b{EXAMPLE:} The user should be able to do this:
873 # PXA270 #1 network side, big endian
874 # PXA270 #2 video side, little endian
878 source [find target/pxa270.cfg]
879 # variable: _TARGETNAME = network.cpu
880 # other commands can refer to the "network.cpu" tap.
881 $_TARGETNAME configure .... params for this CPU..
885 source [find target/pxa270.cfg]
886 # variable: _TARGETNAME = video.cpu
887 # other commands can refer to the "video.cpu" tap.
888 $_TARGETNAME configure .... params for this CPU..
892 source [find target/spartan3.cfg]
894 # Since $_TARGETNAME is temporal..
895 # these names still work!
896 network.cpu configure ... params
897 video.cpu configure ... params
901 @subsection Default Value Boiler Plate Code
903 All target configuration files should start with this (or a modified form)
907 if @{ [info exists CHIPNAME] @} @{
908 set _CHIPNAME $CHIPNAME
910 set _CHIPNAME sam7x256
913 if @{ [info exists ENDIAN] @} @{
919 if @{ [info exists CPUTAPID ] @} @{
920 set _CPUTAPID $CPUTAPID
922 set _CPUTAPID 0x3f0f0f0f
927 @subsection Creating Taps
928 After the ``defaults'' are choosen [see above] the taps are created.
930 @b{SIMPLE example:} such as an Atmel AT91SAM7X256
934 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
935 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
940 This is an SNIP/example for an STR912 - which has 3 internal taps. Key features shown:
943 @item @b{Unform tap names} - See: Tap Naming Convention
944 @item @b{_TARGETNAME} is created at the end where used.
948 if @{ [info exists FLASHTAPID ] @} @{
949 set _FLASHTAPID $FLASHTAPID
951 set _FLASHTAPID 0x25966041
953 jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID
955 if @{ [info exists CPUTAPID ] @} @{
956 set _CPUTAPID $CPUTAPID
958 set _CPUTAPID 0x25966041
960 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xf -irmask 0xe -expected-id $_CPUTAPID
963 if @{ [info exists BSTAPID ] @} @{
964 set _BSTAPID $BSTAPID
966 set _BSTAPID 0x1457f041
968 jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID
970 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
973 @b{Tap Naming Convention}
975 See the command ``jtag newtap'' for detail, but in brief the names you should use are:
983 @item @b{unknownN} - it happens :-(
986 @subsection Reset Configuration
988 Some chips have specific ways the TRST and SRST signals are
989 managed. If these are @b{CHIP SPECIFIC} they go here, if they are
990 @b{BOARD SPECIFIC} they go in the board file.
992 @subsection Work Areas
994 Work areas are small RAM areas used by OpenOCD to speed up downloads,
995 and to download small snippets of code to program flash chips.
997 If the chip includes a form of ``on-chip-ram'' - and many do - define
998 a reasonable work area and use the ``backup'' option.
1000 @b{PROBLEMS:} On more complex chips, this ``work area'' may become
1001 inaccessible if/when the application code enables or disables the MMU.
1003 @subsection ARM Core Specific Hacks
1005 If the chip has a DCC, enable it. If the chip is an ARM9 with some
1006 special high speed download features - enable it.
1008 If the chip has an ARM ``vector catch'' feature - by default enable
1009 it for Undefined Instructions, Data Abort, and Prefetch Abort, if the
1010 user is really writing a handler for those situations - they can
1011 easily disable it. Experiance has shown the ``vector catch'' is
1012 helpful - for common programing errors.
1014 If present, the MMU, the MPU and the CACHE should be disabled.
1016 @subsection Internal Flash Configuration
1018 This applies @b{ONLY TO MICROCONTROLLERS} that have flash built in.
1020 @b{Never ever} in the ``target configuration file'' define any type of
1021 flash that is external to the chip. (For example the BOOT flash on
1022 Chip Select 0). The BOOT flash information goes in a board file - not
1023 the TARGET (chip) file.
1027 @item at91sam7x256 - has 256K flash YES enable it.
1028 @item str912 - has flash internal YES enable it.
1029 @item imx27 - uses boot flash on CS0 - it goes in the board file.
1030 @item pxa270 - again - CS0 flash - it goes in the board file.
1034 @chapter About JIM-Tcl
1038 OpenOCD includes a small ``TCL Interpreter'' known as JIM-TCL. You can
1039 learn more about JIM here: @url{http://jim.berlios.de}
1042 @item @b{JIM vs. Tcl}
1043 @* JIM-TCL is a stripped down version of the well known Tcl language,
1044 which can be found here: @url{http://www.tcl.tk}. JIM-Tcl has far
1045 fewer features. JIM-Tcl is a single .C file and a single .H file and
1046 impliments the basic Tcl command set along. In contrast: Tcl 8.6 is a
1047 4.2 MB .zip file containing 1540 files.
1049 @item @b{Missing Features}
1050 @* Our practice has been: Add/clone the real Tcl feature if/when
1051 needed. We welcome JIM Tcl improvements, not bloat.
1054 @* OpenOCD configuration scripts are JIM Tcl Scripts. OpenOCD's
1055 command interpreter today (28/nov/2008) is a mixture of (newer)
1056 JIM-Tcl commands, and (older) the orginal command interpreter.
1059 @* At the OpenOCD telnet command line (or via the GDB mon command) one
1060 can type a Tcl for() loop, set variables, etc.
1062 @item @b{Historical Note}
1063 @* JIM-Tcl was introduced to OpenOCD in spring 2008.
1065 @item @b{Need a crash course in Tcl?}
1066 @* See: @xref{Tcl Crash Course}.
1070 @node Daemon Configuration
1071 @chapter Daemon Configuration
1072 The commands here are commonly found in the openocd.cfg file and are
1073 used to specify what TCP/IP ports are used, and how GDB should be
1077 This command terminates the configuration stage and
1078 enters the normal command mode. This can be useful to add commands to
1079 the startup scripts and commands such as resetting the target,
1080 programming flash, etc. To reset the CPU upon startup, add "init" and
1081 "reset" at the end of the config script or at the end of the OpenOCD
1082 command line using the @option{-c} command line switch.
1084 If this command does not appear in any startup/configuration file
1085 OpenOCD executes the command for you after processing all
1086 configuration files and/or command line options.
1088 @b{NOTE:} This command normally occurs at or near the end of your
1089 openocd.cfg file to force OpenOCD to ``initialize'' and make the
1090 targets ready. For example: If your openocd.cfg file needs to
1091 read/write memory on your target - the init command must occur before
1092 the memory read/write commands.
1094 @section TCP/IP Ports
1096 @item @b{telnet_port} <@var{number}>
1098 @*Intended for a human. Port on which to listen for incoming telnet connections.
1100 @item @b{tcl_port} <@var{number}>
1102 @*Intended as a machine interface. Port on which to listen for
1103 incoming Tcl syntax. This port is intended as a simplified RPC
1104 connection that can be used by clients to issue commands and get the
1105 output from the Tcl engine.
1107 @item @b{gdb_port} <@var{number}>
1109 @*First port on which to listen for incoming GDB connections. The GDB port for the
1110 first target will be gdb_port, the second target will listen on gdb_port + 1, and so on.
1115 @item @b{gdb_breakpoint_override} <@var{hard|soft|disable}>
1116 @cindex gdb_breakpoint_override
1117 @anchor{gdb_breakpoint_override}
1118 @*Force breakpoint type for gdb 'break' commands.
1119 The raison d'etre for this option is to support GDB GUI's without
1120 a hard/soft breakpoint concept where the default OpenOCD and
1121 GDB behaviour is not sufficient. Note that GDB will use hardware
1122 breakpoints if the memory map has been set up for flash regions.
1124 This option replaces older arm7_9 target commands that addressed
1127 @item @b{gdb_detach} <@var{resume|reset|halt|nothing}>
1129 @*Configures what OpenOCD will do when GDB detaches from the daemon.
1130 Default behaviour is <@var{resume}>
1132 @item @b{gdb_memory_map} <@var{enable|disable}>
1133 @cindex gdb_memory_map
1134 @*Set to <@var{enable}> to cause OpenOCD to send the memory configuration to GDB when
1135 requested. GDB will then know when to set hardware breakpoints, and program flash
1136 using the GDB load command. @option{gdb_flash_program enable} must also be enabled
1137 for flash programming to work.
1138 Default behaviour is <@var{enable}>
1139 @xref{gdb_flash_program}.
1141 @item @b{gdb_flash_program} <@var{enable|disable}>
1142 @cindex gdb_flash_program
1143 @anchor{gdb_flash_program}
1144 @*Set to <@var{enable}> to cause OpenOCD to program the flash memory when a
1145 vFlash packet is received.
1146 Default behaviour is <@var{enable}>
1147 @comment END GDB Items
1150 @node Interface - Dongle Configuration
1151 @chapter Interface - Dongle Configuration
1152 Interface commands are normally found in an interface configuration
1153 file which is sourced by your openocd.cfg file. These commands tell
1154 OpenOCD what type of JTAG dongle you have and how to talk to it.
1155 @section Simple Complete Interface Examples
1156 @b{A Turtelizer FT2232 Based JTAG Dongle}
1160 ft2232_device_desc "Turtelizer JTAG/RS232 Adapter A"
1161 ft2232_layout turtelizer2
1162 ft2232_vid_pid 0x0403 0xbdc8
1169 @b{A Raisonance RLink}
1178 parport_cable wiggler
1183 interface arm-jtag-ew
1185 @section Interface Command
1187 The interface command tells OpenOCD what type of JTAG dongle you are
1188 using. Depending on the type of dongle, you may need to have one or
1189 more additional commands.
1193 @item @b{interface} <@var{name}>
1195 @*Use the interface driver <@var{name}> to connect to the
1196 target. Currently supported interfaces are
1201 @* PC parallel port bit-banging (Wigglers, PLD download cable, ...)
1203 @item @b{amt_jtagaccel}
1204 @* Amontec Chameleon in its JTAG Accelerator configuration connected to a PC's EPP
1208 @* FTDI FT2232 (USB) based devices using either the open-source libftdi or the binary only
1209 FTD2XX driver. The FTD2XX is superior in performance, but not available on every
1210 platform. The libftdi uses libusb, and should be portable to all systems that provide
1214 @*Cirrus Logic EP93xx based single-board computer bit-banging (in development)
1217 @* ASIX PRESTO USB JTAG programmer.
1220 @* usbprog is a freely programmable USB adapter.
1223 @* Gateworks GW16012 JTAG programmer.
1226 @* Segger jlink USB adapter
1229 @* Raisonance RLink USB adapter
1232 @* vsllink is part of Versaloon which is a versatile USB programmer.
1234 @item @b{arm-jtag-ew}
1235 @* Olimex ARM-JTAG-EW USB adapter
1236 @comment - End parameters
1238 @comment - End Interface
1240 @subsection parport options
1243 @item @b{parport_port} <@var{number}>
1244 @cindex parport_port
1245 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of
1246 the @file{/dev/parport} device
1248 When using PPDEV to access the parallel port, use the number of the parallel port:
1249 @option{parport_port 0} (the default). If @option{parport_port 0x378} is specified
1250 you may encounter a problem.
1251 @item @b{parport_cable} <@var{name}>
1252 @cindex parport_cable
1253 @*The layout of the parallel port cable used to connect to the target.
1254 Currently supported cables are
1258 The original Wiggler layout, also supported by several clones, such
1259 as the Olimex ARM-JTAG
1262 Same as original wiggler except an led is fitted on D5.
1263 @item @b{wiggler_ntrst_inverted}
1264 @cindex wiggler_ntrst_inverted
1265 Same as original wiggler except TRST is inverted.
1266 @item @b{old_amt_wiggler}
1267 @cindex old_amt_wiggler
1268 The Wiggler configuration that comes with Amontec's Chameleon Programmer. The new
1269 version available from the website uses the original Wiggler layout ('@var{wiggler}')
1272 The Amontec Chameleon's CPLD when operated in configuration mode. This is only used to
1273 program the Chameleon itself, not a connected target.
1276 The Xilinx Parallel cable III.
1279 The parallel port adapter found on the 'Karo Triton 1 Development Board'.
1280 This is also the layout used by the HollyGates design
1281 (see @uref{http://www.lartmaker.nl/projects/jtag/}).
1284 The ST Parallel cable.
1287 Same as original wiggler except SRST and TRST connections reversed and
1288 TRST is also inverted.
1291 Altium Universal JTAG cable.
1293 @item @b{parport_write_on_exit} <@var{on}|@var{off}>
1294 @cindex parport_write_on_exit
1295 @*This will configure the parallel driver to write a known value to the parallel
1296 interface on exiting OpenOCD
1299 @subsection amt_jtagaccel options
1301 @item @b{parport_port} <@var{number}>
1302 @cindex parport_port
1303 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of the
1304 @file{/dev/parport} device
1306 @subsection ft2232 options
1309 @item @b{ft2232_device_desc} <@var{description}>
1310 @cindex ft2232_device_desc
1311 @*The USB device description of the FTDI FT2232 device. If not
1312 specified, the FTDI default value is used. This setting is only valid
1313 if compiled with FTD2XX support.
1315 @b{TODO:} Confirm the following: On Windows the name needs to end with
1316 a ``space A''? Or not? It has to do with the FTD2xx driver. When must
1317 this be added and when must it not be added? Why can't the code in the
1318 interface or in OpenOCD automatically add this if needed? -- Duane.
1320 @item @b{ft2232_serial} <@var{serial-number}>
1321 @cindex ft2232_serial
1322 @*The serial number of the FTDI FT2232 device. If not specified, the FTDI default
1324 @item @b{ft2232_layout} <@var{name}>
1325 @cindex ft2232_layout
1326 @*The layout of the FT2232 GPIO signals used to control output-enables and reset
1327 signals. Valid layouts are
1330 "USBJTAG-1" layout described in the original OpenOCD diploma thesis
1332 Amontec JTAGkey and JTAGkey-Tiny
1333 @item @b{signalyzer}
1335 @item @b{olimex-jtag}
1338 American Microsystems M5960
1339 @item @b{evb_lm3s811}
1340 Luminary Micro EVB_LM3S811 as a JTAG interface (not onboard processor), no TRST or
1341 SRST signals on external connector
1344 @item @b{stm32stick}
1345 Hitex STM32 Performance Stick
1346 @item @b{flyswatter}
1347 Tin Can Tools Flyswatter
1348 @item @b{turtelizer2}
1349 egnite Software turtelizer2
1352 @item @b{axm0432_jtag}
1356 @item @b{ft2232_vid_pid} <@var{vid}> <@var{pid}>
1357 @*The vendor ID and product ID of the FTDI FT2232 device. If not specified, the FTDI
1358 default values are used. Multiple <@var{vid}>, <@var{pid}> pairs may be given, e.g.
1360 ft2232_vid_pid 0x0403 0xcff8 0x15ba 0x0003
1362 @item @b{ft2232_latency} <@var{ms}>
1363 @*On some systems using FT2232 based JTAG interfaces the FT_Read function call in
1364 ft2232_read() fails to return the expected number of bytes. This can be caused by
1365 USB communication delays and has proved hard to reproduce and debug. Setting the
1366 FT2232 latency timer to a larger value increases delays for short USB packets but it
1367 also reduces the risk of timeouts before receiving the expected number of bytes.
1368 The OpenOCD default value is 2 and for some systems a value of 10 has proved useful.
1371 @subsection ep93xx options
1372 @cindex ep93xx options
1373 Currently, there are no options available for the ep93xx interface.
1377 @item @b{jtag_khz} <@var{reset speed kHz}>
1380 It is debatable if this command belongs here - or in a board
1381 configuration file. In fact, in some situations the JTAG speed is
1382 changed during the target initialisation process (i.e.: (1) slow at
1383 reset, (2) program the CPU clocks, (3) run fast)
1385 Speed 0 (khz) selects RTCK method. A non-zero speed is in KHZ. Hence: 3000 is 3mhz.
1387 Not all interfaces support ``rtck''. If the interface device can not
1388 support the rate asked for, or can not translate from kHz to
1389 jtag_speed, then an error is returned.
1391 Make sure the JTAG clock is no more than @math{1/6th CPU-Clock}. This is
1392 especially true for synthesized cores (-S). Also see RTCK.
1394 @b{NOTE: Script writers} If the target chip requires/uses RTCK -
1395 please use the command: 'jtag_rclk FREQ'. This Tcl proc (in
1396 startup.tcl) attempts to enable RTCK, if that fails it falls back to
1397 the specified frequency.
1400 # Fall back to 3mhz if RCLK is not supported
1404 @item @b{DEPRECATED} @b{jtag_speed} - please use jtag_khz above.
1406 @*Limit the maximum speed of the JTAG interface. Usually, a value of zero means maximum
1407 speed. The actual effect of this option depends on the JTAG interface used.
1409 The speed used during reset can be adjusted using setting jtag_speed during
1410 pre_reset and post_reset events.
1413 @item wiggler: maximum speed / @var{number}
1414 @item ft2232: 6MHz / (@var{number}+1)
1415 @item amt jtagaccel: 8 / 2**@var{number}
1416 @item jlink: maximum speed in kHz (0-12000), 0 will use RTCK
1417 @item rlink: 24MHz / @var{number}, but only for certain values of @var{number}
1418 @comment end speed list.
1421 @comment END command list
1424 @node Reset Configuration
1425 @chapter Reset Configuration
1426 @cindex Reset Configuration
1428 Every system configuration may require a different reset
1429 configuration. This can also be quite confusing. Please see the
1430 various board files for example.
1432 @section jtag_nsrst_delay <@var{ms}>
1433 @cindex jtag_nsrst_delay
1434 @*How long (in milliseconds) OpenOCD should wait after deasserting
1435 nSRST before starting new JTAG operations.
1437 @section jtag_ntrst_delay <@var{ms}>
1438 @cindex jtag_ntrst_delay
1439 @*Same @b{jtag_nsrst_delay}, but for nTRST
1441 The jtag_n[st]rst_delay options are useful if reset circuitry (like a
1442 big resistor/capacitor, reset supervisor, or on-chip features). This
1443 keeps the signal asserted for some time after the external reset got
1446 @section reset_config
1448 @b{Note:} To maintainers and integrators: Where exactly the
1449 ``reset configuration'' goes is a good question. It touches several
1450 things at once. In the end, if you have a board file - the board file
1451 should define it and assume 100% that the DONGLE supports
1452 anything. However, that does not mean the target should not also make
1453 not of something the silicon vendor has done inside the
1454 chip. @i{Grr.... nothing is every pretty.}
1458 @item Every JTAG Dongle is slightly different, some dongles implement reset differently.
1459 @item Every board is also slightly different; some boards tie TRST and SRST together.
1460 @item Every chip is slightly different; some chips internally tie the two signals together.
1461 @item Some may not implement all of the signals the same way.
1462 @item Some signals might be push-pull, others open-drain/collector.
1464 @b{Best Case:} OpenOCD can hold the SRST (push-button-reset), then
1465 reset the TAP via TRST and send commands through the JTAG tap to halt
1466 the CPU at the reset vector before the 1st instruction is executed,
1467 and finally release the SRST signal.
1468 @*Depending on your board vendor, chip vendor, etc., these
1469 signals may have slightly different names.
1471 OpenOCD defines these signals in these terms:
1473 @item @b{TRST} - is Tap Reset - and should reset only the TAP.
1474 @item @b{SRST} - is System Reset - typically equal to a reset push button.
1480 @item @b{reset_config} <@var{signals}> [@var{combination}] [@var{trst_type}] [@var{srst_type}]
1481 @cindex reset_config
1482 @* The @t{reset_config} command tells OpenOCD the reset configuration
1483 of your combination of Dongle, Board, and Chips.
1484 If the JTAG interface provides SRST, but the target doesn't connect
1485 that signal properly, then OpenOCD can't use it. <@var{signals}> can
1486 be @option{none}, @option{trst_only}, @option{srst_only} or
1487 @option{trst_and_srst}.
1489 [@var{combination}] is an optional value specifying broken reset
1490 signal implementations. @option{srst_pulls_trst} states that the
1491 test logic is reset together with the reset of the system (e.g. Philips
1492 LPC2000, "broken" board layout), @option{trst_pulls_srst} says that
1493 the system is reset together with the test logic (only hypothetical, I
1494 haven't seen hardware with such a bug, and can be worked around).
1495 @option{combined} implies both @option{srst_pulls_trst} and
1496 @option{trst_pulls_srst}. The default behaviour if no option given is
1499 The [@var{trst_type}] and [@var{srst_type}] parameters allow the
1500 driver type of the reset lines to be specified. Possible values are
1501 @option{trst_push_pull} (default) and @option{trst_open_drain} for the
1502 test reset signal, and @option{srst_open_drain} (default) and
1503 @option{srst_push_pull} for the system reset. These values only affect
1504 JTAG interfaces with support for different drivers, like the Amontec
1505 JTAGkey and JTAGAccelerator.
1507 @comment - end command
1513 @chapter Tap Creation
1514 @cindex tap creation
1515 @cindex tap configuration
1517 In order for OpenOCD to control a target, a JTAG tap must be
1520 Commands to create taps are normally found in a configuration file and
1521 are not normally typed by a human.
1523 When a tap is created a @b{dotted.name} is created for the tap. Other
1524 commands use that dotted.name to manipulate or refer to the tap.
1528 @item @b{Debug Target} A tap can be used by a GDB debug target
1529 @item @b{Flash Programing} Some chips program the flash via JTAG
1530 @item @b{Boundry Scan} Some chips support boundary scan.
1534 @section jtag newtap
1535 @b{@t{jtag newtap CHIPNAME TAPNAME configparams ....}}
1540 @cindex tap geometry
1542 @comment START options
1545 @* is a symbolic name of the chip.
1547 @* is a symbol name of a tap present on the chip.
1548 @item @b{Required configparams}
1549 @* Every tap has 3 required configparams, and several ``optional
1550 parameters'', the required parameters are:
1551 @comment START REQUIRED
1553 @item @b{-irlen NUMBER} - the length in bits of the instruction register, mostly 4 or 5 bits.
1554 @item @b{-ircapture NUMBER} - the IDCODE capture command, usually 0x01.
1555 @item @b{-irmask NUMBER} - the corresponding mask for the IR register. For
1556 some devices, there are bits in the IR that aren't used. This lets you mask
1557 them off when doing comparisons. In general, this should just be all ones for
1559 @comment END REQUIRED
1561 An example of a FOOBAR Tap
1563 jtag newtap foobar tap -irlen 7 -ircapture 0x42 -irmask 0x55
1565 Creates the tap ``foobar.tap'' with the instruction register (IR) is 7
1566 bits long, during Capture-IR 0x42 is loaded into the IR, and bits
1567 [6,4,2,0] are checked.
1569 @item @b{Optional configparams}
1570 @comment START Optional
1572 @item @b{-expected-id NUMBER}
1573 @* By default it is zero. If non-zero represents the
1574 expected tap ID used when the JTAG chain is examined. See below.
1577 @* By default not specified the tap is enabled. Some chips have a
1578 JTAG route controller (JRC) that is used to enable and/or disable
1579 specific JTAG taps. You can later enable or disable any JTAG tap via
1580 the command @b{jtag tapenable DOTTED.NAME} or @b{jtag tapdisable
1582 @comment END Optional
1585 @comment END OPTIONS
1588 @comment START NOTES
1590 @item @b{Technically}
1591 @* newtap is a sub command of the ``jtag'' command
1592 @item @b{Big Picture Background}
1593 @*GDB Talks to OpenOCD using the GDB protocol via
1594 TCP/IP. OpenOCD then uses the JTAG interface (the dongle) to
1595 control the JTAG chain on your board. Your board has one or more chips
1596 in a @i{daisy chain configuration}. Each chip may have one or more
1597 JTAG taps. GDB ends up talking via OpenOCD to one of the taps.
1598 @item @b{NAME Rules}
1599 @*Names follow ``C'' symbol name rules (start with alpha ...)
1600 @item @b{TAPNAME - Conventions}
1602 @item @b{tap} - should be used only FPGA or CPLD like devices with a single tap.
1603 @item @b{cpu} - the main CPU of the chip, alternatively @b{foo.arm} and @b{foo.dsp}
1604 @item @b{flash} - if the chip has a flash tap, example: str912.flash
1605 @item @b{bs} - for boundary scan if this is a seperate tap.
1606 @item @b{jrc} - for JTAG route controller (example: OMAP3530 found on Beagleboards)
1607 @item @b{unknownN} - where N is a number if you have no idea what the tap is for
1608 @item @b{Other names} - Freescale IMX31 has a SDMA (smart dma) with a JTAG tap, that tap should be called the ``sdma'' tap.
1609 @item @b{When in doubt} - use the chip maker's name in their data sheet.
1611 @item @b{DOTTED.NAME}
1612 @* @b{CHIPNAME}.@b{TAPNAME} creates the tap name, aka: the
1613 @b{Dotted.Name} is the @b{CHIPNAME} and @b{TAPNAME} combined with a
1614 dot (period); for example: @b{xilinx.tap}, @b{str912.flash},
1615 @b{omap3530.jrc}, or @b{stm32.cpu} The @b{dotted.name} is used in
1616 numerous other places to refer to various taps.
1618 @* The order this command appears via the config files is
1620 @item @b{Multi Tap Example}
1621 @* This example is based on the ST Microsystems STR912. See the ST
1622 document titled: @b{STR91xFAxxx, Section 3.15 Jtag Interface, Page:
1623 28/102, Figure 3: JTAG chaining inside the STR91xFA}.
1625 @url{http://eu.st.com/stonline/products/literature/ds/13495.pdf}
1626 @*@b{checked: 28/nov/2008}
1628 The diagram shows that the TDO pin connects to the flash tap, flash TDI
1629 connects to the CPU debug tap, CPU TDI connects to the boundary scan
1630 tap which then connects to the TDI pin.
1634 # create tap: 'str912.flash'
1635 jtag newtap str912 flash ... params ...
1636 # create tap: 'str912.cpu'
1637 jtag newtap str912 cpu ... params ...
1638 # create tap: 'str912.bs'
1639 jtag newtap str912 bs ... params ...
1642 @item @b{Note: Deprecated} - Index Numbers
1643 @* Prior to 28/nov/2008, JTAG taps where numbered from 0..N this
1644 feature is still present, however its use is highly discouraged and
1645 should not be counted upon.
1646 @item @b{Multiple chips}
1647 @* If your board has multiple chips, you should be
1648 able to @b{source} two configuration files, in the proper order, and
1649 have the taps created in the proper order.
1652 @comment at command level
1653 @comment DOCUMENT old command
1654 @section jtag_device - REMOVED
1656 @b{jtag_device} <@var{IR length}> <@var{IR capture}> <@var{IR mask}> <@var{IDCODE instruction}>
1660 @* @b{Removed: 28/nov/2008} This command has been removed and replaced
1661 by the ``jtag newtap'' command. The documentation remains here so that
1662 one can easily convert the old syntax to the new syntax. About the old
1663 syntax: The old syntax is positional, i.e.: The 3rd parameter is the
1664 ``irmask''. The new syntax requires named prefixes, and supports
1665 additional options, for example ``-expected-id 0x3f0f0f0f''. Please refer to the
1666 @b{jtag newtap} command for details.
1668 OLD: jtag_device 8 0x01 0xe3 0xfe
1669 NEW: jtag newtap CHIPNAME TAPNAME -irlen 8 -ircapture 0x01 -irmask 0xe3
1672 @section Enable/Disable Taps
1673 @b{Note:} These commands are intended to be used as a machine/script
1674 interface. Humans might find the ``scan_chain'' command more helpful
1675 when querying the state of the JTAG taps.
1677 @b{By default, all taps are enabled}
1680 @item @b{jtag tapenable} @var{DOTTED.NAME}
1681 @item @b{jtag tapdisable} @var{DOTTED.NAME}
1682 @item @b{jtag tapisenabled} @var{DOTTED.NAME}
1687 @cindex route controller
1689 These commands are used when your target has a JTAG route controller
1690 that effectively adds or removes a tap from the JTAG chain in a
1693 The ``standard way'' to remove a tap would be to place the tap in
1694 bypass mode. But with the advent of modern chips, this is not always a
1695 good solution. Some taps operate slowly, others operate fast, and
1696 there are other JTAG clock synchronisation problems one must face. To
1697 solve that problem, the JTAG route controller was introduced. Rather
1698 than ``bypass'' the tap, the tap is completely removed from the
1699 circuit and skipped.
1702 From OpenOCD's point of view, a JTAG tap is in one of 3 states:
1705 @item @b{Enabled - Not In ByPass} and has a variable bit length
1706 @item @b{Enabled - In ByPass} and has a length of exactly 1 bit.
1707 @item @b{Disabled} and has a length of ZERO and is removed from the circuit.
1710 The IEEE JTAG definition has no concept of a ``disabled'' tap.
1711 @b{Historical note:} this feature was added 28/nov/2008
1713 @b{jtag tapisenabled DOTTED.NAME}
1715 This command returns 1 if the named tap is currently enabled, 0 if not.
1716 This command exists so that scripts that manipulate a JRC (like the
1717 OMAP3530 has) can determine if OpenOCD thinks a tap is presently
1718 enabled or disabled.
1721 @node Target Configuration
1722 @chapter Target Configuration
1724 This chapter discusses how to create a GDB debug target. Before
1725 creating a ``target'' a JTAG tap DOTTED.NAME must exist first.
1727 @section targets [NAME]
1728 @b{Note:} This command name is PLURAL - not singular.
1730 With NO parameter, this plural @b{targets} command lists all known
1731 targets in a human friendly form.
1733 With a parameter, this plural @b{targets} command sets the current
1734 target to the given name. (i.e.: If there are multiple debug targets)
1739 CmdName Type Endian ChainPos State
1740 -- ---------- ---------- ---------- -------- ----------
1741 0: target0 arm7tdmi little 0 halted
1744 @section target COMMANDS
1745 @b{Note:} This command name is SINGULAR - not plural. It is used to
1746 manipulate specific targets, to create targets and other things.
1748 Once a target is created, a TARGETNAME (object) command is created;
1749 see below for details.
1751 The TARGET command accepts these sub-commands:
1753 @item @b{create} .. parameters ..
1754 @* creates a new target, see below for details.
1756 @* Lists all supported target types (perhaps some are not yet in this document).
1758 @* Lists all current debug target names, for example: 'str912.cpu' or 'pxa27.cpu' example usage:
1760 foreach t [target names] {
1761 puts [format "Target: %s\n" $t]
1765 @* Returns the current target. OpenOCD always has, or refers to the ``current target'' in some way.
1766 By default, commands like: ``mww'' (used to write memory) operate on the current target.
1767 @item @b{number} @b{NUMBER}
1768 @* Internally OpenOCD maintains a list of targets - in numerical index
1769 (0..N-1) this command returns the name of the target at index N.
1772 set thename [target number $x]
1773 puts [format "Target %d is: %s\n" $x $thename]
1776 @* Returns the number of targets known to OpenOCD (see number above)
1779 set c [target count]
1780 for { set x 0 } { $x < $c } { incr x } {
1781 # Assuming you have created this function
1782 print_target_details $x
1788 @section TARGETNAME (object) commands
1789 @b{Use:} Once a target is created, an ``object name'' that represents the
1790 target is created. By convention, the target name is identical to the
1791 tap name. In a multiple target system, one can preceed many common
1792 commands with a specific target name and effect only that target.
1794 str912.cpu mww 0x1234 0x42
1795 omap3530.cpu mww 0x5555 123
1798 @b{Model:} The Tcl/Tk language has the concept of object commands. A
1799 good example is a on screen button, once a button is created a button
1800 has a name (a path in Tk terms) and that name is useable as a 1st
1801 class command. For example in Tk, one can create a button and later
1802 configure it like this:
1806 button .foobar -background red -command @{ foo @}
1808 .foobar configure -foreground blue
1810 set x [.foobar cget -background]
1812 puts [format "The button is %s" $x]
1815 In OpenOCD's terms, the ``target'' is an object just like a Tcl/Tk
1816 button. Commands available as a ``target object'' are:
1818 @comment START targetobj commands.
1820 @item @b{configure} - configure the target; see Target Config/Cget Options below
1821 @item @b{cget} - query the target configuration; see Target Config/Cget Options below
1822 @item @b{curstate} - current target state (running, halt, etc.
1824 @* Intended for a human to see/read the currently configure target events.
1825 @item @b{Various Memory Commands} See the ``mww'' command elsewhere.
1826 @comment start memory
1836 @item @b{Memory To Array, Array To Memory}
1837 @* These are aimed at a machine interface to memory
1839 @item @b{mem2array ARRAYNAME WIDTH ADDRESS COUNT}
1840 @item @b{array2mem ARRAYNAME WIDTH ADDRESS COUNT}
1842 @* @b{ARRAYNAME} is the name of an array variable
1843 @* @b{WIDTH} is 8/16/32 - indicating the memory access size
1844 @* @b{ADDRESS} is the target memory address
1845 @* @b{COUNT} is the number of elements to process
1847 @item @b{Used during ``reset''}
1848 @* These commands are used internally by the OpenOCD scripts to deal
1849 with odd reset situations and are not documented here.
1851 @item @b{arp_examine}
1855 @item @b{arp_waitstate}
1857 @item @b{invoke-event} @b{EVENT-NAME}
1858 @* Invokes the specific event manually for the target
1861 @section Target Events
1862 At various times, certain things can happen, or you want them to happen.
1866 @item What should happen when GDB connects? Should your target reset?
1867 @item When GDB tries to flash the target, do you need to enable the flash via a special command?
1868 @item During reset, do you need to write to certain memory location to reconfigure the SDRAM?
1871 All of the above items are handled by target events.
1873 To specify an event action, either during target creation, or later
1874 via ``$_TARGETNAME configure'' see this example.
1876 Syntactially, the option is: ``-event NAME BODY'' where NAME is a
1877 target event name, and BODY is a Tcl procedure or string of commands
1880 The programmers model is the ``-command'' option used in Tcl/Tk
1881 buttons and events. Below are two identical examples, the first
1882 creates and invokes small procedure. The second inlines the procedure.
1885 proc my_attach_proc @{ @} @{
1889 mychip.cpu configure -event gdb-attach my_attach_proc
1890 mychip.cpu configure -event gdb-attach @{ puts "Reset..." ; reset halt @}
1893 @section Current Events
1894 The following events are available:
1896 @item @b{debug-halted}
1897 @* The target has halted for debug reasons (i.e.: breakpoint)
1898 @item @b{debug-resumed}
1899 @* The target has resumed (i.e.: gdb said run)
1900 @item @b{early-halted}
1901 @* Occurs early in the halt process
1902 @item @b{examine-end}
1903 @* Currently not used (goal: when JTAG examine completes)
1904 @item @b{examine-start}
1905 @* Currently not used (goal: when JTAG examine starts)
1906 @item @b{gdb-attach}
1907 @* When GDB connects
1908 @item @b{gdb-detach}
1909 @* When GDB disconnects
1911 @* When the taret has halted and GDB is not doing anything (see early halt)
1912 @item @b{gdb-flash-erase-start}
1913 @* Before the GDB flash process tries to erase the flash
1914 @item @b{gdb-flash-erase-end}
1915 @* After the GDB flash process has finished erasing the flash
1916 @item @b{gdb-flash-write-start}
1917 @* Before GDB writes to the flash
1918 @item @b{gdb-flash-write-end}
1919 @* After GDB writes to the flash
1921 @* Before the taret steps, gdb is trying to start/resume the target
1923 @* The target has halted
1924 @item @b{old-gdb_program_config}
1925 @* DO NOT USE THIS: Used internally
1926 @item @b{old-pre_resume}
1927 @* DO NOT USE THIS: Used internally
1928 @item @b{reset-assert-pre}
1929 @* Before reset is asserted on the tap.
1930 @item @b{reset-assert-post}
1931 @* Reset is now asserted on the tap.
1932 @item @b{reset-deassert-pre}
1933 @* Reset is about to be released on the tap
1934 @item @b{reset-deassert-post}
1935 @* Reset has been released on the tap
1937 @* Currently not used.
1938 @item @b{reset-halt-post}
1939 @* Currently not usd
1940 @item @b{reset-halt-pre}
1941 @* Currently not used
1942 @item @b{reset-init}
1943 @* Currently not used
1944 @item @b{reset-start}
1945 @* Currently not used
1946 @item @b{reset-wait-pos}
1947 @* Currently not used
1948 @item @b{reset-wait-pre}
1949 @* Currently not used
1950 @item @b{resume-start}
1951 @* Before any target is resumed
1952 @item @b{resume-end}
1953 @* After all targets have resumed
1957 @* Target has resumed
1958 @item @b{tap-enable}
1959 @* Executed by @b{jtag tapenable DOTTED.NAME} command. Example:
1961 jtag configure DOTTED.NAME -event tap-enable @{
1966 @item @b{tap-disable}
1967 @*Executed by @b{jtag tapdisable DOTTED.NAME} command. Example:
1969 jtag configure DOTTED.NAME -event tap-disable @{
1970 puts "Disabling CPU"
1976 @section target create
1978 @cindex target creation
1981 @b{target} @b{create} <@var{NAME}> <@var{TYPE}> <@var{PARAMS ...}>
1983 @*This command creates a GDB debug target that refers to a specific JTAG tap.
1984 @comment START params
1987 @* Is the name of the debug target. By convention it should be the tap
1988 DOTTED.NAME, this name is also used to create the target object
1991 @* Specifies the target type, i.e.: ARM7TDMI, or Cortex-M3. Currently supported targets are:
1992 @comment START types
2009 @*PARAMs are various target configuration parameters. The following ones are mandatory:
2010 @comment START mandatory
2012 @item @b{-endian big|little}
2013 @item @b{-chain-position DOTTED.NAME}
2014 @comment end MANDATORY
2019 @section Target Config/Cget Options
2020 These options can be specified when the target is created, or later
2021 via the configure option or to query the target via cget.
2023 @item @b{-type} - returns the target type
2024 @item @b{-event NAME BODY} see Target events
2025 @item @b{-work-area-virt [ADDRESS]} specify/set the work area
2026 @item @b{-work-area-phys [ADDRESS]} specify/set the work area
2027 @item @b{-work-area-size [ADDRESS]} specify/set the work area
2028 @item @b{-work-area-backup [0|1]} does the work area get backed up
2029 @item @b{-endian [big|little]}
2030 @item @b{-variant [NAME]} some chips have variants OpenOCD needs to know about
2031 @item @b{-chain-position DOTTED.NAME} the tap name this target refers to.
2035 for @{ set x 0 @} @{ $x < [target count] @} @{ incr x @} @{
2036 set name [target number $x]
2037 set y [$name cget -endian]
2038 set z [$name cget -type]
2039 puts [format "Chip %d is %s, Endian: %s, type: %s" $x $y $z]
2043 @section Target Variants
2046 @* Unknown (please write me)
2048 @* Unknown (please write me) (similar to arm7tdmi)
2050 @* Variants: @option{arm920t}, @option{arm922t} and @option{arm940t}
2051 This enables the hardware single-stepping support found on these
2056 @* None (this is also used as the ARM946)
2058 @* use variant <@var{-variant lm3s}> when debugging Luminary lm3s targets. This will cause
2059 OpenOCD to use a software reset rather than asserting SRST to avoid a issue with clearing
2060 the debug registers. This is fixed in Fury Rev B, DustDevil Rev B, Tempest, these revisions will
2061 be detected and the normal reset behaviour used.
2063 @* Supported variants are @option{ixp42x}, @option{ixp45x}, @option{ixp46x},@option{pxa250}, @option{pxa255}, @option{pxa26x}.
2065 @* Supported variants are @option{arm1136}, @option{arm1156}, @option{arm1176}
2067 @* Use variant @option{ejtag_srst} when debugging targets that do not
2068 provide a functional SRST line on the EJTAG connector. This causes
2069 OpenOCD to instead use an EJTAG software reset command to reset the
2070 processor. You still need to enable @option{srst} on the reset
2071 configuration command to enable OpenOCD hardware reset functionality.
2072 @comment END variants
2074 @section working_area - Command Removed
2075 @cindex working_area
2076 @*@b{Please use the ``$_TARGETNAME configure -work-area-... parameters instead}
2077 @* This documentation remains because there are existing scripts that
2078 still use this that need to be converted.
2080 working_area target# address size backup| [virtualaddress]
2082 @* The target# is a the 0 based target numerical index.
2084 This command specifies a working area for the debugger to use. This
2085 may be used to speed-up downloads to target memory and flash
2086 operations, or to perform otherwise unavailable operations (some
2087 coprocessor operations on ARM7/9 systems, for example). The last
2088 parameter decides whether the memory should be preserved
2089 (<@var{backup}>) or can simply be overwritten (<@var{nobackup}>). If
2090 possible, use a working_area that doesn't need to be backed up, as
2091 performing a backup slows down operation.
2093 @node Flash Configuration
2094 @chapter Flash programming
2095 @cindex Flash Configuration
2097 @b{Note:} As of 28/nov/2008 OpenOCD does not know how to program a SPI
2098 flash that a micro may boot from. Perhaps you, the reader, would like to
2099 contribute support for this.
2103 @item Configure via the command @b{flash bank}
2104 @* Normally this is done in a configuration file.
2105 @item Operate on the flash via @b{flash SOMECOMMAND}
2106 @* Often commands to manipulate the flash are typed by a human, or run
2107 via a script in some automated way. For example: To program the boot
2108 flash on your board.
2110 @* Flashing via GDB requires the flash be configured via ``flash
2111 bank'', and the GDB flash features be enabled. See the daemon
2112 configuration section for more details.
2115 @section Flash commands
2116 @cindex Flash commands
2117 @subsection flash banks
2120 @*List configured flash banks
2121 @*@b{NOTE:} the singular form: 'flash bank' is used to configure the flash banks.
2122 @subsection flash info
2123 @b{flash info} <@var{num}>
2125 @*Print info about flash bank <@option{num}>
2126 @subsection flash probe
2127 @b{flash probe} <@var{num}>
2129 @*Identify the flash, or validate the parameters of the configured flash. Operation
2130 depends on the flash type.
2131 @subsection flash erase_check
2132 @b{flash erase_check} <@var{num}>
2133 @cindex flash erase_check
2134 @*Check erase state of sectors in flash bank <@var{num}>. This is the only operation that
2135 updates the erase state information displayed by @option{flash info}. That means you have
2136 to issue an @option{erase_check} command after erasing or programming the device to get
2137 updated information.
2138 @subsection flash protect_check
2139 @b{flash protect_check} <@var{num}>
2140 @cindex flash protect_check
2141 @*Check protection state of sectors in flash bank <num>.
2142 @option{flash erase_sector} using the same syntax.
2143 @subsection flash erase_sector
2144 @b{flash erase_sector} <@var{num}> <@var{first}> <@var{last}>
2145 @cindex flash erase_sector
2146 @anchor{flash erase_sector}
2147 @*Erase sectors at bank <@var{num}>, starting at sector <@var{first}> up to and including
2148 <@var{last}>. Sector numbering starts at 0. Depending on the flash type, erasing may
2149 require the protection to be disabled first (e.g. Intel Advanced Bootblock flash using
2151 @subsection flash erase_address
2152 @b{flash erase_address} <@var{address}> <@var{length}>
2153 @cindex flash erase_address
2154 @*Erase sectors starting at <@var{address}> for <@var{length}> bytes
2155 @subsection flash write_bank
2156 @b{flash write_bank} <@var{num}> <@var{file}> <@var{offset}>
2157 @cindex flash write_bank
2158 @anchor{flash write_bank}
2159 @*Write the binary <@var{file}> to flash bank <@var{num}>, starting at
2160 <@option{offset}> bytes from the beginning of the bank.
2161 @subsection flash write_image
2162 @b{flash write_image} [@var{erase}] <@var{file}> [@var{offset}] [@var{type}]
2163 @cindex flash write_image
2164 @anchor{flash write_image}
2165 @*Write the image <@var{file}> to the current target's flash bank(s). A relocation
2166 [@var{offset}] can be specified and the file [@var{type}] can be specified
2167 explicitly as @option{bin} (binary), @option{ihex} (Intel hex), @option{elf}
2168 (ELF file) or @option{s19} (Motorola s19). Flash memory will be erased prior to programming
2169 if the @option{erase} parameter is given.
2170 @subsection flash protect
2171 @b{flash protect} <@var{num}> <@var{first}> <@var{last}> <@option{on}|@option{off}>
2172 @cindex flash protect
2173 @*Enable (@var{on}) or disable (@var{off}) protection of flash sectors <@var{first}> to
2174 <@var{last}> of @option{flash bank} <@var{num}>.
2176 @subsection mFlash commands
2177 @cindex mFlash commands
2179 @item @b{mflash probe}
2180 @cindex mflash probe
2182 @item @b{mflash write} <@var{num}> <@var{file}> <@var{offset}>
2183 @cindex mflash write
2184 Write the binary <@var{file}> to mflash bank <@var{num}>, starting at
2185 <@var{offset}> bytes from the beginning of the bank.
2186 @item @b{mflash dump} <@var{num}> <@var{file}> <@var{offset}> <@var{size}>
2188 Dump <size> bytes, starting at <@var{offset}> bytes from the beginning of the <@var{num}> bank
2192 @section flash bank command
2193 The @b{flash bank} command is used to configure one or more flash chips (or banks in OpenOCD terms)
2196 @b{flash bank} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}>
2197 <@var{bus_width}> <@var{target#}> [@var{driver_options ...}]
2200 @*Configures a flash bank at <@var{base}> of <@var{size}> bytes and <@var{chip_width}>
2201 and <@var{bus_width}> bytes using the selected flash <driver>.
2203 @subsection External Flash - cfi options
2205 CFI flashes are external flash chips - often they are connected to a
2206 specific chip select on the CPU. By default, at hard reset, most
2207 CPUs have the ablity to ``boot'' from some flash chip - typically
2208 attached to the CPU's CS0 pin.
2210 For other chip selects: OpenOCD does not know how to configure, or
2211 access a specific chip select. Instead you, the human, might need to
2212 configure additional chip selects via other commands (like: mww) , or
2213 perhaps configure a GPIO pin that controls the ``write protect'' pin
2216 @b{flash bank cfi} <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}>
2217 <@var{target#}> [@var{jedec_probe}|@var{x16_as_x8}]
2218 @*CFI flashes require the number of the target they're connected to as an additional
2219 argument. The CFI driver makes use of a working area (specified for the target)
2220 to significantly speed up operation.
2222 @var{chip_width} and @var{bus_width} are specified in bytes.
2224 The @var{jedec_probe} option is used to detect certain non-CFI flash ROMs, like AM29LV010 and similar types.
2228 @subsection Internal Flash (Microcontrollers)
2229 @subsubsection lpc2000 options
2230 @cindex lpc2000 options
2232 @b{flash bank lpc2000} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
2233 <@var{clock}> [@var{calc_checksum}]
2234 @*LPC flashes don't require the chip and bus width to be specified. Additional
2235 parameters are the <@var{variant}>, which may be @var{lpc2000_v1} (older LPC21xx and LPC22xx)
2236 or @var{lpc2000_v2} (LPC213x, LPC214x, LPC210[123], LPC23xx and LPC24xx), the number
2237 of the target this flash belongs to (first is 0), the frequency at which the core
2238 is currently running (in kHz - must be an integral number), and the optional keyword
2239 @var{calc_checksum}, telling the driver to calculate a valid checksum for the exception
2243 @subsubsection at91sam7 options
2244 @cindex at91sam7 options
2246 @b{flash bank at91sam7} 0 0 0 0 <@var{target#}>
2247 @*AT91SAM7 flashes only require the @var{target#}, all other values are looked up after
2248 reading the chip-id and type.
2250 @subsubsection str7 options
2251 @cindex str7 options
2253 @b{flash bank str7x} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
2254 @*variant can be either STR71x, STR73x or STR75x.
2256 @subsubsection str9 options
2257 @cindex str9 options
2259 @b{flash bank str9x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2260 @*The str9 needs the flash controller to be configured prior to Flash programming, e.g.
2262 str9x flash_config 0 4 2 0 0x80000
2264 This will setup the BBSR, NBBSR, BBADR and NBBADR registers respectively.
2266 @subsubsection str9 options (str9xpec driver)
2268 @b{flash bank str9xpec} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2269 @*Before using the flash commands the turbo mode must be enabled using str9xpec
2270 @option{enable_turbo} <@var{num>.}
2272 Only use this driver for locking/unlocking the device or configuring the option bytes.
2273 Use the standard str9 driver for programming. @xref{STR9 specific commands}.
2275 @subsubsection Stellaris (LM3Sxxx) options
2276 @cindex Stellaris (LM3Sxxx) options
2278 @b{flash bank stellaris} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2279 @*Stellaris flash plugin only require the @var{target#}.
2281 @subsubsection stm32x options
2282 @cindex stm32x options
2284 @b{flash bank stm32x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2285 @*stm32x flash plugin only require the @var{target#}.
2287 @subsubsection aduc702x options
2288 @cindex aduc702x options
2290 @b{flash bank aduc702x} 0 0 0 0 <@var{target#}>
2291 @*The aduc702x flash plugin works with Analog Devices model numbers ADUC7019 through ADUC7028. The setup command only requires the @var{target#} argument (all devices in this family have the same memory layout).
2293 @subsection mFlash Configuration
2294 @cindex mFlash Configuration
2295 @b{mflash bank} <@var{soc}> <@var{base}> <@var{chip_width}> <@var{bus_width}>
2296 <@var{RST pin}> <@var{WP pin}> <@var{DPD pin}> <@var{target #}>
2298 @*Configures a mflash for <@var{soc}> host bank at
2299 <@var{base}>. <@var{chip_width}> and <@var{bus_width}> are bytes
2300 order. Pin number format is dependent on host GPIO calling convention.
2301 If WP or DPD pin was not used, write -1. Currently, mflash bank
2302 support s3c2440 and pxa270.
2304 (ex. of s3c2440) mflash <@var{RST pin}> is GPIO B1, <@var{WP pin}> and <@var{DPD pin}> are not used.
2306 mflash bank s3c2440 0x10000000 2 2 1b -1 -1 0
2308 (ex. of pxa270) mflash <@var{RST pin}> is GPIO 43, <@var{DPD pin}> is not used and <@var{DPD pin}> is GPIO 51.
2310 mflash bank pxa270 0x08000000 2 2 43 -1 51 0
2313 @section Microcontroller specific Flash Commands
2315 @subsection AT91SAM7 specific commands
2316 @cindex AT91SAM7 specific commands
2317 The flash configuration is deduced from the chip identification register. The flash
2318 controller handles erases automatically on a page (128/265 byte) basis, so erase is
2319 not necessary for flash programming. AT91SAM7 processors with less than 512K flash
2320 only have a single flash bank embedded on chip. AT91SAM7xx512 have two flash planes
2321 that can be erased separatly. Only an EraseAll command is supported by the controller
2322 for each flash plane and this is called with
2324 @item @b{flash erase} <@var{num}> @var{first_plane} @var{last_plane}
2325 @*bulk erase flash planes first_plane to last_plane.
2326 @item @b{at91sam7 gpnvm} <@var{num}> <@var{bit}> <@option{set}|@option{clear}>
2327 @cindex at91sam7 gpnvm
2328 @*set or clear a gpnvm bit for the processor
2331 @subsection STR9 specific commands
2332 @cindex STR9 specific commands
2333 @anchor{STR9 specific commands}
2334 These are flash specific commands when using the str9xpec driver.
2336 @item @b{str9xpec enable_turbo} <@var{num}>
2337 @cindex str9xpec enable_turbo
2338 @*enable turbo mode, will simply remove the str9 from the chain and talk
2339 directly to the embedded flash controller.
2340 @item @b{str9xpec disable_turbo} <@var{num}>
2341 @cindex str9xpec disable_turbo
2342 @*restore the str9 into JTAG chain.
2343 @item @b{str9xpec lock} <@var{num}>
2344 @cindex str9xpec lock
2345 @*lock str9 device. The str9 will only respond to an unlock command that will
2347 @item @b{str9xpec unlock} <@var{num}>
2348 @cindex str9xpec unlock
2349 @*unlock str9 device.
2350 @item @b{str9xpec options_read} <@var{num}>
2351 @cindex str9xpec options_read
2352 @*read str9 option bytes.
2353 @item @b{str9xpec options_write} <@var{num}>
2354 @cindex str9xpec options_write
2355 @*write str9 option bytes.
2358 Note: Before using the str9xpec driver here is some background info to help
2359 you better understand how the drivers works. OpenOCD has two flash drivers for
2363 Standard driver @option{str9x} programmed via the str9 core. Normally used for
2364 flash programming as it is faster than the @option{str9xpec} driver.
2366 Direct programming @option{str9xpec} using the flash controller. This is an
2367 ISC compilant (IEEE 1532) tap connected in series with the str9 core. The str9
2368 core does not need to be running to program using this flash driver. Typical use
2369 for this driver is locking/unlocking the target and programming the option bytes.
2372 Before we run any commands using the @option{str9xpec} driver we must first disable
2373 the str9 core. This example assumes the @option{str9xpec} driver has been
2374 configured for flash bank 0.
2376 # assert srst, we do not want core running
2377 # while accessing str9xpec flash driver
2379 # turn off target polling
2382 str9xpec enable_turbo 0
2384 str9xpec options_read 0
2385 # re-enable str9 core
2386 str9xpec disable_turbo 0
2390 The above example will read the str9 option bytes.
2391 When performing a unlock remember that you will not be able to halt the str9 - it
2392 has been locked. Halting the core is not required for the @option{str9xpec} driver
2393 as mentioned above, just issue the commands above manually or from a telnet prompt.
2395 @subsection STR9 configuration
2396 @cindex STR9 configuration
2398 @item @b{str9x flash_config} <@var{bank}> <@var{BBSR}> <@var{NBBSR}>
2399 <@var{BBADR}> <@var{NBBADR}>
2400 @cindex str9x flash_config
2401 @*Configure str9 flash controller.
2403 e.g. str9x flash_config 0 4 2 0 0x80000
2405 BBSR - Boot Bank Size register
2406 NBBSR - Non Boot Bank Size register
2407 BBADR - Boot Bank Start Address register
2408 NBBADR - Boot Bank Start Address register
2412 @subsection STR9 option byte configuration
2413 @cindex STR9 option byte configuration
2415 @item @b{str9xpec options_cmap} <@var{num}> <@option{bank0}|@option{bank1}>
2416 @cindex str9xpec options_cmap
2417 @*configure str9 boot bank.
2418 @item @b{str9xpec options_lvdthd} <@var{num}> <@option{2.4v}|@option{2.7v}>
2419 @cindex str9xpec options_lvdthd
2420 @*configure str9 lvd threshold.
2421 @item @b{str9xpec options_lvdsel} <@var{num}> <@option{vdd}|@option{vdd_vddq}>
2422 @cindex str9xpec options_lvdsel
2423 @*configure str9 lvd source.
2424 @item @b{str9xpec options_lvdwarn} <@var{bank}> <@option{vdd}|@option{vdd_vddq}>
2425 @cindex str9xpec options_lvdwarn
2426 @*configure str9 lvd reset warning source.
2429 @subsection STM32x specific commands
2430 @cindex STM32x specific commands
2432 These are flash specific commands when using the stm32x driver.
2434 @item @b{stm32x lock} <@var{num}>
2436 @*lock stm32 device.
2437 @item @b{stm32x unlock} <@var{num}>
2438 @cindex stm32x unlock
2439 @*unlock stm32 device.
2440 @item @b{stm32x options_read} <@var{num}>
2441 @cindex stm32x options_read
2442 @*read stm32 option bytes.
2443 @item @b{stm32x options_write} <@var{num}> <@option{SWWDG}|@option{HWWDG}>
2444 <@option{RSTSTNDBY}|@option{NORSTSTNDBY}> <@option{RSTSTOP}|@option{NORSTSTOP}>
2445 @cindex stm32x options_write
2446 @*write stm32 option bytes.
2447 @item @b{stm32x mass_erase} <@var{num}>
2448 @cindex stm32x mass_erase
2449 @*mass erase flash memory.
2452 @subsection Stellaris specific commands
2453 @cindex Stellaris specific commands
2455 These are flash specific commands when using the Stellaris driver.
2457 @item @b{stellaris mass_erase} <@var{num}>
2458 @cindex stellaris mass_erase
2459 @*mass erase flash memory.
2462 @node General Commands
2463 @chapter General Commands
2466 The commands documented in this chapter here are common commands that
2467 you, as a human, may want to type and see the output of. Configuration type
2468 commands are documented elsewhere.
2472 @item @b{Source Of Commands}
2473 @* OpenOCD commands can occur in a configuration script (discussed
2474 elsewhere) or typed manually by a human or supplied programatically,
2475 or via one of several TCP/IP Ports.
2477 @item @b{From the human}
2478 @* A human should interact with the telnet interface (default port: 4444,
2479 or via GDB, default port 3333)
2481 To issue commands from within a GDB session, use the @option{monitor}
2482 command, e.g. use @option{monitor poll} to issue the @option{poll}
2483 command. All output is relayed through the GDB session.
2485 @item @b{Machine Interface}
2486 The Tcl interface's intent is to be a machine interface. The default Tcl
2491 @section Daemon Commands
2493 @subsection sleep [@var{msec}]
2495 @*Wait for n milliseconds before resuming. Useful in connection with script files
2496 (@var{script} command and @var{target_script} configuration).
2498 @subsection shutdown
2500 @*Close the OpenOCD daemon, disconnecting all clients (GDB, telnet, other).
2502 @subsection debug_level [@var{n}]
2504 @anchor{debug_level}
2505 @*Display or adjust debug level to n<0-3>
2507 @subsection fast [@var{enable|disable}]
2509 @*Default disabled. Set default behaviour of OpenOCD to be "fast and dangerous". For instance ARM7/9 DCC memory
2510 downloads and fast memory access will work if the JTAG interface isn't too fast and
2511 the core doesn't run at a too low frequency. Note that this option only changes the default
2512 and that the indvidual options, like DCC memory downloads, can be enabled and disabled
2515 The target specific "dangerous" optimisation tweaking options may come and go
2516 as more robust and user friendly ways are found to ensure maximum throughput
2517 and robustness with a minimum of configuration.
2519 Typically the "fast enable" is specified first on the command line:
2522 openocd -c "fast enable" -c "interface dummy" -f target/str710.cfg
2525 @subsection log_output <@var{file}>
2527 @*Redirect logging to <file> (default: stderr)
2529 @subsection script <@var{file}>
2531 @*Execute commands from <file>
2532 See also: ``source [find FILENAME]''
2534 @section Target state handling
2535 @subsection power <@var{on}|@var{off}>
2537 @*Turn power switch to target on/off.
2538 No arguments: print status.
2539 Not all interfaces support this.
2541 @subsection reg [@option{#}|@option{name}] [value]
2543 @*Access a single register by its number[@option{#}] or by its [@option{name}].
2544 No arguments: list all available registers for the current target.
2545 Number or name argument: display a register.
2546 Number or name and value arguments: set register value.
2548 @subsection poll [@option{on}|@option{off}]
2550 @*Poll the target for its current state. If the target is in debug mode, architecture
2551 specific information about the current state is printed. An optional parameter
2552 allows continuous polling to be enabled and disabled.
2554 @subsection halt [@option{ms}]
2556 @*Send a halt request to the target and wait for it to halt for up to [@option{ms}] milliseconds.
2557 Default [@option{ms}] is 5 seconds if no arg given.
2558 Optional arg @option{ms} is a timeout in milliseconds. Using 0 as the [@option{ms}]
2559 will stop OpenOCD from waiting.
2561 @subsection wait_halt [@option{ms}]
2563 @*Wait for the target to enter debug mode. Optional [@option{ms}] is
2564 a timeout in milliseconds. Default [@option{ms}] is 5 seconds if no
2567 @subsection resume [@var{address}]
2569 @*Resume the target at its current code position, or at an optional address.
2570 OpenOCD will wait 5 seconds for the target to resume.
2572 @subsection step [@var{address}]
2574 @*Single-step the target at its current code position, or at an optional address.
2576 @subsection reset [@option{run}|@option{halt}|@option{init}]
2578 @*Perform a hard-reset. The optional parameter specifies what should happen after the reset.
2580 With no arguments a "reset run" is executed
2584 @*Let the target run.
2587 @*Immediately halt the target (works only with certain configurations).
2590 @*Immediately halt the target, and execute the reset script (works only with certain
2594 @subsection soft_reset_halt
2596 @*Requesting target halt and executing a soft reset. This is often used
2597 when a target cannot be reset and halted. The target, after reset is
2598 released begins to execute code. OpenOCD attempts to stop the CPU and
2599 then sets the program counter back to the reset vector. Unfortunately
2600 the code that was executed may have left the hardware in an unknown
2604 @section Memory access commands
2606 display available RAM memory.
2607 @subsection Memory peek/poke type commands
2608 These commands allow accesses of a specific size to the memory
2609 system. Often these are used to configure the current target in some
2610 special way. For example - one may need to write certian values to the
2611 SDRAM controller to enable SDRAM.
2614 @item To change the current target see the ``targets'' (plural) command
2615 @item In system level scripts these commands are deprecated, please use the TARGET object versions.
2619 @item @b{mdw} <@var{addr}> [@var{count}]
2621 @*display memory words (32bit)
2622 @item @b{mdh} <@var{addr}> [@var{count}]
2624 @*display memory half-words (16bit)
2625 @item @b{mdb} <@var{addr}> [@var{count}]
2627 @*display memory bytes (8bit)
2628 @item @b{mww} <@var{addr}> <@var{value}>
2630 @*write memory word (32bit)
2631 @item @b{mwh} <@var{addr}> <@var{value}>
2633 @*write memory half-word (16bit)
2634 @item @b{mwb} <@var{addr}> <@var{value}>
2636 @*write memory byte (8bit)
2639 @section Image loading commands
2640 @subsection load_image
2641 @b{load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2644 @*Load image <@var{file}> to target memory at <@var{address}>
2645 @subsection fast_load_image
2646 @b{fast_load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2647 @cindex fast_load_image
2648 @anchor{fast_load_image}
2649 @*Normally you should be using @b{load_image} or GDB load. However, for
2650 testing purposes or when I/O overhead is significant(OpenOCD running on an embedded
2651 host), storing the image in memory and uploading the image to the target
2652 can be a way to upload e.g. multiple debug sessions when the binary does not change.
2653 Arguments are the same as @b{load_image}, but the image is stored in OpenOCD host
2654 memory, i.e. does not affect target. This approach is also useful when profiling
2655 target programming performance as I/O and target programming can easily be profiled
2657 @subsection fast_load
2661 @*Loads an image stored in memory by @b{fast_load_image} to the current target. Must be preceeded by fast_load_image.
2662 @subsection dump_image
2663 @b{dump_image} <@var{file}> <@var{address}> <@var{size}>
2666 @*Dump <@var{size}> bytes of target memory starting at <@var{address}> to a
2667 (binary) <@var{file}>.
2668 @subsection verify_image
2669 @b{verify_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2670 @cindex verify_image
2671 @*Verify <@var{file}> against target memory starting at <@var{address}>.
2672 This will first attempt a comparison using a CRC checksum, if this fails it will try a binary compare.
2675 @section Breakpoint commands
2676 @cindex Breakpoint commands
2678 @item @b{bp} <@var{addr}> <@var{len}> [@var{hw}]
2680 @*set breakpoint <address> <length> [hw]
2681 @item @b{rbp} <@var{addr}>
2683 @*remove breakpoint <adress>
2684 @item @b{wp} <@var{addr}> <@var{len}> <@var{r}|@var{w}|@var{a}> [@var{value}] [@var{mask}]
2686 @*set watchpoint <address> <length> <r/w/a> [value] [mask]
2687 @item @b{rwp} <@var{addr}>
2689 @*remove watchpoint <adress>
2692 @section Misc Commands
2693 @cindex Other Target Commands
2695 @item @b{profile} <@var{seconds}> <@var{gmon.out}>
2697 Profiling samples the CPU's program counter as quickly as possible, which is useful for non-intrusive stochastic profiling.
2701 @section Target Specific Commands
2702 @cindex Target Specific Commands
2706 @section Architecture Specific Commands
2707 @cindex Architecture Specific Commands
2709 @subsection ARMV4/5 specific commands
2710 @cindex ARMV4/5 specific commands
2712 These commands are specific to ARM architecture v4 and v5, like all ARM7/9 systems
2713 or Intel XScale (XScale isn't supported yet).
2715 @item @b{armv4_5 reg}
2717 @*Display a list of all banked core registers, fetching the current value from every
2718 core mode if necessary. OpenOCD versions before rev. 60 didn't fetch the current
2720 @item @b{armv4_5 core_mode} [@var{arm}|@var{thumb}]
2721 @cindex armv4_5 core_mode
2722 @*Displays the core_mode, optionally changing it to either ARM or Thumb mode.
2723 The target is resumed in the currently set @option{core_mode}.
2726 @subsection ARM7/9 specific commands
2727 @cindex ARM7/9 specific commands
2729 These commands are specific to ARM7 and ARM9 targets, like ARM7TDMI, ARM720t,
2730 ARM920T or ARM926EJ-S.
2732 @item @b{arm7_9 dbgrq} <@var{enable}|@var{disable}>
2733 @cindex arm7_9 dbgrq
2734 @*Enable use of the DBGRQ bit to force entry into debug mode. This should be
2735 safe for all but ARM7TDMI--S cores (like Philips LPC).
2736 @item @b{arm7_9 fast_memory_access} <@var{enable}|@var{disable}>
2737 @cindex arm7_9 fast_memory_access
2738 @anchor{arm7_9 fast_memory_access}
2739 @*Allow OpenOCD to read and write memory without checking completion of
2740 the operation. This provides a huge speed increase, especially with USB JTAG
2741 cables (FT2232), but might be unsafe if used with targets running at very low
2742 speeds, like the 32kHz startup clock of an AT91RM9200.
2743 @item @b{arm7_9 dcc_downloads} <@var{enable}|@var{disable}>
2744 @cindex arm7_9 dcc_downloads
2745 @*Enable the use of the debug communications channel (DCC) to write larger (>128 byte)
2746 amounts of memory. DCC downloads offer a huge speed increase, but might be potentially
2747 unsafe, especially with targets running at very low speeds. This command was introduced
2748 with OpenOCD rev. 60.
2751 @subsection ARM720T specific commands
2752 @cindex ARM720T specific commands
2755 @item @b{arm720t cp15} <@var{num}> [@var{value}]
2756 @cindex arm720t cp15
2757 @*display/modify cp15 register <@option{num}> [@option{value}].
2758 @item @b{arm720t md<bhw>_phys} <@var{addr}> [@var{count}]
2759 @cindex arm720t md<bhw>_phys
2760 @*Display memory at physical address addr.
2761 @item @b{arm720t mw<bhw>_phys} <@var{addr}> <@var{value}>
2762 @cindex arm720t mw<bhw>_phys
2763 @*Write memory at physical address addr.
2764 @item @b{arm720t virt2phys} <@var{va}>
2765 @cindex arm720t virt2phys
2766 @*Translate a virtual address to a physical address.
2769 @subsection ARM9TDMI specific commands
2770 @cindex ARM9TDMI specific commands
2773 @item @b{arm9tdmi vector_catch} <@var{all}|@var{none}>
2774 @cindex arm9tdmi vector_catch
2775 @*Catch arm9 interrupt vectors, can be @option{all} @option{none} or any of the following:
2776 @option{reset} @option{undef} @option{swi} @option{pabt} @option{dabt} @option{reserved}
2777 @option{irq} @option{fiq}.
2779 Can also be used on other ARM9 based cores such as ARM966, ARM920T and ARM926EJ-S.
2782 @subsection ARM966E specific commands
2783 @cindex ARM966E specific commands
2786 @item @b{arm966e cp15} <@var{num}> [@var{value}]
2787 @cindex arm966e cp15
2788 @*display/modify cp15 register <@option{num}> [@option{value}].
2791 @subsection ARM920T specific commands
2792 @cindex ARM920T specific commands
2795 @item @b{arm920t cp15} <@var{num}> [@var{value}]
2796 @cindex arm920t cp15
2797 @*display/modify cp15 register <@option{num}> [@option{value}].
2798 @item @b{arm920t cp15i} <@var{num}> [@var{value}] [@var{address}]
2799 @cindex arm920t cp15i
2800 @*display/modify cp15 (interpreted access) <@option{opcode}> [@option{value}] [@option{address}]
2801 @item @b{arm920t cache_info}
2802 @cindex arm920t cache_info
2803 @*Print information about the caches found. This allows to see whether your target
2804 is an ARM920T (2x16kByte cache) or ARM922T (2x8kByte cache).
2805 @item @b{arm920t md<bhw>_phys} <@var{addr}> [@var{count}]
2806 @cindex arm920t md<bhw>_phys
2807 @*Display memory at physical address addr.
2808 @item @b{arm920t mw<bhw>_phys} <@var{addr}> <@var{value}>
2809 @cindex arm920t mw<bhw>_phys
2810 @*Write memory at physical address addr.
2811 @item @b{arm920t read_cache} <@var{filename}>
2812 @cindex arm920t read_cache
2813 @*Dump the content of ICache and DCache to a file.
2814 @item @b{arm920t read_mmu} <@var{filename}>
2815 @cindex arm920t read_mmu
2816 @*Dump the content of the ITLB and DTLB to a file.
2817 @item @b{arm920t virt2phys} <@var{va}>
2818 @cindex arm920t virt2phys
2819 @*Translate a virtual address to a physical address.
2822 @subsection ARM926EJ-S specific commands
2823 @cindex ARM926EJ-S specific commands
2826 @item @b{arm926ejs cp15} <@var{num}> [@var{value}]
2827 @cindex arm926ejs cp15
2828 @*display/modify cp15 register <@option{num}> [@option{value}].
2829 @item @b{arm926ejs cache_info}
2830 @cindex arm926ejs cache_info
2831 @*Print information about the caches found.
2832 @item @b{arm926ejs md<bhw>_phys} <@var{addr}> [@var{count}]
2833 @cindex arm926ejs md<bhw>_phys
2834 @*Display memory at physical address addr.
2835 @item @b{arm926ejs mw<bhw>_phys} <@var{addr}> <@var{value}>
2836 @cindex arm926ejs mw<bhw>_phys
2837 @*Write memory at physical address addr.
2838 @item @b{arm926ejs virt2phys} <@var{va}>
2839 @cindex arm926ejs virt2phys
2840 @*Translate a virtual address to a physical address.
2843 @subsection CORTEX_M3 specific commands
2844 @cindex CORTEX_M3 specific commands
2847 @item @b{cortex_m3 maskisr} <@var{on}|@var{off}>
2848 @cindex cortex_m3 maskisr
2849 @*Enable masking (disabling) interrupts during target step/resume.
2853 @section Debug commands
2854 @cindex Debug commands
2855 The following commands give direct access to the core, and are most likely
2856 only useful while debugging OpenOCD.
2858 @item @b{arm7_9 write_xpsr} <@var{32-bit value}> <@option{0=cpsr}, @option{1=spsr}>
2859 @cindex arm7_9 write_xpsr
2860 @*Immediately write either the current program status register (CPSR) or the saved
2861 program status register (SPSR), without changing the register cache (as displayed
2862 by the @option{reg} and @option{armv4_5 reg} commands).
2863 @item @b{arm7_9 write_xpsr_im8} <@var{8-bit value}> <@var{rotate 4-bit}>
2864 <@var{0=cpsr},@var{1=spsr}>
2865 @cindex arm7_9 write_xpsr_im8
2866 @*Write the 8-bit value rotated right by 2*rotate bits, using an immediate write
2867 operation (similar to @option{write_xpsr}).
2868 @item @b{arm7_9 write_core_reg} <@var{num}> <@var{mode}> <@var{value}>
2869 @cindex arm7_9 write_core_reg
2870 @*Write a core register, without changing the register cache (as displayed by the
2871 @option{reg} and @option{armv4_5 reg} commands). The <@var{mode}> argument takes the
2872 encoding of the [M4:M0] bits of the PSR.
2875 @section Target Requests
2876 @cindex Target Requests
2877 OpenOCD can handle certain target requests, currently debugmsg are only supported for arm7_9 and cortex_m3.
2878 See libdcc in the contrib dir for more details.
2880 @item @b{target_request debugmsgs} <@var{enable}|@var{disable}|@var{charmsg}>
2881 @cindex target_request debugmsgs
2882 @*Enable/disable target debugmsgs requests. debugmsgs enable messages to be sent to the debugger while the target is running. @var{charmsg} receives messages if Linux kernel ``Kernel low-level debugging via EmbeddedICE DCC channel'' option is enabled.
2886 @chapter JTAG Commands
2887 @cindex JTAG Commands
2888 Generally most people will not use the bulk of these commands. They
2889 are mostly used by the OpenOCD developers or those who need to
2890 directly manipulate the JTAG taps.
2892 In general these commands control JTAG taps at a very low level. For
2893 example if you need to control a JTAG Route Controller (i.e.: the
2894 OMAP3530 on the Beagle Board has one) you might use these commands in
2895 a script or an event procedure.
2899 @item @b{scan_chain}
2901 @*Print current scan chain configuration.
2902 @item @b{jtag_reset} <@var{trst}> <@var{srst}>
2904 @*Toggle reset lines.
2905 @item @b{endstate} <@var{tap_state}>
2907 @*Finish JTAG operations in <@var{tap_state}>.
2908 @item @b{runtest} <@var{num_cycles}>
2910 @*Move to Run-Test/Idle, and execute <@var{num_cycles}>
2911 @item @b{statemove} [@var{tap_state}]
2913 @*Move to current endstate or [@var{tap_state}]
2914 @item @b{irscan} <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
2916 @*Execute IR scan <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
2917 @item @b{drscan} <@var{device}> [@var{dev2}] [@var{var2}] ...
2919 @*Execute DR scan <@var{device}> [@var{dev2}] [@var{var2}] ...
2920 @item @b{verify_ircapture} <@option{enable}|@option{disable}>
2921 @cindex verify_ircapture
2922 @*Verify value captured during Capture-IR. Default is enabled.
2923 @item @b{var} <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
2925 @*Allocate, display or delete variable <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
2926 @item @b{field} <@var{var}> <@var{field}> [@var{value}|@var{flip}]
2928 Display/modify variable field <@var{var}> <@var{field}> [@var{value}|@var{flip}].
2933 Available tap_states are:
2973 If OpenOCD runs on an embedded host(as ZY1000 does), then TFTP can
2974 be used to access files on PCs (either the developer's PC or some other PC).
2976 The way this works on the ZY1000 is to prefix a filename by
2977 "/tftp/ip/" and append the TFTP path on the TFTP
2978 server (tftpd). E.g. "load_image /tftp/10.0.0.96/c:\temp\abc.elf" will
2979 load c:\temp\abc.elf from the developer pc (10.0.0.96) into memory as
2980 if the file was hosted on the embedded host.
2982 In order to achieve decent performance, you must choose a TFTP server
2983 that supports a packet size bigger than the default packet size (512 bytes). There
2984 are numerous TFTP servers out there (free and commercial) and you will have to do
2985 a bit of googling to find something that fits your requirements.
2987 @node Sample Scripts
2988 @chapter Sample Scripts
2991 This page shows how to use the Target Library.
2993 The configuration script can be divided into the following sections:
2995 @item Daemon configuration
2997 @item JTAG scan chain
2998 @item Target configuration
2999 @item Flash configuration
3002 Detailed information about each section can be found at OpenOCD configuration.
3004 @section AT91R40008 example
3005 @cindex AT91R40008 example
3006 To start OpenOCD with a target script for the AT91R40008 CPU and reset
3007 the CPU upon startup of the OpenOCD daemon.
3009 openocd -f interface/parport.cfg -f target/at91r40008.cfg -c init -c reset
3013 @node GDB and OpenOCD
3014 @chapter GDB and OpenOCD
3015 @cindex GDB and OpenOCD
3016 OpenOCD complies with the remote gdbserver protocol, and as such can be used
3017 to debug remote targets.
3019 @section Connecting to GDB
3020 @cindex Connecting to GDB
3021 @anchor{Connecting to GDB}
3022 Use GDB 6.7 or newer with OpenOCD if you run into trouble. For
3023 instance GDB 6.3 has a known bug that produces bogus memory access
3024 errors, which has since been fixed: look up 1836 in
3025 @url{http://sourceware.org/cgi-bin/gnatsweb.pl?database=gdb}
3027 @*OpenOCD can communicate with GDB in two ways:
3030 A socket (TCP/IP) connection is typically started as follows:
3032 target remote localhost:3333
3034 This would cause GDB to connect to the gdbserver on the local pc using port 3333.
3036 A pipe connection is typically started as follows:
3038 target remote | openocd --pipe
3040 This would cause GDB to run OpenOCD and communicate using pipes (stdin/stdout).
3041 Using this method has the advantage of GDB starting/stopping OpenOCD for the debug
3045 @*To see a list of available OpenOCD commands type @option{monitor help} on the
3048 OpenOCD supports the gdb @option{qSupported} packet, this enables information
3049 to be sent by the GDB remote server (i.e. OpenOCD) to GDB. Typical information includes
3050 packet size and the device's memory map.
3052 Previous versions of OpenOCD required the following GDB options to increase
3053 the packet size and speed up GDB communication:
3055 set remote memory-write-packet-size 1024
3056 set remote memory-write-packet-size fixed
3057 set remote memory-read-packet-size 1024
3058 set remote memory-read-packet-size fixed
3060 This is now handled in the @option{qSupported} PacketSize and should not be required.
3062 @section Programming using GDB
3063 @cindex Programming using GDB
3065 By default the target memory map is sent to GDB. This can be disabled by
3066 the following OpenOCD configuration option:
3068 gdb_memory_map disable
3070 For this to function correctly a valid flash configuration must also be set
3071 in OpenOCD. For faster performance you should also configure a valid
3074 Informing GDB of the memory map of the target will enable GDB to protect any
3075 flash areas of the target and use hardware breakpoints by default. This means
3076 that the OpenOCD option @option{gdb_breakpoint_override} is not required when
3077 using a memory map. @xref{gdb_breakpoint_override}.
3079 To view the configured memory map in GDB, use the GDB command @option{info mem}
3080 All other unassigned addresses within GDB are treated as RAM.
3082 GDB 6.8 and higher set any memory area not in the memory map as inaccessible.
3083 This can be changed to the old behaviour by using the following GDB command
3085 set mem inaccessible-by-default off
3088 If @option{gdb_flash_program enable} is also used, GDB will be able to
3089 program any flash memory using the vFlash interface.
3091 GDB will look at the target memory map when a load command is given, if any
3092 areas to be programmed lie within the target flash area the vFlash packets
3095 If the target needs configuring before GDB programming, an event
3096 script can be executed:
3098 $_TARGETNAME configure -event EVENTNAME BODY
3101 To verify any flash programming the GDB command @option{compare-sections}
3104 @node Tcl Scripting API
3105 @chapter Tcl Scripting API
3106 @cindex Tcl Scripting API
3110 The commands are stateless. E.g. the telnet command line has a concept
3111 of currently active target, the Tcl API proc's take this sort of state
3112 information as an argument to each proc.
3114 There are three main types of return values: single value, name value
3115 pair list and lists.
3117 Name value pair. The proc 'foo' below returns a name/value pair
3123 > set foo(you) Oyvind
3124 > set foo(mouse) Micky
3125 > set foo(duck) Donald
3133 me Duane you Oyvind mouse Micky duck Donald
3135 Thus, to get the names of the associative array is easy:
3137 foreach { name value } [set foo] {
3138 puts "Name: $name, Value: $value"
3142 Lists returned must be relatively small. Otherwise a range
3143 should be passed in to the proc in question.
3145 @section Internal low-level Commands
3147 By low-level, the intent is a human would not directly use these commands.
3149 Low-level commands are (should be) prefixed with "openocd_", e.g. openocd_flash_banks
3150 is the low level API upon which "flash banks" is implemented.
3153 @item @b{ocd_mem2array} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
3155 Read memory and return as a Tcl array for script processing
3156 @item @b{ocd_array2mem} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
3158 Convert a Tcl array to memory locations and write the values
3159 @item @b{ocd_flash_banks} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}> <@var{target}> [@option{driver options} ...]
3161 Return information about the flash banks
3164 OpenOCD commands can consist of two words, e.g. "flash banks". The
3165 startup.tcl "unknown" proc will translate this into a Tcl proc
3166 called "flash_banks".
3168 @section OpenOCD specific Global Variables
3172 Real Tcl has ::tcl_platform(), and platform::identify, and many other
3173 variables. JimTCL, as implemented in OpenOCD creates $HostOS which
3174 holds one of the following values:
3177 @item @b{winxx} Built using Microsoft Visual Studio
3178 @item @b{linux} Linux is the underlying operating sytem
3179 @item @b{darwin} Darwin (mac-os) is the underlying operating sytem.
3180 @item @b{cygwin} Running under Cygwin
3181 @item @b{mingw32} Running under MingW32
3182 @item @b{other} Unknown, none of the above.
3185 Note: 'winxx' was choosen because today (March-2009) no distinction is made between Win32 and Win64.
3188 @chapter Deprecated/Removed Commands
3189 @cindex Deprecated/Removed Commands
3190 Certain OpenOCD commands have been deprecated/removed during the various revisions.
3193 @item @b{arm7_9 fast_writes}
3194 @cindex arm7_9 fast_writes
3195 @*use @option{arm7_9 fast_memory_access} command with same args. @xref{arm7_9 fast_memory_access}.
3196 @item @b{arm7_9 force_hw_bkpts}
3197 @cindex arm7_9 force_hw_bkpts
3198 @*Use @option{gdb_breakpoint_override} instead. Note that GDB will use hardware breakpoints
3199 for flash if the GDB memory map has been set up(default when flash is declared in
3200 target configuration). @xref{gdb_breakpoint_override}.
3201 @item @b{arm7_9 sw_bkpts}
3202 @cindex arm7_9 sw_bkpts
3203 @*On by default. See also @option{gdb_breakpoint_override}. @xref{gdb_breakpoint_override}.
3204 @item @b{daemon_startup}
3205 @cindex daemon_startup
3206 @*this config option has been removed, simply adding @option{init} and @option{reset halt} to
3207 the end of your config script will give the same behaviour as using @option{daemon_startup reset}
3208 and @option{target cortex_m3 little reset_halt 0}.
3209 @item @b{dump_binary}
3211 @*use @option{dump_image} command with same args. @xref{dump_image}.
3212 @item @b{flash erase}
3214 @*use @option{flash erase_sector} command with same args. @xref{flash erase_sector}.
3215 @item @b{flash write}
3217 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
3218 @item @b{flash write_binary}
3219 @cindex flash write_binary
3220 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
3221 @item @b{flash auto_erase}
3222 @cindex flash auto_erase
3223 @*use @option{flash write_image} command passing @option{erase} as the first parameter. @xref{flash write_image}.
3224 @item @b{load_binary}
3226 @*use @option{load_image} command with same args. @xref{load_image}.
3227 @item @b{run_and_halt_time}
3228 @cindex run_and_halt_time
3229 @*This command has been removed for simpler reset behaviour, it can be simulated with the
3236 @item @b{target} <@var{type}> <@var{endian}> <@var{jtag-position}>
3238 @*use the create subcommand of @option{target}.
3239 @item @b{target_script} <@var{target#}> <@var{eventname}> <@var{scriptname}>
3240 @cindex target_script
3241 @*use <@var{target_name}> configure -event <@var{eventname}> "script <@var{scriptname}>"
3242 @item @b{working_area}
3243 @cindex working_area
3244 @*use the @option{configure} subcommand of @option{target} to set the work-area-virt, work-area-phy, work-area-size, and work-area-backup properties of the target.
3251 @item @b{RTCK, also known as: Adaptive Clocking - What is it?}
3253 @cindex adaptive clocking
3256 In digital circuit design it is often refered to as ``clock
3257 synchronisation'' the JTAG interface uses one clock (TCK or TCLK)
3258 operating at some speed, your target is operating at another. The two
3259 clocks are not synchronised, they are ``asynchronous''
3261 In order for the two to work together they must be synchronised. Otherwise
3262 the two systems will get out of sync with each other and nothing will
3263 work. There are 2 basic options:
3266 Use a special circuit.
3268 One clock must be some multiple slower than the other.
3271 @b{Does this really matter?} For some chips and some situations, this
3272 is a non-issue (i.e.: A 500MHz ARM926) but for others - for example some
3273 Atmel SAM7 and SAM9 chips start operation from reset at 32kHz -
3274 program/enable the oscillators and eventually the main clock. It is in
3275 those critical times you must slow the JTAG clock to sometimes 1 to
3278 Imagine debugging a 500MHz ARM926 hand held battery powered device
3279 that ``deep sleeps'' at 32kHz between every keystroke. It can be
3282 @b{Solution #1 - A special circuit}
3284 In order to make use of this, your JTAG dongle must support the RTCK
3285 feature. Not all dongles support this - keep reading!
3287 The RTCK signal often found in some ARM chips is used to help with
3288 this problem. ARM has a good description of the problem described at
3289 this link: @url{http://www.arm.com/support/faqdev/4170.html} [checked
3290 28/nov/2008]. Link title: ``How does the JTAG synchronisation logic
3291 work? / how does adaptive clocking work?''.
3293 The nice thing about adaptive clocking is that ``battery powered hand
3294 held device example'' - the adaptiveness works perfectly all the
3295 time. One can set a break point or halt the system in the deep power
3296 down code, slow step out until the system speeds up.
3298 @b{Solution #2 - Always works - but may be slower}
3300 Often this is a perfectly acceptable solution.
3302 In most simple terms: Often the JTAG clock must be 1/10 to 1/12 of
3303 the target clock speed. But what that ``magic division'' is varies
3304 depending on the chips on your board. @b{ARM rule of thumb} Most ARM
3305 based systems require an 8:1 division. @b{Xilinx rule of thumb} is
3306 1/12 the clock speed.
3308 Note: Many FTDI2232C based JTAG dongles are limited to 6MHz.
3310 You can still debug the 'low power' situations - you just need to
3311 manually adjust the clock speed at every step. While painful and
3312 tedious, it is not always practical.
3314 It is however easy to ``code your way around it'' - i.e.: Cheat a little,
3315 have a special debug mode in your application that does a ``high power
3316 sleep''. If you are careful - 98% of your problems can be debugged
3319 To set the JTAG frequency use the command:
3327 @item @b{Win32 Pathnames} Why don't backslashes work in Windows paths?
3329 OpenOCD uses Tcl and a backslash is an escape char. Use @{ and @}
3330 around Windows filenames.
3343 @item @b{Missing: cygwin1.dll} OpenOCD complains about a missing cygwin1.dll.
3345 Make sure you have Cygwin installed, or at least a version of OpenOCD that
3346 claims to come with all the necessary DLLs. When using Cygwin, try launching
3347 OpenOCD from the Cygwin shell.
3349 @item @b{Breakpoint Issue} I'm trying to set a breakpoint using GDB (or a frontend like Insight or
3350 Eclipse), but OpenOCD complains that "Info: arm7_9_common.c:213
3351 arm7_9_add_breakpoint(): sw breakpoint requested, but software breakpoints not enabled".
3353 GDB issues software breakpoints when a normal breakpoint is requested, or to implement
3354 source-line single-stepping. On ARMv4T systems, like ARM7TDMI, ARM720T or ARM920T,
3355 software breakpoints consume one of the two available hardware breakpoints.
3357 @item @b{LPC2000 Flash} When erasing or writing LPC2000 on-chip flash, the operation fails at random.
3359 Make sure the core frequency specified in the @option{flash lpc2000} line matches the
3360 clock at the time you're programming the flash. If you've specified the crystal's
3361 frequency, make sure the PLL is disabled. If you've specified the full core speed
3362 (e.g. 60MHz), make sure the PLL is enabled.
3364 @item @b{Amontec Chameleon} When debugging using an Amontec Chameleon in its JTAG Accelerator configuration,
3365 I keep getting "Error: amt_jtagaccel.c:184 amt_wait_scan_busy(): amt_jtagaccel timed
3366 out while waiting for end of scan, rtck was disabled".
3368 Make sure your PC's parallel port operates in EPP mode. You might have to try several
3369 settings in your PC BIOS (ECP, EPP, and different versions of those).
3371 @item @b{Data Aborts} When debugging with OpenOCD and GDB (plain GDB, Insight, or Eclipse),
3372 I get lots of "Error: arm7_9_common.c:1771 arm7_9_read_memory():
3373 memory read caused data abort".
3375 The errors are non-fatal, and are the result of GDB trying to trace stack frames
3376 beyond the last valid frame. It might be possible to prevent this by setting up
3377 a proper "initial" stack frame, if you happen to know what exactly has to
3378 be done, feel free to add this here.
3380 @b{Simple:} In your startup code - push 8 registers of zeros onto the
3381 stack before calling main(). What GDB is doing is ``climbing'' the run
3382 time stack by reading various values on the stack using the standard
3383 call frame for the target. GDB keeps going - until one of 2 things
3384 happen @b{#1} an invalid frame is found, or @b{#2} some huge number of
3385 stackframes have been processed. By pushing zeros on the stack, GDB
3388 @b{Debugging Interrupt Service Routines} - In your ISR before you call
3389 your C code, do the same - artifically push some zeros onto the stack,
3390 remember to pop them off when the ISR is done.
3392 @b{Also note:} If you have a multi-threaded operating system, they
3393 often do not @b{in the intrest of saving memory} waste these few
3397 @item @b{JTAG Reset Config} I get the following message in the OpenOCD console (or log file):
3398 "Warning: arm7_9_common.c:679 arm7_9_assert_reset(): srst resets test logic, too".
3400 This warning doesn't indicate any serious problem, as long as you don't want to
3401 debug your core right out of reset. Your .cfg file specified @option{jtag_reset
3402 trst_and_srst srst_pulls_trst} to tell OpenOCD that either your board,
3403 your debugger or your target uC (e.g. LPC2000) can't assert the two reset signals
3404 independently. With this setup, it's not possible to halt the core right out of
3405 reset, everything else should work fine.
3407 @item @b{USB Power} When using OpenOCD in conjunction with Amontec JTAGkey and the Yagarto
3408 toolchain (Eclipse, arm-elf-gcc, arm-elf-gdb), the debugging seems to be
3409 unstable. When single-stepping over large blocks of code, GDB and OpenOCD
3410 quit with an error message. Is there a stability issue with OpenOCD?
3412 No, this is not a stability issue concerning OpenOCD. Most users have solved
3413 this issue by simply using a self-powered USB hub, which they connect their
3414 Amontec JTAGkey to. Apparently, some computers do not provide a USB power
3415 supply stable enough for the Amontec JTAGkey to be operated.
3417 @b{Laptops running on battery have this problem too...}
3419 @item @b{USB Power} When using the Amontec JTAGkey, sometimes OpenOCD crashes with the
3420 following error messages: "Error: ft2232.c:201 ft2232_read(): FT_Read returned:
3421 4" and "Error: ft2232.c:365 ft2232_send_and_recv(): couldn't read from FT2232".
3422 What does that mean and what might be the reason for this?
3424 First of all, the reason might be the USB power supply. Try using a self-powered
3425 hub instead of a direct connection to your computer. Secondly, the error code 4
3426 corresponds to an FT_IO_ERROR, which means that the driver for the FTDI USB
3427 chip ran into some sort of error - this points us to a USB problem.
3429 @item @b{GDB Disconnects} When using the Amontec JTAGkey, sometimes OpenOCD crashes with the following
3430 error message: "Error: gdb_server.c:101 gdb_get_char(): read: 10054".
3431 What does that mean and what might be the reason for this?
3433 Error code 10054 corresponds to WSAECONNRESET, which means that the debugger (GDB)
3434 has closed the connection to OpenOCD. This might be a GDB issue.
3436 @item @b{LPC2000 Flash} In the configuration file in the section where flash device configurations
3437 are described, there is a parameter for specifying the clock frequency
3438 for LPC2000 internal flash devices (e.g. @option{flash bank lpc2000
3439 0x0 0x40000 0 0 0 lpc2000_v1 14746 calc_checksum}), which must be
3440 specified in kilohertz. However, I do have a quartz crystal of a
3441 frequency that contains fractions of kilohertz (e.g. 14,745,600 Hz,
3442 i.e. 14,745.600 kHz). Is it possible to specify real numbers for the
3445 No. The clock frequency specified here must be given as an integral number.
3446 However, this clock frequency is used by the In-Application-Programming (IAP)
3447 routines of the LPC2000 family only, which seems to be very tolerant concerning
3448 the given clock frequency, so a slight difference between the specified clock
3449 frequency and the actual clock frequency will not cause any trouble.
3451 @item @b{Command Order} Do I have to keep a specific order for the commands in the configuration file?
3453 Well, yes and no. Commands can be given in arbitrary order, yet the
3454 devices listed for the JTAG scan chain must be given in the right
3455 order (jtag newdevice), with the device closest to the TDO-Pin being
3456 listed first. In general, whenever objects of the same type exist
3457 which require an index number, then these objects must be given in the
3458 right order (jtag newtap, targets and flash banks - a target
3459 references a jtag newtap and a flash bank references a target).
3461 You can use the ``scan_chain'' command to verify and display the tap order.
3463 @item @b{JTAG Tap Order} JTAG tap order - command order
3465 Many newer devices have multiple JTAG taps. For example: ST
3466 Microsystems STM32 chips have two taps, a ``boundary scan tap'' and
3467 ``Cortex-M3'' tap. Example: The STM32 reference manual, Document ID:
3468 RM0008, Section 26.5, Figure 259, page 651/681, the ``TDI'' pin is
3469 connected to the boundary scan tap, which then connects to the
3470 Cortex-M3 tap, which then connects to the TDO pin.
3472 Thus, the proper order for the STM32 chip is: (1) The Cortex-M3, then
3473 (2) The boundary scan tap. If your board includes an additional JTAG
3474 chip in the scan chain (for example a Xilinx CPLD or FPGA) you could
3475 place it before or after the STM32 chip in the chain. For example:
3478 @item OpenOCD_TDI(output) -> STM32 TDI Pin (BS Input)
3479 @item STM32 BS TDO (output) -> STM32 Cortex-M3 TDI (input)
3480 @item STM32 Cortex-M3 TDO (output) -> SM32 TDO Pin
3481 @item STM32 TDO Pin (output) -> Xilinx TDI Pin (input)
3482 @item Xilinx TDO Pin -> OpenOCD TDO (input)
3485 The ``jtag device'' commands would thus be in the order shown below. Note:
3488 @item jtag newtap Xilinx tap -irlen ...
3489 @item jtag newtap stm32 cpu -irlen ...
3490 @item jtag newtap stm32 bs -irlen ...
3491 @item # Create the debug target and say where it is
3492 @item target create stm32.cpu -chain-position stm32.cpu ...
3496 @item @b{SYSCOMP} Sometimes my debugging session terminates with an error. When I look into the
3497 log file, I can see these error messages: Error: arm7_9_common.c:561
3498 arm7_9_execute_sys_speed(): timeout waiting for SYSCOMP
3504 @node Tcl Crash Course
3505 @chapter Tcl Crash Course
3508 Not everyone knows Tcl - this is not intended to be a replacement for
3509 learning Tcl, the intent of this chapter is to give you some idea of
3510 how the Tcl scripts work.
3512 This chapter is written with two audiences in mind. (1) OpenOCD users
3513 who need to understand a bit more of how JIM-Tcl works so they can do
3514 something useful, and (2) those that want to add a new command to
3517 @section Tcl Rule #1
3518 There is a famous joke, it goes like this:
3520 @item Rule #1: The wife is always correct
3521 @item Rule #2: If you think otherwise, See Rule #1
3524 The Tcl equal is this:
3527 @item Rule #1: Everything is a string
3528 @item Rule #2: If you think otherwise, See Rule #1
3531 As in the famous joke, the consequences of Rule #1 are profound. Once
3532 you understand Rule #1, you will understand Tcl.
3534 @section Tcl Rule #1b
3535 There is a second pair of rules.
3537 @item Rule #1: Control flow does not exist. Only commands
3538 @* For example: the classic FOR loop or IF statement is not a control
3539 flow item, they are commands, there is no such thing as control flow
3541 @item Rule #2: If you think otherwise, See Rule #1
3542 @* Actually what happens is this: There are commands that by
3543 convention, act like control flow key words in other languages. One of
3544 those commands is the word ``for'', another command is ``if''.
3547 @section Per Rule #1 - All Results are strings
3548 Every Tcl command results in a string. The word ``result'' is used
3549 deliberatly. No result is just an empty string. Remember: @i{Rule #1 -
3550 Everything is a string}
3552 @section Tcl Quoting Operators
3553 In life of a Tcl script, there are two important periods of time, the
3554 difference is subtle.
3557 @item Evaluation Time
3560 The two key items here are how ``quoted things'' work in Tcl. Tcl has
3561 three primary quoting constructs, the [square-brackets] the
3562 @{curly-braces@} and ``double-quotes''
3564 By now you should know $VARIABLES always start with a $DOLLAR
3565 sign. BTW: To set a variable, you actually use the command ``set'', as
3566 in ``set VARNAME VALUE'' much like the ancient BASIC langauge ``let x
3567 = 1'' statement, but without the equal sign.
3570 @item @b{[square-brackets]}
3571 @* @b{[square-brackets]} are command substitutions. It operates much
3572 like Unix Shell `back-ticks`. The result of a [square-bracket]
3573 operation is exactly 1 string. @i{Remember Rule #1 - Everything is a
3574 string}. These two statements are roughly identical:
3578 echo "The Date is: $X"
3581 puts "The Date is: $X"
3583 @item @b{``double-quoted-things''}
3584 @* @b{``double-quoted-things''} are just simply quoted
3585 text. $VARIABLES and [square-brackets] are expanded in place - the
3586 result however is exactly 1 string. @i{Remember Rule #1 - Everything
3590 puts "It is now \"[date]\", $x is in 1 hour"
3592 @item @b{@{Curly-Braces@}}
3593 @*@b{@{Curly-Braces@}} are magic: $VARIABLES and [square-brackets] are
3594 parsed, but are NOT expanded or executed. @{Curly-Braces@} are like
3595 'single-quote' operators in BASH shell scripts, with the added
3596 feature: @{curly-braces@} can be nested, single quotes can not. @{@{@{this is
3597 nested 3 times@}@}@} NOTE: [date] is perhaps a bad example, as of
3598 28/nov/2008, Jim/OpenOCD does not have a date command.
3601 @section Consequences of Rule 1/2/3/4
3603 The consequences of Rule 1 are profound.
3605 @subsection Tokenisation & Execution.
3607 Of course, whitespace, blank lines and #comment lines are handled in
3610 As a script is parsed, each (multi) line in the script file is
3611 tokenised and according to the quoting rules. After tokenisation, that
3612 line is immedatly executed.
3614 Multi line statements end with one or more ``still-open''
3615 @{curly-braces@} which - eventually - closes a few lines later.
3617 @subsection Command Execution
3619 Remember earlier: There are no ``control flow''
3620 statements in Tcl. Instead there are COMMANDS that simply act like
3621 control flow operators.
3623 Commands are executed like this:
3626 @item Parse the next line into (argc) and (argv[]).
3627 @item Look up (argv[0]) in a table and call its function.
3628 @item Repeat until End Of File.
3631 It sort of works like this:
3634 ReadAndParse( &argc, &argv );
3636 cmdPtr = LookupCommand( argv[0] );
3638 (*cmdPtr->Execute)( argc, argv );
3642 When the command ``proc'' is parsed (which creates a procedure
3643 function) it gets 3 parameters on the command line. @b{1} the name of
3644 the proc (function), @b{2} the list of parameters, and @b{3} the body
3645 of the function. Not the choice of words: LIST and BODY. The PROC
3646 command stores these items in a table somewhere so it can be found by
3649 @subsection The FOR command
3651 The most interesting command to look at is the FOR command. In Tcl,
3652 the FOR command is normally implemented in C. Remember, FOR is a
3653 command just like any other command.
3655 When the ascii text containing the FOR command is parsed, the parser
3656 produces 5 parameter strings, @i{(If in doubt: Refer to Rule #1)} they
3660 @item The ascii text 'for'
3661 @item The start text
3662 @item The test expression
3667 Sort of reminds you of ``main( int argc, char **argv )'' does it not?
3668 Remember @i{Rule #1 - Everything is a string.} The key point is this:
3669 Often many of those parameters are in @{curly-braces@} - thus the
3670 variables inside are not expanded or replaced until later.
3672 Remember that every Tcl command looks like the classic ``main( argc,
3673 argv )'' function in C. In JimTCL - they actually look like this:
3677 MyCommand( Jim_Interp *interp,
3679 Jim_Obj * const *argvs );
3682 Real Tcl is nearly identical. Although the newer versions have
3683 introduced a byte-code parser and intepreter, but at the core, it
3684 still operates in the same basic way.
3686 @subsection FOR command implementation
3688 To understand Tcl it is perhaps most helpful to see the FOR
3689 command. Remember, it is a COMMAND not a control flow structure.
3691 In Tcl there are two underlying C helper functions.
3693 Remember Rule #1 - You are a string.
3695 The @b{first} helper parses and executes commands found in an ascii
3696 string. Commands can be seperated by semicolons, or newlines. While
3697 parsing, variables are expanded via the quoting rules.
3699 The @b{second} helper evaluates an ascii string as a numerical
3700 expression and returns a value.
3702 Here is an example of how the @b{FOR} command could be
3703 implemented. The pseudo code below does not show error handling.
3705 void Execute_AsciiString( void *interp, const char *string );
3707 int Evaluate_AsciiExpression( void *interp, const char *string );
3710 MyForCommand( void *interp,
3715 SetResult( interp, "WRONG number of parameters");
3719 // argv[0] = the ascii string just like C
3721 // Execute the start statement.
3722 Execute_AsciiString( interp, argv[1] );
3726 i = Evaluate_AsciiExpression(interp, argv[2]);
3731 Execute_AsciiString( interp, argv[3] );
3733 // Execute the LOOP part
3734 Execute_AsciiString( interp, argv[4] );
3738 SetResult( interp, "" );
3743 Every other command IF, WHILE, FORMAT, PUTS, EXPR, everything works
3744 in the same basic way.
3746 @section OpenOCD Tcl Usage
3748 @subsection source and find commands
3749 @b{Where:} In many configuration files
3750 @* Example: @b{ source [find FILENAME] }
3751 @*Remember the parsing rules
3753 @item The FIND command is in square brackets.
3754 @* The FIND command is executed with the parameter FILENAME. It should
3755 find the full path to the named file. The RESULT is a string, which is
3756 substituted on the orginal command line.
3757 @item The command source is executed with the resulting filename.
3758 @* SOURCE reads a file and executes as a script.
3760 @subsection format command
3761 @b{Where:} Generally occurs in numerous places.
3762 @* Tcl has no command like @b{printf()}, instead it has @b{format}, which is really more like
3768 puts [format "The answer: %d" [expr $x * $y]]
3771 @item The SET command creates 2 variables, X and Y.
3772 @item The double [nested] EXPR command performs math
3773 @* The EXPR command produces numerical result as a string.
3775 @item The format command is executed, producing a single string
3776 @* Refer to Rule #1.
3777 @item The PUTS command outputs the text.
3779 @subsection Body or Inlined Text
3780 @b{Where:} Various TARGET scripts.
3783 proc someproc @{@} @{
3784 ... multiple lines of stuff ...
3786 $_TARGETNAME configure -event FOO someproc
3787 #2 Good - no variables
3788 $_TARGETNAME confgure -event foo "this ; that;"
3789 #3 Good Curly Braces
3790 $_TARGETNAME configure -event FOO @{
3793 #4 DANGER DANGER DANGER
3794 $_TARGETNAME configure -event foo "puts \"Time: [date]\""
3797 @item The $_TARGETNAME is an OpenOCD variable convention.
3798 @*@b{$_TARGETNAME} represents the last target created, the value changes
3799 each time a new target is created. Remember the parsing rules. When
3800 the ascii text is parsed, the @b{$_TARGETNAME} becomes a simple string,
3801 the name of the target which happens to be a TARGET (object)
3803 @item The 2nd parameter to the @option{-event} parameter is a TCBODY
3804 @*There are 4 examples:
3806 @item The TCLBODY is a simple string that happens to be a proc name
3807 @item The TCLBODY is several simple commands seperated by semicolons
3808 @item The TCLBODY is a multi-line @{curly-brace@} quoted string
3809 @item The TCLBODY is a string with variables that get expanded.
3812 In the end, when the target event FOO occurs the TCLBODY is
3813 evaluated. Method @b{#1} and @b{#2} are functionally identical. For
3814 Method @b{#3} and @b{#4} it is more interesting. What is the TCLBODY?
3816 Remember the parsing rules. In case #3, @{curly-braces@} mean the
3817 $VARS and [square-brackets] are expanded later, when the EVENT occurs,
3818 and the text is evaluated. In case #4, they are replaced before the
3819 ``Target Object Command'' is executed. This occurs at the same time
3820 $_TARGETNAME is replaced. In case #4 the date will never
3821 change. @{BTW: [date] is perhaps a bad example, as of 28/nov/2008,
3822 Jim/OpenOCD does not have a date command@}
3824 @subsection Global Variables
3825 @b{Where:} You might discover this when writing your own procs @* In
3826 simple terms: Inside a PROC, if you need to access a global variable
3827 you must say so. See also ``upvar''. Example:
3829 proc myproc @{ @} @{
3830 set y 0 #Local variable Y
3831 global x #Global variable X
3832 puts [format "X=%d, Y=%d" $x $y]
3835 @section Other Tcl Hacks
3836 @b{Dynamic variable creation}
3838 # Dynamically create a bunch of variables.
3839 for @{ set x 0 @} @{ $x < 32 @} @{ set x [expr $x + 1]@} @{
3841 set vn [format "BIT%d" $x]
3845 set $vn [expr (1 << $x)]
3848 @b{Dynamic proc/command creation}
3850 # One "X" function - 5 uart functions.
3851 foreach who @{A B C D E@}
3852 proc [format "show_uart%c" $who] @{ @} "show_UARTx $who"
3856 @node Target Library
3857 @chapter Target Library
3858 @cindex Target Library
3860 OpenOCD comes with a target configuration script library. These scripts can be
3861 used as-is or serve as a starting point.
3863 The target library is published together with the OpenOCD executable and
3864 the path to the target library is in the OpenOCD script search path.
3865 Similarly there are example scripts for configuring the JTAG interface.
3867 The command line below uses the example parport configuration script
3868 that ship with OpenOCD, then configures the str710.cfg target and
3869 finally issues the init and reset commands. The communication speed
3870 is set to 10kHz for reset and 8MHz for post reset.
3873 openocd -f interface/parport.cfg -f target/str710.cfg -c "init" -c "reset"
3876 To list the target scripts available:
3879 $ ls /usr/local/lib/openocd/target
3881 arm7_fast.cfg lm3s6965.cfg pxa255.cfg stm32.cfg xba_revA3.cfg
3882 at91eb40a.cfg lpc2148.cfg pxa255_sst.cfg str710.cfg zy1000.cfg
3883 at91r40008.cfg lpc2294.cfg sam7s256.cfg str912.cfg
3884 at91sam9260.cfg nslu2.cfg sam7x256.cfg wi-9c.cfg
3890 @comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
3891 @comment case issue with ``Index.html'' and ``index.html''
3892 @comment Occurs when creating ``--html --no-split'' output
3893 @comment This fix is based on: http://sourceware.org/ml/binutils/2006-05/msg00215.html
3894 @unnumbered OpenOCD Index