1 \input texinfo @c -*-texinfo-*-
3 @setfilename openocd.info
4 @settitle Open On-Chip Debugger (OpenOCD)
5 @dircategory Development
8 * OpenOCD: (openocd). Open On-Chip Debugger.
17 @item Copyright @copyright{} 2008 The OpenOCD Project
18 @item Copyright @copyright{} 2007-2008 Spencer Oliver @email{spen@@spen-soft.co.uk}
19 @item Copyright @copyright{} 2008 Oyvind Harboe @email{oyvind.harboe@@zylin.com}
20 @item Copyright @copyright{} 2008 Duane Ellis @email{openocd@@duaneellis.com}
24 Permission is granted to copy, distribute and/or modify this document
25 under the terms of the GNU Free Documentation License, Version 1.2 or
26 any later version published by the Free Software Foundation; with no
27 Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
28 Texts. A copy of the license is included in the section entitled ``GNU
29 Free Documentation License''.
34 @title Open On-Chip Debugger (OpenOCD)
35 @subtitle Edition @value{EDITION} for OpenOCD version @value{VERSION}
36 @subtitle @value{UPDATED}
38 @vskip 0pt plus 1filll
45 @node Top, About, , (dir)
48 This manual documents edition @value{EDITION} of the Open On-Chip Debugger
49 (OpenOCD) version @value{VERSION}, @value{UPDATED}.
54 * About:: About OpenOCD.
55 * Developers:: OpenOCD developers
56 * Building:: Building OpenOCD
57 * JTAG Hardware Dongles:: JTAG Hardware Dongles
58 * Running:: Running OpenOCD
59 * Simple Configuration Files:: Simple Configuration Files
60 * Config File Guidelines:: Config File Guidelines
61 * About JIM-Tcl:: About JIM-Tcl
62 * Daemon Configuration:: Daemon Configuration
63 * Interface - Dongle Configuration:: Interface - Dongle Configuration
64 * Reset Configuration:: Reset Configuration
65 * Tap Creation:: Tap Creation
66 * Target Configuration:: Target Configuration
67 * Flash Configuration:: Flash Configuration
68 * General Commands:: General Commands
69 * JTAG Commands:: JTAG Commands
70 * Sample Scripts:: Sample Target Scripts
72 * GDB and OpenOCD:: Using GDB and OpenOCD
73 * TCL scripting API:: Tcl scripting API
74 * Upgrading:: Deprecated/Removed Commands
75 * Target library:: Target library
76 * FAQ:: Frequently Asked Questions
77 * TCL Crash Course:: TCL Crash Course
78 * License:: GNU Free Documentation License
79 @comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
80 @comment case issue with ``Index.html'' and ``index.html''
81 @comment Occurs when creating ``--html --no-split'' output
82 @comment This fix is based on: http://sourceware.org/ml/binutils/2006-05/msg00215.html
83 * OpenOCD Index:: Main index.
90 The Open On-Chip Debugger (OpenOCD) aims to provide debugging,
91 in-system programming and boundary-scan testing for embedded target
94 @b{JTAG:} OpenOCD uses a ``hardware interface dongle'' to communicate
95 with the JTAG (IEEE 1149.1) complient taps on your target board.
97 @b{Dongles:} OpenOCD currently many types of hardware dongles: USB
98 Based, Parallel Port Based, and other standalone boxes that run
99 OpenOCD internally. See the section titled: @xref{JTAG Hardware Dongles}.
101 @b{GDB Debug:} It allows ARM7 (ARM7TDMI and ARM720t), ARM9 (ARM920t,
102 ARM922t, ARM926ej--s, ARM966e--s), XScale (PXA25x, IXP42x) and
103 Cortex-M3 (Luminary Stellaris LM3 and ST STM32) based cores to be
104 debugged via the GDB Protocol.
106 @b{Flash Programing:} Flash writing is supported for external CFI
107 compatible flashes (Intel and AMD/Spansion command set) and several
108 internal flashes (LPC2000, AT91SAM7, STR7x, STR9x, LM3 and
109 STM32x). Preliminary support for using the LPC3180's NAND flash
110 controller is included.
116 OpenOCD was created by Dominic Rath as part of a diploma thesis written at the
117 University of Applied Sciences Augsburg (@uref{http://www.fh-augsburg.de}).
118 Others interested in improving the state of free and open debug and testing technology
119 are welcome to participate.
121 Other developers have contributed support for additional targets and flashes as well
122 as numerous bugfixes and enhancements. See the AUTHORS file for regular contributors.
124 The main OpenOCD web site is available at @uref{http://openocd.berlios.de/web/}
128 @cindex building OpenOCD
130 @section Pre-Built Tools
131 If you are interested in getting actual work done rather than building
132 OpenOCD, then check if your interface supplier provides binaries for
133 you. Chances are that that binary is from some SVN version that is more
134 stable than SVN trunk where bleeding edge development takes place.
136 @section Packagers Please Read!
138 If you are a @b{PACKAGER} of OpenOCD if you
141 @item @b{Sell dongles} and include pre-built binaries
142 @item @b{Supply tools} ie: A complete development solution
143 @item @b{Supply IDEs} like Eclipse, or RHIDE, etc.
144 @item @b{Build packages} ie: RPM files, or DEB files for a Linux Distro
147 As a @b{PACKAGER} - you are at the top of the food chain. You solve
148 problems for downstream users. What you fix or solve - solves hundreds
149 if not thousands of user questions. If something does not work for you
150 please let us know. That said, would also like you to follow a few
154 @item @b{Always build with Printer Ports Enabled}
155 @item @b{Try where possible to use LIBFTDI + LIBUSB} You cover more bases
158 It is your decision..
161 @item @b{Why YES to LIBFTDI + LIBUSB}
163 @item @b{LESS} work - libusb perhaps already there
164 @item @b{LESS} work - identical code multiple platforms
165 @item @b{MORE} dongles are supported
166 @item @b{MORE} platforms are supported
167 @item @b{MORE} complete solution
169 @item @b{Why not LIBFTDI + LIBUSB} (ie: ftd2xx instead)
171 @item @b{LESS} Some say it is slower.
172 @item @b{LESS} complex to distribute (external dependencies)
176 @section Building From Source
178 You can download the current SVN version with SVN client of your choice from the
179 following repositories:
181 (@uref{svn://svn.berlios.de/openocd/trunk})
185 (@uref{http://svn.berlios.de/svnroot/repos/openocd/trunk})
187 Using the SVN command line client, you can use the following command to fetch the
188 latest version (make sure there is no (non-svn) directory called "openocd" in the
192 svn checkout svn://svn.berlios.de/openocd/trunk openocd
195 Building OpenOCD requires a recent version of the GNU autotools.
196 On my build system, I'm using autoconf 2.13 and automake 1.9. For building on Windows,
197 you have to use Cygwin. Make sure that your @env{PATH} environment variable contains no
198 other locations with Unix utils (like UnxUtils) - these can't handle the Cygwin
199 paths, resulting in obscure dependency errors (This is an observation I've gathered
200 from the logs of one user - correct me if I'm wrong).
202 You further need the appropriate driver files, if you want to build support for
203 a FTDI FT2232 based interface:
205 @item @b{ftdi2232} libftdi (@uref{http://www.intra2net.com/opensource/ftdi/})
206 @item @b{ftd2xx} libftd2xx (@uref{http://www.ftdichip.com/Drivers/D2XX.htm})
207 @item When using the Amontec JTAGkey, you have to get the drivers from the Amontec
208 homepage (@uref{www.amontec.com}), as the JTAGkey uses a non-standard VID/PID.
211 libftdi is supported under windows. Do not use versions earlier then 0.14.
213 In general, the D2XX driver provides superior performance (several times as fast),
214 but has the draw-back of being binary-only - though that isn't that bad, as it isn't
215 a kernel module, only a user space library.
217 To build OpenOCD (on both Linux and Cygwin), use the following commands:
221 Bootstrap generates the configure script, and prepares building on your system.
223 ./configure [options, see below]
225 Configure generates the Makefiles used to build OpenOCD.
230 Make builds OpenOCD, and places the final executable in ./src/, the last step, ``make install'' is optional.
232 The configure script takes several options, specifying which JTAG interfaces
237 @option{--enable-parport} - Bit bang pc printer ports.
239 @option{--enable-parport_ppdev} - Parallel Port [see below]
241 @option{--enable-parport_giveio} - Parallel Port [see below]
243 @option{--enable-amtjtagaccel} - Parallel Port [Amontec, see below]
245 @option{--enable-ft2232_ftd2xx} - Numerous USB Type ARM JTAG dongles use the FT2232C chip from this FTDICHIP.COM chip (closed source).
247 @option{--enable-ft2232_libftdi} - An open source (free) alternate to FTDICHIP.COM ftd2xx solution (Linux, MacOS, Cygwin)
249 @option{--with-ftd2xx-win32-zipdir=PATH} - If using FTDICHIP.COM ft2232c, point at the directory where the Win32 FTDICHIP.COM 'CDM' driver zip file was unpacked.
251 @option{--with-ftd2xx-linux-tardir=PATH} - Linux only equal of @option{--with-ftd2xx-win32-zipdir}, where you unpacked the TAR.GZ file.
253 @option{--with-ftd2xx-lib=shared|static} - Linux only. Default: static, specifies how the FTDICHIP.COM libftd2xx driver should be linked. Note 'static' only works in conjunction with @option{--with-ftd2xx-linux-tardir}. Shared is supported (12/26/2008), however you must manually install the required header files and shared libraries in an appropriate place. This uses ``libusb'' internally.
255 @option{--enable-gw16012}
257 @option{--enable-usbprog}
259 @option{--enable-presto_libftdi}
261 @option{--enable-presto_ftd2xx}
263 @option{--enable-jlink} - From SEGGER
265 @option{--enable-vsllink}
267 @option{--enable-rlink} - Raisonance.com dongle.
270 @section Parallel Port Dongles
272 If you want to access the parallel port using the PPDEV interface you have to specify
273 both the @option{--enable-parport} AND the @option{--enable-parport_ppdev} option since
274 the @option{--enable-parport_ppdev} option actually is an option to the parport driver
275 (see @uref{http://forum.sparkfun.com/viewtopic.php?t=3795} for more info).
277 @section FT2232C Based USB Dongles
279 There are 2 methods of using the FTD2232, either (1) using the
280 FTDICHIP.COM closed source driver, or (2) the open (and free) driver
281 libftdi. Some claim the (closed) FTDICHIP.COM solution is faster.
283 The FTDICHIP drivers come as either a (win32) ZIP file, or a (linux)
284 TAR.GZ file. You must unpack them ``some where'' convient. As of this
285 writing (12/26/2008) FTDICHIP does not supply means to install these
286 files ``in an appropriate place'' As a result, there are two
287 ``./configure'' options that help.
289 Below is an example build process:
291 1) Check out the latest version of ``openocd'' from SVN.
293 2) Download & Unpack either the Windows or Linux FTD2xx Drivers
294 (@uref{http://www.ftdichip.com/Drivers/D2XX.htm})
297 /home/duane/ftd2xx.win32 => the Cygwin/Win32 ZIP file contents.
298 /home/duane/libftd2xx0.4.16 => the Linux TAR file contents.
301 3) Configure with these options:
304 Cygwin FTCICHIP solution
305 ./configure --prefix=/home/duane/mytools \
306 --enable-ft2232_ftd2xx \
307 --with-ftd2xx-win32-zipdir=/home/duane/ftd2xx.win32
309 Linux FTDICHIP solution
310 ./configure --prefix=/home/duane/mytools \
311 --enable-ft2232_ftd2xx \
312 --with-ft2xx-linux-tardir=/home/duane/libftd2xx0.4.16
314 Cygwin/Linux LIBFTDI solution
316 1a) For Windows: The windows port of LIBUSB is in place.
317 1b) For Linux: libusb has been built and is inplace.
319 2) And libftdi has been built and installed
320 Note: libftdi - relies upon libusb.
322 ./configure --prefix=/home/duane/mytools \
323 --enable-ft2232_libftdi
327 4) Then just type ``make'', and perhaps ``make install''.
330 @section Miscellaneous configure options
334 @option{--enable-gccwarnings} - enable extra gcc warnings during build.
337 @option{--enable-release} - enable building of a openocd release, generally
338 this is for developers. It simply omits the svn version string when the
339 openocd @option{-v} is executed.
342 @node JTAG Hardware Dongles
343 @chapter JTAG Hardware Dongles
352 Defined: @b{dongle}: A small device that plugins into a computer and serves as
353 an adapter .... [snip]
355 In the OpenOCD case, this generally refers to @b{a small adapater} one
356 attaches to your computer via USB or the Parallel Printer Port. The
357 execption being the Zylin ZY1000 which is a small box you attach via
361 @section Choosing a Dongle
363 There are three things you should keep in mind when choosing a dongle.
366 @item @b{Voltage} What voltage is your target? 1.8, 2.8, 3.3, or 5V? Does your dongle support it?
367 @item @b{Connection} Printer Ports - Does your computer have one?
368 @item @b{Connection} Is that long printer bit-bang cable practical?
369 @item @b{RTCK} Do you require RTCK? Also known as ``adaptive clocking''
372 @section Stand alone Systems
374 @b{ZY1000} See: @url{http://www.zylin.com/zy1000.html} Technically, not a
375 dongle, but a standalone box.
377 @section USB FT2232 Based
379 There are many USB jtag dongles on the market, many of them are based
380 on a chip from ``Future Technology Devices International'' (FTDI)
381 known as the FTDI FT2232.
383 See: @url{http://www.ftdichip.com} or @url{http://www.ftdichip.com/Products/FT2232H.htm}
385 As of 28/Nov/2008, the following are supported:
389 @* Link @url{http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html}
391 @* See: @url{http://www.amontec.com/jtagkey.shtml}
393 @* See: @url{http://www.oocdlink.com} By Joern Kaipf
395 @* See: @url{http://www.signalyzer.com}
396 @item @b{evb_lm3s811}
397 @* See: @url{http://www.luminarymicro.com} - The Luminary Micro Stellaris LM3S811 eval board has an FTD2232C chip built in.
398 @item @b{olimex-jtag}
399 @* See: @url{http://www.olimex.com}
401 @* See: @url{http://www.tincantools.com}
402 @item @b{turtelizer2}
403 @* See: @url{http://www.ethernut.de}, or @url{http://www.ethernut.de/en/hardware/turtelizer/index.html}
405 @* Link: @url{http://www.hitex.com/index.php?id=383}
407 @* Link @url{http://www.hitex.com/stm32-stick}
408 @item @b{axm0432_jtag}
409 @* Axiom AXM-0432 Link @url{http://www.axman.com}
412 @section USB JLINK based
413 There are several OEM versions of the Segger @b{JLINK} adapter. It is
414 an example of a micro controller based JTAG adapter, it uses an
415 AT91SAM764 internally.
418 @item @b{ATMEL SAMICE} Only works with ATMEL chips!
419 @* Link: @url{http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3892}
420 @item @b{SEGGER JLINK}
421 @* Link: @url{http://www.segger.com/jlink.html}
423 @* Link: @url{http://www.iar.com/website1/1.0.1.0/369/1/index.php}
426 @section USB RLINK based
427 Raisonance has an adapter called @b{RLink}. It exists in a stripped-down form on the STM32 Primer, permanently attached to the JTAG lines. It also exists on the STM32 Primer2, but that is wired for SWD and not JTAG, thus not supported.
430 @item @b{Raisonance RLink}
431 @* Link: @url{http://www.raisonance.com/products/RLink.php}
432 @item @b{STM32 Primer}
433 @* Link: @url{http://www.stm32circle.com/resources/stm32primer.php}
434 @item @b{STM32 Primer2}
435 @* Link: @url{http://www.stm32circle.com/resources/stm32primer2.php}
441 @* Link: @url{http://www.embedded-projects.net/usbprog} - which uses an Atmel MEGA32 and a UBN9604
443 @item @b{USB - Presto}
444 @* Link: @url{http://tools.asix.net/prg_presto.htm}
446 @item @b{Versaloon-Link}
447 @* Link: @url{http://www.simonqian.com/en/Versaloon}
450 @section IBM PC Parallel Printer Port Based
452 The two well known ``JTAG Parallel Ports'' cables are the Xilnx DLC5
453 and the MacGraigor Wiggler. There are many clones and variations of
458 @item @b{Wiggler} - There are many clones of this.
459 @* Link: @url{http://www.macraigor.com/wiggler.htm}
461 @item @b{DLC5} - From XILINX - There are many clones of this
462 @* Link: Search the web for: ``XILINX DLC5'' - it is no longer
463 produced, PDF schematics are easily found and it is easy to make.
465 @item @b{Amontec - JTAG Accelerator}
466 @* Link: @url{http://www.amontec.com/jtag_accelerator.shtml}
469 @* Link: @url{http://www.gateworks.com/products/avila_accessories/gw16042.php}
472 @* Link: @url{http://www.ccac.rwth-aachen.de/~michaels/index.php/hardware/armjtag}
474 @item @b{Wiggler_ntrst_inverted}
475 @* Yet another variation - See the source code, src/jtag/parport.c
477 @item @b{old_amt_wiggler}
478 @* Unknown - probably not on the market today
481 @* Link: Most likely @url{http://www.olimex.com/dev/arm-jtag.html} [another wiggler clone]
484 @* Link: @url{http://www.amontec.com/chameleon.shtml}
490 @* ispDownload from Lattice Semiconductor @url{http://www.latticesemi.com/lit/docs/devtools/dlcable.pdf}
493 @* From ST Microsystems, link:
494 @url{http://www.st.com/stonline/products/literature/um/7889.pdf}
495 Title: FlashLINK JTAG programing cable for PSD and uPSD
503 @* An EP93xx based linux machine using the GPIO pins directly.
506 @* Like the EP93xx - but an ATMEL AT91RM9200 based solution using the GPIO pins on the chip.
512 @cindex running OpenOCD
514 @cindex --debug_level
518 The @option{--help} option shows:
522 --help | -h display this help
523 --version | -v display OpenOCD version
524 --file | -f use configuration file <name>
525 --search | -s dir to search for config files and scripts
526 --debug | -d set debug level <0-3>
527 --log_output | -l redirect log output to file <name>
528 --command | -c run <command>
529 --pipe | -p use pipes when talking to gdb
532 By default OpenOCD reads the file configuration file ``openocd.cfg''
533 in the current directory. To specify a different (or multiple)
534 configuration file, you can use the ``-f'' option. For example:
537 openocd -f config1.cfg -f config2.cfg -f config3.cfg
540 Once started, OpenOCD runs as a daemon, waiting for connections from
541 clients (Telnet, GDB, Other).
543 If you are having problems, you can enable internal debug messages via
546 Also it is possible to interleave commands w/config scripts using the
547 @option{-c} command line switch.
549 To enable debug output (when reporting problems or working on OpenOCD
550 itself), use the @option{-d} command line switch. This sets the
551 @option{debug_level} to "3", outputting the most information,
552 including debug messages. The default setting is "2", outputting only
553 informational messages, warnings and errors. You can also change this
554 setting from within a telnet or gdb session using @option{debug_level
555 <n>} @xref{debug_level}.
557 You can redirect all output from the daemon to a file using the
558 @option{-l <logfile>} switch.
560 Search paths for config/script files can be added to OpenOCD by using
561 the @option{-s <search>} switch. The current directory and the OpenOCD
562 target library is in the search path by default.
564 For details on the @option{-p} option. @xref{Connecting to GDB}.
566 Note! OpenOCD will launch the GDB & telnet server even if it can not
567 establish a connection with the target. In general, it is possible for
568 the JTAG controller to be unresponsive until the target is set up
569 correctly via e.g. GDB monitor commands in a GDB init script.
571 @node Simple Configuration Files
572 @chapter Simple Configuration Files
573 @cindex configuration
576 There are 4 basic ways of ``configurating'' OpenOCD to run, they are:
579 @item A small openocd.cfg file which ``sources'' other configuration files
580 @item A monolithic openocd.cfg file
581 @item Many -f filename options on the command line
582 @item Your Mixed Solution
585 @section Small configuration file method
587 This is the prefered method, it is simple and is works well for many
588 people. The developers of OpenOCD would encourage you to use this
589 method. If you create a new configuration please email new
590 configurations to the development list.
592 Here is an example of an openocd.cfg file for an ATMEL at91sam7x256
595 source [find interface/signalyzer.cfg]
597 # Change the default telnet port...
601 # GDB can also flash my flash!
602 gdb_memory_map enable
603 gdb_flash_program enable
605 source [find target/sam7x256.cfg]
608 There are many example configuration scripts you can work with. You
609 should look in the directory: @t{$(INSTALLDIR)/lib/openocd}. You
613 @item @b{board} - eval board level configurations
614 @item @b{interface} - specific dongle configurations
615 @item @b{target} - the target chips
616 @item @b{tcl} - helper scripts
617 @item @b{xscale} - things specific to the xscale.
620 Look first in the ``boards'' area, then the ``targets'' area. Often a board
621 configuration is a good example to work from.
623 @section Many -f filename options
624 Some believe this is a wonderful solution, others find it painful.
626 You can use a series of ``-f filename'' options on the command line,
627 OpenOCD will read each filename in sequence, for example:
630 openocd -f file1.cfg -f file2.cfg -f file2.cfg
633 You can also intermix various commands with the ``-c'' command line
636 @section Monolithic file
637 The ``Monolithic File'' dispenses with all ``source'' statements and
638 puts everything in one self contained (monolithic) file. This is not
641 Please try to ``source'' various files or use the multiple -f
644 @section Advice for you
645 Often, one uses a ``mixed approach''. Where possible, please try to
646 ``source'' common things, and if needed cut/paste parts of the
647 standard distribution configuration files as needed.
649 @b{REMEMBER:} The ``important parts'' of your configuration file are:
652 @item @b{Interface} - Defines the dongle
653 @item @b{Taps} - Defines the JTAG Taps
654 @item @b{GDB Targets} - What GDB talks to
655 @item @b{Flash Programing} - Very Helpful
658 Some key things you should look at and understand are:
661 @item The RESET configuration of your debug environment as a hole
662 @item Is there a ``work area'' that OpenOCD can use?
663 @* For ARM - work areas mean up to 10x faster downloads.
664 @item For MMU/MPU based ARM chips (ie: ARM9 and later) will that work area still be available?
665 @item For complex targets (multiple chips) the JTAG SPEED becomes an issue.
670 @node Config File Guidelines
671 @chapter Config File Guidelines
673 This section/chapter is aimed at developers and integrators of
674 OpenOCD. These are guidelines for creating new boards and new target
675 configurations as of 28/Nov/2008.
677 However, you the user of OpenOCD should be some what familiar with
678 this section as it should help explain some of the internals of what
679 you might be looking at.
681 The user should find under @t{$(INSTALLDIR)/lib/openocd} the
682 following directories:
686 @*Think JTAG Dongle. Files that configure the jtag dongle go here.
688 @* Thing Circuit Board, PWA, PCB, they go by many names. Board files
689 contain initialization items that are specific to a board - for
690 example: The SDRAM initialization sequence for the board, or the type
691 of external flash and what address it is found at. Any initialization
692 sequence to enable that external flash or sdram should be found in the
693 board file. Boards may also contain multiple targets, ie: Two cpus, or
694 a CPU and an FPGA or CPLD.
696 @* Think CHIP. The ``target'' directory represents a jtag tap (or
697 chip) OpenOCD should control, not a board. Two common types of targets
698 are ARM chips and FPGA or CPLD chips.
701 @b{If needed...} The user in their ``openocd.cfg'' file or the board
702 file might override a specific feature in any of the above files by
703 setting a variable or two before sourcing the target file. Or adding
704 various commands specific to their situation.
706 @section Interface Config Files
708 The user should be able to source one of these files via a command like this:
711 source [find interface/FOOBAR.cfg]
713 openocd -f interface/FOOBAR.cfg
716 A preconfigured interface file should exist for every interface in use
717 today, that said, perhaps some interfaces have only been used by the
718 sole developer who created it.
720 @b{FIXME/NOTE:} We need to add support for a variable like TCL variable
721 tcl_platform(platform), it should be called jim_platform (because it
722 is jim, not real tcl) and it should contain 1 of 3 words: ``linux'',
723 ``cygwin'' or ``mingw''
725 Interface files should be found in @t{$(INSTALLDIR)/lib/openocd/interface}
727 @section Board Config Files
729 @b{Note: BOARD directory NEW as of 28/nov/2008}
731 The user should be able to source one of these files via a command like this:
734 source [find board/FOOBAR.cfg]
736 openocd -f board/FOOBAR.cfg
740 The board file should contain one or more @t{source [find
741 target/FOO.cfg]} statements along with any board specific things.
743 In summery the board files should contain (if present)
746 @item External flash configuration (ie: the flash on CS0)
747 @item SDRAM configuration (size, speed, etc)
748 @item Board specific IO configuration (ie: GPIO pins might disable a 2nd flash)
749 @item Multiple TARGET source statements
750 @item All things that are not ``inside a chip''
751 @item Things inside a chip go in a 'target' file
754 @section Target Config Files
756 The user should be able to source one of these files via a command like this:
759 source [find target/FOOBAR.cfg]
761 openocd -f target/FOOBAR.cfg
764 In summery the target files should contain
769 @item Reset Configuration
771 @item CPU/Chip/CPU-Core Specific features
775 @subsection Important variable names
777 By default, the end user should never need to set these
778 variables. However, if the user needs to override a setting they only
779 need to set the variable in a simple way.
783 @* This gives a name to the overall chip, and is used as part of the
784 tap identifier dotted name.
786 @* By default little - unless the chip or board is not normally used that way.
788 @* When OpenOCD examines the JTAG chain, it will attempt to identify
789 every chip. If the @t{-expected-id} is nonzero, OpenOCD attempts
790 to verify the tap id number verses configuration file and may issue an
791 error or warning like this. The hope is this will help pin point
792 problem OpenOCD configurations.
795 Info: JTAG tap: sam7x256.cpu tap/device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)
796 Error: ERROR: Tap: sam7x256.cpu - Expected id: 0x12345678, Got: 0x3f0f0f0f
797 Error: ERROR: expected: mfg: 0x33c, part: 0x2345, ver: 0x1
798 Error: ERROR: got: mfg: 0x787, part: 0xf0f0, ver: 0x3
801 @item @b{_TARGETNAME}
802 @* By convention, this variable is created by the target configuration
803 script. The board configuration file may make use of this variable to
804 configure things like a ``reset init'' script, or other things
805 specific to that board and that target.
807 If the chip has 2 targets, use the names @b{_TARGETNAME0},
808 @b{_TARGETNAME1}, ... etc.
810 @b{Remember:} The ``board file'' may include multiple targets.
812 At no time should the name ``target0'' (the default target name if
813 none was specified) be used. The name ``target0'' is a hard coded name
814 - the next target on the board will be some other number.
816 The user (or board file) should reasonably be able to:
819 source [find target/FOO.cfg]
820 $_TARGETNAME configure ... FOO specific parameters
822 source [find target/BAR.cfg]
823 $_TARGETNAME configure ... BAR specific parameters
828 @subsection TCL Variables Guide Line
829 The Full Tcl/Tk language supports ``namespaces'' - JIM-Tcl does not.
831 Thus the rule we follow in OpenOCD is this: Variables that begin with
832 a leading underscore are temporal in nature, and can be modified and
833 used at will within a ?TARGET? configuration file
835 @b{EXAMPLE:} The user should be able to do this:
839 # PXA270 #1 network side, big endian
840 # PXA270 #2 video side, little endian
844 source [find target/pxa270.cfg]
845 # variable: _TARGETNAME = network.cpu
846 # other commands can refer to the "network.cpu" tap.
847 $_TARGETNAME configure .... params for this cpu..
851 source [find target/pxa270.cfg]
852 # variable: _TARGETNAME = video.cpu
853 # other commands can refer to the "video.cpu" tap.
854 $_TARGETNAME configure .... params for this cpu..
858 source [find target/spartan3.cfg]
860 # Since $_TARGETNAME is temporal..
861 # these names still work!
862 network.cpu configure ... params
863 video.cpu configure ... params
867 @subsection Default Value Boiler Plate Code
869 All target configuration files should start with this (or a modified form)
873 if @{ [info exists CHIPNAME] @} @{
874 set _CHIPNAME $CHIPNAME
876 set _CHIPNAME sam7x256
879 if @{ [info exists ENDIAN] @} @{
885 if @{ [info exists CPUTAPID ] @} @{
886 set _CPUTAPID $CPUTAPID
888 set _CPUTAPID 0x3f0f0f0f
893 @subsection Creating Taps
894 After the ``defaults'' are choosen, [see above], the taps are created.
896 @b{SIMPLE example:} such as an Atmel AT91SAM7X256
900 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
901 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
906 This is an SNIP/example for an STR912 - which has 3 internal taps. Key features shown:
909 @item @b{Unform tap names} - See: Tap Naming Convention
910 @item @b{_TARGETNAME} is created at the end where used.
914 if @{ [info exists FLASHTAPID ] @} @{
915 set _FLASHTAPID $FLASHTAPID
917 set _FLASHTAPID 0x25966041
919 jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID
921 if @{ [info exists CPUTAPID ] @} @{
922 set _CPUTAPID $CPUTAPID
924 set _CPUTAPID 0x25966041
926 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xf -irmask 0xe -expected-id $_CPUTAPID
929 if @{ [info exists BSTAPID ] @} @{
930 set _BSTAPID $BSTAPID
932 set _BSTAPID 0x1457f041
934 jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID
936 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
939 @b{Tap Naming Convention}
941 See the command ``jtag newtap'' for detail, but in breif the names you should use are:
949 @item @b{unknownN} - it happens :-(
952 @subsection Reset Configuration
954 Some chips have specific ways the TRST and SRST signals are
955 managed. If these are @b{CHIP SPECIFIC} they go here, if they are
956 @b{BOARD SPECIFIC} they go in the board file.
958 @subsection Work Areas
960 Work areas are small RAM areas used by OpenOCD to speed up downloads,
961 and to download small snippits of code to program flash chips.
963 If the chip includes an form of ``on-chip-ram'' - and many do - define
964 a reasonable work area and use the ``backup'' option.
966 @b{PROBLEMS:} On more complex chips, this ``work area'' may become
967 inaccessable if/when the application code enables or disables the MMU.
969 @subsection ARM Core Specific Hacks
971 If the chip has a DCC, enable it. If the chip is an arm9 with some
972 special high speed download - enable it.
974 If the chip has an ARM ``vector catch'' feature - by defeault enable
975 it for Undefined Instructions, Data Abort, and Prefetch Abort, if the
976 user is really writing a handler for those situations - they can
977 easily disable it. Experiance has shown the ``vector catch'' is
978 helpful - for common programing errors.
980 If present, the MMU, the MPU and the CACHE should be disabled.
982 @subsection Internal Flash Configuration
984 This applies @b{ONLY TO MICROCONTROLLERS} that have flash built in.
986 @b{Never ever} in the ``target configuration file'' define any type of
987 flash that is external to the chip. (For example the BOOT flash on
988 Chip Select 0). The BOOT flash information goes in a board file - not
989 the TARGET (chip) file.
993 @item at91sam7x256 - has 256K flash YES enable it.
994 @item str912 - has flash internal YES enable it.
995 @item imx27 - uses boot flash on CS0 - it goes in the board file.
996 @item pxa270 - again - CS0 flash - it goes in the board file.
1000 @chapter About JIM-Tcl
1004 OpenOCD includes a small ``TCL Interpreter'' known as JIM-TCL. You can
1005 learn more about JIM here: @url{http://jim.berlios.de}
1008 @item @b{JIM vrs TCL}
1009 @* JIM-TCL is a stripped down version of the well known Tcl language,
1010 which can be found here: @url{http://www.tcl.tk}. JIM-Tcl has far
1011 fewer features. JIM-Tcl is a single .C file and a single .H file and
1012 impliments the basic TCL command set along. In contrast: Tcl 8.6 is a
1013 4.2MEG zip file containing 1540 files.
1015 @item @b{Missing Features}
1016 @* Our practice has been: Add/clone the Real TCL feature if/when
1017 needed. We welcome JIM Tcl improvements, not bloat.
1020 @* OpenOCD configuration scripts are JIM Tcl Scripts. OpenOCD's
1021 command interpretor today (28/nov/2008) is a mixture of (newer)
1022 JIM-Tcl commands, and (older) the orginal command interpretor.
1025 @* At the OpenOCD telnet command line (or via the GDB mon command) one
1026 can type a Tcl for() loop, set variables, etc.
1028 @item @b{Historical Note}
1029 @* JIM-Tcl was introduced to OpenOCD in Spring 2008.
1031 @item @b{Need a Crash Course In TCL?}
1032 @* See: @xref{TCL Crash Course}.
1036 @node Daemon Configuration
1037 @chapter Daemon Configuration
1038 The commands here are commonly found in the openocd.cfg file and are
1039 used to specify what TCP/IP ports are used, and how GDB should be
1043 This command terminates the configuration stage and
1044 enters the normal command mode. This can be useful to add commands to
1045 the startup scripts and commands such as resetting the target,
1046 programming flash, etc. To reset the CPU upon startup, add "init" and
1047 "reset" at the end of the config script or at the end of the OpenOCD
1048 command line using the @option{-c} command line switch.
1050 If this command does not appear in any startup/configuration file
1051 OpenOCD executes the command for you after processing all
1052 configuration files and/or command line options.
1054 @b{NOTE:} This command normally occurs at or near the end of your
1055 openocd.cfg file to force OpenOCD to ``initialize'' and make the
1056 targets ready. For example: If your openocd.cfg file needs to
1057 read/write memory on your target - the init command must occur before
1058 the memory read/write commands.
1060 @section TCP/IP Ports
1062 @item @b{telnet_port} <@var{number}>
1064 @*Intended for a human. Port on which to listen for incoming telnet connections.
1066 @item @b{tcl_port} <@var{number}>
1068 @*Intended as a machine interface. Port on which to listen for
1069 incoming TCL syntax. This port is intended as a simplified RPC
1070 connection that can be used by clients to issue commands and get the
1071 output from the TCL engine.
1073 @item @b{gdb_port} <@var{number}>
1075 @*First port on which to listen for incoming GDB connections. The GDB port for the
1076 first target will be gdb_port, the second target will listen on gdb_port + 1, and so on.
1081 @item @b{gdb_breakpoint_override} <@var{hard|soft|disabled}>
1082 @cindex gdb_breakpoint_override
1083 @anchor{gdb_breakpoint_override}
1084 @*Force breakpoint type for gdb 'break' commands.
1085 The raison d'etre for this option is to support GDB GUI's without
1086 a hard/soft breakpoint concept where the default OpenOCD and
1087 GDB behaviour is not sufficient. Note that GDB will use hardware
1088 breakpoints if the memory map has been set up for flash regions.
1090 This option replaces older arm7_9 target commands that addressed
1093 @item @b{gdb_detach} <@var{resume|reset|halt|nothing}>
1095 @*Configures what OpenOCD will do when gdb detaches from the daeman.
1096 Default behaviour is <@var{resume}>
1098 @item @b{gdb_memory_map} <@var{enable|disable}>
1099 @cindex gdb_memory_map
1100 @*Set to <@var{enable}> to cause OpenOCD to send the memory configuration to gdb when
1101 requested. gdb will then know when to set hardware breakpoints, and program flash
1102 using the gdb load command. @option{gdb_flash_program enable} will also need enabling
1103 for flash programming to work.
1104 Default behaviour is <@var{enable}>
1105 @xref{gdb_flash_program}.
1107 @item @b{gdb_flash_program} <@var{enable|disable}>
1108 @cindex gdb_flash_program
1109 @anchor{gdb_flash_program}
1110 @*Set to <@var{enable}> to cause OpenOCD to program the flash memory when a
1111 vFlash packet is received.
1112 Default behaviour is <@var{enable}>
1113 @comment END GDB Items
1116 @node Interface - Dongle Configuration
1117 @chapter Interface - Dongle Configuration
1118 Interface commands are normally found in an interface configuration
1119 file which is sourced by your openocd.cfg file. These commands tell
1120 OpenOCD what type of JTAG dongle you have and how to talk to it.
1121 @section Simple Complete Interface Examples
1122 @b{A Turtelizer FT2232 Based JTAG Dongle}
1126 ft2232_device_desc "Turtelizer JTAG/RS232 Adapter A"
1127 ft2232_layout turtelizer2
1128 ft2232_vid_pid 0x0403 0xbdc8
1135 @b{A Raisonance RLink}
1144 parport_cable wiggler
1147 @section Interface Conmmand
1149 The interface command tells OpenOCD what type of jtag dongle you are
1150 using. Depending upon the type of dongle, you may need to have one or
1151 more additional commands.
1155 @item @b{interface} <@var{name}>
1157 @*Use the interface driver <@var{name}> to connect to the
1158 target. Currently supported interfaces are
1163 @* PC parallel port bit-banging (Wigglers, PLD download cable, ...)
1165 @item @b{amt_jtagaccel}
1166 @* Amontec Chameleon in its JTAG Accelerator configuration connected to a PC's EPP
1170 @* FTDI FT2232 (USB) based devices using either the open-source libftdi or the binary only
1171 FTD2XX driver. The FTD2XX is superior in performance, but not available on every
1172 platform. The libftdi uses libusb, and should be portable to all systems that provide
1176 @*Cirrus Logic EP93xx based single-board computer bit-banging (in development)
1179 @* ASIX PRESTO USB JTAG programmer.
1182 @* usbprog is a freely programmable USB adapter.
1185 @* Gateworks GW16012 JTAG programmer.
1188 @* Segger jlink usb adapter
1191 @* Raisonance RLink usb adapter
1194 @* vsllink is part of Versaloon which is a versatile USB programmer.
1195 @comment - End parameters
1197 @comment - End Interface
1199 @subsection parport options
1202 @item @b{parport_port} <@var{number}>
1203 @cindex parport_port
1204 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of
1205 the @file{/dev/parport} device
1207 When using PPDEV to access the parallel port, use the number of the parallel port:
1208 @option{parport_port 0} (the default). If @option{parport_port 0x378} is specified
1209 you may encounter a problem.
1210 @item @b{parport_cable} <@var{name}>
1211 @cindex parport_cable
1212 @*The layout of the parallel port cable used to connect to the target.
1213 Currently supported cables are
1217 The original Wiggler layout, also supported by several clones, such
1218 as the Olimex ARM-JTAG
1221 Same as original wiggler except an led is fitted on D5.
1222 @item @b{wiggler_ntrst_inverted}
1223 @cindex wiggler_ntrst_inverted
1224 Same as original wiggler except TRST is inverted.
1225 @item @b{old_amt_wiggler}
1226 @cindex old_amt_wiggler
1227 The Wiggler configuration that comes with Amontec's Chameleon Programmer. The new
1228 version available from the website uses the original Wiggler layout ('@var{wiggler}')
1231 The Amontec Chameleon's CPLD when operated in configuration mode. This is only used to
1232 program the Chameleon itself, not a connected target.
1235 The Xilinx Parallel cable III.
1238 The parallel port adapter found on the 'Karo Triton 1 Development Board'.
1239 This is also the layout used by the HollyGates design
1240 (see @uref{http://www.lartmaker.nl/projects/jtag/}).
1243 The ST Parallel cable.
1246 Same as original wiggler except SRST and TRST connections reversed and
1247 TRST is also inverted.
1250 Altium Universal JTAG cable.
1252 @item @b{parport_write_on_exit} <@var{on}|@var{off}>
1253 @cindex parport_write_on_exit
1254 @*This will configure the parallel driver to write a known value to the parallel
1255 interface on exiting OpenOCD
1258 @subsection amt_jtagaccel options
1260 @item @b{parport_port} <@var{number}>
1261 @cindex parport_port
1262 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of the
1263 @file{/dev/parport} device
1265 @subsection ft2232 options
1268 @item @b{ft2232_device_desc} <@var{description}>
1269 @cindex ft2232_device_desc
1270 @*The USB device description of the FTDI FT2232 device. If not
1271 specified, the FTDI default value is used. This setting is only valid
1272 if compiled with FTD2XX support.
1274 @b{TODO:} Confirm the following: On windows the name needs to end with
1275 a ``space A''? Or not? It has to do with the FTD2xx driver. When must
1276 this be added and when must it not be added? Why can't the code in the
1277 interface or in OpenOCD automatically add this if needed? -- Duane.
1279 @item @b{ft2232_serial} <@var{serial-number}>
1280 @cindex ft2232_serial
1281 @*The serial number of the FTDI FT2232 device. If not specified, the FTDI default
1283 @item @b{ft2232_layout} <@var{name}>
1284 @cindex ft2232_layout
1285 @*The layout of the FT2232 GPIO signals used to control output-enables and reset
1286 signals. Valid layouts are
1289 "USBJTAG-1" layout described in the original OpenOCD diploma thesis
1291 Amontec JTAGkey and JTAGkey-tiny
1292 @item @b{signalyzer}
1294 @item @b{olimex-jtag}
1297 American Microsystems M5960
1298 @item @b{evb_lm3s811}
1299 Luminary Micro EVB_LM3S811 as a JTAG interface (not onboard processor), no TRST or
1300 SRST signals on external connector
1303 @item @b{stm32stick}
1304 Hitex STM32 Performance Stick
1305 @item @b{flyswatter}
1306 Tin Can Tools Flyswatter
1307 @item @b{turtelizer2}
1308 egnite Software turtelizer2
1311 @item @b{axm0432_jtag}
1315 @item @b{ft2232_vid_pid} <@var{vid}> <@var{pid}>
1316 @*The vendor ID and product ID of the FTDI FT2232 device. If not specified, the FTDI
1317 default values are used. Multiple <@var{vid}>, <@var{pid}> pairs may be given, eg.
1319 ft2232_vid_pid 0x0403 0xcff8 0x15ba 0x0003
1321 @item @b{ft2232_latency} <@var{ms}>
1322 @*On some systems using ft2232 based JTAG interfaces the FT_Read function call in
1323 ft2232_read() fails to return the expected number of bytes. This can be caused by
1324 USB communication delays and has proved hard to reproduce and debug. Setting the
1325 FT2232 latency timer to a larger value increases delays for short USB packages but it
1326 also reduces the risk of timeouts before receiving the expected number of bytes.
1327 The OpenOCD default value is 2 and for some systems a value of 10 has proved useful.
1330 @subsection ep93xx options
1331 @cindex ep93xx options
1332 Currently, there are no options available for the ep93xx interface.
1336 @item @b{jtag_khz} <@var{reset speed kHz}>
1339 It is debatable if this command belongs here - or in a board
1340 configuration file. In fact, in some situations the jtag speed is
1341 changed during the target initialization process (ie: (1) slow at
1342 reset, (2) program the cpu clocks, (3) run fast)
1344 Speed 0 (khz) selects RTCK method. A non-zero speed is in KHZ. Hence: 3000 is 3mhz.
1346 Not all interfaces support ``rtck''. If the interface device can not
1347 support the rate asked for, or can not translate from kHz to
1348 jtag_speed, then an error is returned.
1350 Make sure the jtag clock is no more than @math{1/6th × CPU-Clock}. This is
1351 especially true for synthesized cores (-S). Also see RTCK.
1353 @b{NOTE: Script writers} If the target chip requires/uses RTCK -
1354 please use the command: 'jtag_rclk FREQ'. This TCL proc (in
1355 startup.tcl) attempts to enable RTCK, if that fails it falls back to
1356 the specified frequency.
1359 # Fall back to 3mhz if RCLK is not supported
1363 @item @b{DEPRICATED} @b{jtag_speed} - please use jtag_khz above.
1365 @*Limit the maximum speed of the JTAG interface. Usually, a value of zero means maximum
1366 speed. The actual effect of this option depends on the JTAG interface used.
1368 The speed used during reset can be adjusted using setting jtag_speed during
1369 pre_reset and post_reset events.
1372 @item wiggler: maximum speed / @var{number}
1373 @item ft2232: 6MHz / (@var{number}+1)
1374 @item amt jtagaccel: 8 / 2**@var{number}
1375 @item jlink: maximum speed in kHz (0-12000), 0 will use RTCK
1376 @item rlink: 24MHz / @var{number}, but only for certain values of @var{number}
1377 @comment end speed list.
1380 @comment END command list
1383 @node Reset Configuration
1384 @chapter Reset Configuration
1385 @cindex reset configuration
1387 Every system configuration may require a different reset
1388 configuration. This can also be quite confusing. Please see the
1389 various board files for example.
1391 @section jtag_nsrst_delay <@var{ms}>
1392 @cindex jtag_nsrst_delay
1393 @*How long (in milliseconds) OpenOCD should wait after deasserting
1394 nSRST before starting new JTAG operations.
1396 @section jtag_ntrst_delay <@var{ms}>
1397 @cindex jtag_ntrst_delay
1398 @*Same @b{jtag_nsrst_delay}, but for nTRST
1400 The jtag_n[st]rst_delay options are useful if reset circuitry (like a
1401 big resistor/capacitor, reset supervisor, or on-chip features). This
1402 keeps the signal asserted for some time after the external reset got
1405 @section reset_config
1407 @b{Note:} To maintainer types and integrators. Where exactly the
1408 ``reset configuration'' goes is a good question. It touches several
1409 things at once. In the end, if you have a board file - the board file
1410 should define it and assume 100% that the DONGLE supports
1411 anything. However, that does not mean the target should not also make
1412 not of something the silicon vendor has done inside the
1413 chip. @i{Grr.... nothing is every pretty.}
1417 @item Every JTAG Dongle is slightly different, some dongles impliment reset differently.
1418 @item Every board is also slightly different; some boards tie TRST and SRST together.
1419 @item Every chip is slightly different; some chips internally tie the two signals together.
1420 @item Some may not impliment all of the signals the same way.
1421 @item Some signals might be push-pull, others open-drain/collector.
1423 @b{Best Case:} OpenOCD can hold the SRST (push-button-reset), then
1424 reset the TAP via TRST and send commands through the JTAG tap to halt
1425 the CPU at the reset vector before the 1st instruction is executed,
1426 and finally release the SRST signal.
1427 @*Depending upon your board vendor, your chip vendor, etc, these
1428 signals may have slightly different names.
1430 OpenOCD defines these signals in these terms:
1432 @item @b{TRST} - is Tap Reset - and should reset only the TAP.
1433 @item @b{SRST} - is System Reset - typically equal to a reset push button.
1439 @item @b{reset_config} <@var{signals}> [@var{combination}] [@var{trst_type}] [@var{srst_type}]
1440 @cindex reset_config
1441 @* The @t{reset_config} command tells OpenOCD the reset configuration
1442 of your combination of Dongle, Board, and Chips.
1443 If the JTAG interface provides SRST, but the target doesn't connect
1444 that signal properly, then OpenOCD can't use it. <@var{signals}> can
1445 be @option{none}, @option{trst_only}, @option{srst_only} or
1446 @option{trst_and_srst}.
1448 [@var{combination}] is an optional value specifying broken reset
1449 signal implementations. @option{srst_pulls_trst} states that the
1450 testlogic is reset together with the reset of the system (e.g. Philips
1451 LPC2000, "broken" board layout), @option{trst_pulls_srst} says that
1452 the system is reset together with the test logic (only hypothetical, I
1453 haven't seen hardware with such a bug, and can be worked around).
1454 @option{combined} imples both @option{srst_pulls_trst} and
1455 @option{trst_pulls_srst}. The default behaviour if no option given is
1458 The [@var{trst_type}] and [@var{srst_type}] parameters allow the
1459 driver type of the reset lines to be specified. Possible values are
1460 @option{trst_push_pull} (default) and @option{trst_open_drain} for the
1461 test reset signal, and @option{srst_open_drain} (default) and
1462 @option{srst_push_pull} for the system reset. These values only affect
1463 JTAG interfaces with support for different drivers, like the Amontec
1464 JTAGkey and JTAGAccelerator.
1466 @comment - end command
1472 @chapter Tap Creation
1473 @cindex tap creation
1474 @cindex tap configuration
1476 In order for OpenOCD to control a target, a JTAG tap must be
1479 Commands to create taps are normally found in a configuration file and
1480 are not normally typed by a human.
1482 When a tap is created a @b{dotted.name} is created for the tap. Other
1483 commands use that dotted.name to manipulate or refer to the tap.
1487 @item @b{Debug Target} A tap can be used by a GDB debug target
1488 @item @b{Flash Programing} Some chips program the flash via JTAG
1489 @item @b{Boundry Scan} Some chips support boundry scan.
1493 @section jtag newtap
1494 @b{@t{jtag newtap CHIPNAME TAPNAME configparams ....}}
1499 @cindex tap geometry
1501 @comment START options
1504 @* is a symbolic name of the chip.
1506 @* is a symbol name of a tap present on the chip.
1507 @item @b{Required configparams}
1508 @* Every tap has 3 required configparams, and several ``optional
1509 parameters'', the required parameters are:
1510 @comment START REQUIRED
1512 @item @b{-irlen NUMBER} - the length in bits of the instruction register, mostly 4 or 5 bits.
1513 @item @b{-ircapture NUMBER} - the IDCODE capture command, usually 0x01.
1514 @item @b{-irmask NUMBER} - the corresponding mask for the IR register. For
1515 some devices, there are bits in the IR that aren't used. This lets you mask
1516 them off when doing comparisons. In general, this should just be all ones for
1518 @comment END REQUIRED
1520 An example of a FOOBAR Tap
1522 jtag newtap foobar tap -irlen 7 -ircapture 0x42 -irmask 0x55
1524 Creates the tap ``foobar.tap'' with the instruction register (IR) is 7
1525 bits long, during Capture-IR 0x42 is loaded into the IR, and bits
1526 [6,4,2,0] are checked.
1528 @item @b{Optional configparams}
1529 @comment START Optional
1531 @item @b{-expected-id NUMBER}
1532 @* By default it is zero. If non-zero represents the
1533 expected tap ID used when the Jtag Chain is examined. See below.
1536 @* By default not specified the tap is enabled. Some chips have a
1537 jtag route controller (JRC) that is used to enable and/or disable
1538 specific jtag taps. You can later enable or disable any JTAG tap via
1539 the command @b{jtag tapenable DOTTED.NAME} or @b{jtag tapdisable
1541 @comment END Optional
1544 @comment END OPTIONS
1547 @comment START NOTES
1549 @item @b{Technically}
1550 @* newtap is a sub command of the ``jtag'' command
1551 @item @b{Big Picture Background}
1552 @*GDB Talks to OpenOCD using the GDB protocol via
1553 tcpip. OpenOCD then uses the JTAG interface (the dongle) to
1554 control the JTAG chain on your board. Your board has one or more chips
1555 in a @i{daisy chain configuration}. Each chip may have one or more
1556 jtag taps. GDB ends up talking via OpenOCD to one of the taps.
1557 @item @b{NAME Rules}
1558 @*Names follow ``C'' symbol name rules (start with alpha ...)
1559 @item @b{TAPNAME - Conventions}
1561 @item @b{tap} - should be used only FPGA or CPLD like devices with a single tap.
1562 @item @b{cpu} - the main cpu of the chip, alternatively @b{foo.arm} and @b{foo.dsp}
1563 @item @b{flash} - if the chip has a flash tap, example: str912.flash
1564 @item @b{bs} - for boundary scan if this is a seperate tap.
1565 @item @b{jrc} - for jtag route controller (example: OMAP3530 found on Beagleboards)
1566 @item @b{unknownN} - where N is a number if you have no idea what the tap is for
1567 @item @b{Other names} - Freescale IMX31 has a SDMA (smart dma) with a JTAG tap, that tap should be called the ``sdma'' tap.
1568 @item @b{When in doubt} - use the chip makers name in their data sheet.
1570 @item @b{DOTTED.NAME}
1571 @* @b{CHIPNAME}.@b{TAPNAME} creates the tap name, aka: the
1572 @b{Dotted.Name} is the @b{CHIPNAME} and @b{TAPNAME} combined with a
1573 dot (period); for example: @b{xilinx.tap}, @b{str912.flash},
1574 @b{omap3530.jrc}, or @b{stm32.cpu} The @b{dotted.name} is used in
1575 numerous other places to refer to various taps.
1577 @* The order this command appears via the config files is
1579 @item @b{Multi Tap Example}
1580 @* This example is based on the ST Microsystems STR912. See the ST
1581 document titled: @b{STR91xFAxxx, Section 3.15 Jtag Interface, Page:
1582 28/102, Figure 3: Jtag chaining inside the STR91xFA}.
1584 @url{http://eu.st.com/stonline/products/literature/ds/13495.pdf}
1585 @*@b{checked: 28/nov/2008}
1587 The diagram shows the TDO pin connects to the flash tap, flash TDI
1588 connects to the CPU debug tap, CPU TDI connects to the boundary scan
1589 tap which then connects to the TDI pin.
1593 # create tap: 'str912.flash'
1594 jtag newtap str912 flash ... params ...
1595 # create tap: 'str912.cpu'
1596 jtag newtap str912 cpu ... params ...
1597 # create tap: 'str912.bs'
1598 jtag newtap str912 bs ... params ...
1601 @item @b{Note: Deprecated} - Index Numbers
1602 @* Prior to 28/nov/2008, JTAG taps where numbered from 0..N this
1603 feature is still present, however its use is highly discouraged and
1604 should not be counted upon.
1605 @item @b{Multiple chips}
1606 @* If your board has multiple chips, you should be
1607 able to @b{source} two configuration files, in the proper order, and
1608 have the taps created in the proper order.
1611 @comment at command level
1612 @comment DOCUMENT old command
1613 @section jtag_device - REMOVED
1615 @b{jtag_device} <@var{IR length}> <@var{IR capture}> <@var{IR mask}> <@var{IDCODE instruction}>
1619 @* @b{Removed: 28/nov/2008} This command has been removed and replaced
1620 by the ``jtag newtap'' command. The documentation remains here so that
1621 one can easily convert the old syntax to the new syntax. About the old
1622 syntax: The old syntax is positional, ie: The 3rd parameter is the
1623 ``irmask''. The new syntax requires named prefixes, and supports
1624 additional options, for example ``-expected-id 0x3f0f0f0f''. Please refer to the
1625 @b{jtag newtap} command for details.
1627 OLD: jtag_device 8 0x01 0xe3 0xfe
1628 NEW: jtag newtap CHIPNAME TAPNAME -irlen 8 -ircapture 0x01 -irmask 0xe3
1631 @section Enable/Disable Taps
1632 @b{Note:} These commands are intended to be used as a machine/script
1633 interface. Humans might find the ``scan_chain'' command more helpful
1634 when querying the state of the JTAG taps.
1636 @b{By default, all taps are enabled}
1639 @item @b{jtag tapenable} @var{DOTTED.NAME}
1640 @item @b{jtag tapdisable} @var{DOTTED.NAME}
1641 @item @b{jtag tapisenabled} @var{DOTTED.NAME}
1646 @cindex route controller
1648 These commands are used when your target has a JTAG Route controller
1649 that effectively adds or removes a tap from the jtag chain in a
1652 The ``standard way'' to remove a tap would be to place the tap in
1653 bypass mode. But with the advent of modern chips, this is not always a
1654 good solution. Some taps operate slowly, others operate fast, and
1655 there are other JTAG clock syncronization problems one must face. To
1656 solve that problem, the JTAG Route controller was introduced. Rather
1657 then ``bypass'' the tap, the tap is completely removed from the
1658 circuit and skipped.
1661 From OpenOCD's view point, a JTAG TAP is in one of 3 states:
1664 @item @b{Enabled - Not In ByPass} and has a variable bit length
1665 @item @b{Enabled - In ByPass} and has a length of exactly 1 bit.
1666 @item @b{Disabled} and has a length of ZERO and is removed from the circuit.
1669 The IEEE JTAG definition has no concept of a ``disabled'' tap.
1670 @b{Historical note:} this feature was added 28/nov/2008
1672 @b{jtag tapisenabled DOTTED.NAME}
1674 This command returns 1 if the named tap is currently enabled, 0 if not.
1675 This command exists so that scripts that manipulate a JRC (like the
1676 Omap3530 has) can determine if OpenOCD thinks a tap is presently
1677 enabled, or disabled.
1680 @node Target Configuration
1681 @chapter Target Configuration
1683 This chapter discusses how to create a GDB Debug Target. Before
1684 creating a ``target'' a JTAG Tap DOTTED.NAME must exist first.
1686 @section targets [NAME]
1687 @b{Note:} This command name is PLURAL - not singular.
1689 With NO parameter, this plural @b{targets} command lists all known
1690 targets in a human friendly form.
1692 With a parameter, this pural @b{targets} command sets the current
1693 target to the given name. (ie: If there are multiple debug targets)
1698 CmdName Type Endian ChainPos State
1699 -- ---------- ---------- ---------- -------- ----------
1700 0: target0 arm7tdmi little 0 halted
1703 @section target COMMANDS
1704 @b{Note:} This command name is SINGULAR - not plural. It is used to
1705 manipulate specific targets, to create targets and other things.
1707 Once a target is created, a TARGETNAME (object) command is created;
1708 see below for details.
1710 The TARGET command accepts these sub-commands:
1712 @item @b{create} .. parameters ..
1713 @* creates a new target, See below for details.
1715 @* Lists all supported target types (perhaps some are not yet in this document).
1717 @* Lists all current debug target names, for example: 'str912.cpu' or 'pxa27.cpu' example usage:
1719 foreach t [target names] {
1720 puts [format "Target: %s\n" $t]
1724 @* Returns the current target. OpenOCD always has, or refers to the ``current target'' in some way.
1725 By default, commands like: ``mww'' (used to write memory) operate on the current target.
1726 @item @b{number} @b{NUMBER}
1727 @* Internally OpenOCD maintains a list of targets - in numerical index
1728 (0..N-1) this command returns the name of the target at index N.
1731 set thename [target number $x]
1732 puts [format "Target %d is: %s\n" $x $thename]
1735 @* Returns the number of targets known to OpenOCD (see number above)
1738 set c [target count]
1739 for { set x 0 } { $x < $c } { incr x } {
1740 # Assuming you have created this function
1741 print_target_details $x
1747 @section TARGETNAME (object) commands
1748 @b{Use:} Once a target is created, an ``object name'' that represents the
1749 target is created. By convention, the target name is identical to the
1750 tap name. In a multiple target system, one can preceed many common
1751 commands with a specific target name and effect only that target.
1753 str912.cpu mww 0x1234 0x42
1754 omap3530.cpu mww 0x5555 123
1757 @b{Model:} The Tcl/Tk language has the concept of object commands. A
1758 good example is a on screen button, once a button is created a button
1759 has a name (a path in TK terms) and that name is useable as a 1st
1760 class command. For example in TK, one can create a button and later
1761 configure it like this:
1765 button .foobar -background red -command @{ foo @}
1767 .foobar configure -foreground blue
1769 set x [.foobar cget -background]
1771 puts [format "The button is %s" $x]
1774 In OpenOCD's terms, the ``target'' is an object just like a Tcl/Tk
1775 button. Commands avaialble as a ``target object'' are:
1777 @comment START targetobj commands.
1779 @item @b{configure} - configure the target; see Target Config/Cget Options below
1780 @item @b{cget} - query the target configuration; see Target Config/Cget Options below
1781 @item @b{curstate} - current target state (running, halt, etc)
1783 @* Intended for a human to see/read the currently configure target events.
1784 @item @b{Various Memory Commands} See the ``mww'' command elsewhere.
1785 @comment start memory
1795 @item @b{Memory To Array, Array To Memory}
1796 @* These are aimed at a machine interface to memory
1798 @item @b{mem2array ARRAYNAME WIDTH ADDRESS COUNT}
1799 @item @b{array2mem ARRAYNAME WIDTH ADDRESS COUNT}
1801 @* @b{ARRAYNAME} is the name of an array variable
1802 @* @b{WIDTH} is 8/16/32 - indicating the memory access size
1803 @* @b{ADDRESS} is the target memory address
1804 @* @b{COUNT} is the number of elements to process
1806 @item @b{Used during ``reset''}
1807 @* These commands are used internally by the OpenOCD scripts to deal
1808 with odd reset situations and are not documented here.
1810 @item @b{arp_examine}
1814 @item @b{arp_waitstate}
1816 @item @b{invoke-event} @b{EVENT-NAME}
1817 @* Invokes the specific event manually for the target
1820 @section Target Events
1821 At various times, certain things can happen, or you want them to happen.
1825 @item What should happen when GDB connects? Should your target reset?
1826 @item When GDB tries to flash the target, do you need to enable the flash via a special command?
1827 @item During reset, do you need to write to certain memory location to reconfigure the SDRAM?
1830 All of the above items are handled by target events.
1832 To specify an event action, either during target creation, or later
1833 via ``$_TARGETNAME configure'' see this example.
1835 Syntactially, the option is: ``-event NAME BODY'' where NAME is a
1836 target event name, and BODY is a tcl procedure or string of commands
1839 The programmers model is the ``-command'' option used in Tcl/Tk
1840 buttons and events. Below are two identical examples, the first
1841 creates and invokes small procedure. The second inlines the procedure.
1844 proc my_attach_proc @{ @} @{
1848 mychip.cpu configure -event gdb-attach my_attach_proc
1849 mychip.cpu configure -event gdb-attach @{ puts "Reset..." ; reset halt @}
1852 @section Current Events
1853 The following events are available:
1855 @item @b{debug-halted}
1856 @* The target has halted for debug reasons (ie: breakpoint)
1857 @item @b{debug-resumed}
1858 @* The target has resumed (ie: gdb said run)
1859 @item @b{early-halted}
1860 @* Occurs early in the halt process
1861 @item @b{examine-end}
1862 @* Currently not used (goal: when JTAG examine completes)
1863 @item @b{examine-start}
1864 @* Currently not used (goal: when JTAG examine starts)
1865 @item @b{gdb-attach}
1866 @* When GDB connects
1867 @item @b{gdb-detach}
1868 @* When GDB disconnects
1870 @* When the taret has halted and GDB is not doing anything (see early halt)
1871 @item @b{gdb-flash-erase-start}
1872 @* Before the GDB flash process tries to erase the flash
1873 @item @b{gdb-flash-erase-end}
1874 @* After the GDB flash process has finished erasing the flash
1875 @item @b{gdb-flash-write-start}
1876 @* Before GDB writes to the flash
1877 @item @b{gdb-flash-write-end}
1878 @* After GDB writes to the flash
1880 @* Before the taret steps, gdb is trying to start/resume the tarfget
1882 @* The target has halted
1883 @item @b{old-gdb_program_config}
1884 @* DO NOT USE THIS: Used internally
1885 @item @b{old-pre_resume}
1886 @* DO NOT USE THIS: Used internally
1887 @item @b{reset-assert-pre}
1888 @* Before reset is asserted on the tap.
1889 @item @b{reset-assert-post}
1890 @* Reset is now asserted on the tap.
1891 @item @b{reset-deassert-pre}
1892 @* Reset is about to be released on the tap
1893 @item @b{reset-deassert-post}
1894 @* Reset has been released on the tap
1896 @* Currently not used.
1897 @item @b{reset-halt-post}
1898 @* Currently not usd
1899 @item @b{reset-halt-pre}
1900 @* Currently not used
1901 @item @b{reset-init}
1902 @* Currently not used
1903 @item @b{reset-start}
1904 @* Currently not used
1905 @item @b{reset-wait-pos}
1906 @* Currently not used
1907 @item @b{reset-wait-pre}
1908 @* Currently not used
1909 @item @b{resume-start}
1910 @* Before any target is resumed
1911 @item @b{resume-end}
1912 @* After all targets have resumed
1916 @* Target has resumed
1917 @item @b{tap-enable}
1918 @* Executed by @b{jtag tapenable DOTTED.NAME} command. Example:
1920 jtag configure DOTTED.NAME -event tap-enable @{
1925 @item @b{tap-disable}
1926 @*Executed by @b{jtag tapdisable DOTTED.NAME} command. Example:
1928 jtag configure DOTTED.NAME -event tap-disable @{
1929 puts "Disabling CPU"
1936 @section target create
1938 @cindex target creation
1941 @b{target} @b{create} <@var{NAME}> <@var{TYPE}> <@var{PARAMS ...}>
1943 @*This command creates a GDB debug target that refers to a specific JTAG tap.
1944 @comment START params
1947 @* Is the name of the debug target. By convention it should be the tap
1948 DOTTED.NAME, this name is also used to create the target object
1951 @* Specifies the target type, ie: arm7tdmi, or cortexM3. Currently supported targes are:
1952 @comment START types
1969 @*PARAMs are various target configure parameters, the following are mandatory
1971 @comment START mandatory
1973 @item @b{-endian big|little}
1974 @item @b{-chain-position DOTTED.NAME}
1975 @comment end MANDATORY
1980 @section Target Config/Cget Options
1981 These options can be specified when the target is created, or later
1982 via the configure option or to query the target via cget.
1984 @item @b{-type} - returns the target type
1985 @item @b{-event NAME BODY} see Target events
1986 @item @b{-work-area-virt [ADDRESS]} specify/set the work area
1987 @item @b{-work-area-phys [ADDRESS]} specify/set the work area
1988 @item @b{-work-area-size [ADDRESS]} specify/set the work area
1989 @item @b{-work-area-backup [0|1]} does the work area get backed up
1990 @item @b{-endian [big|little]}
1991 @item @b{-variant [NAME]} some chips have varients OpenOCD needs to know about
1992 @item @b{-chain-position DOTTED.NAME} the tap name this target refers to.
1996 for @{ set x 0 @} @{ $x < [target count] @} @{ incr x @} @{
1997 set name [target number $x]
1998 set y [$name cget -endian]
1999 set z [$name cget -type]
2000 puts [format "Chip %d is %s, Endian: %s, type: %s" $x $y $z]
2004 @section Target Varients
2007 @* Unknown (please write me)
2009 @* Unknown (please write me) (simular to arm7tdmi)
2011 @* Varients: @option{arm920t}, @option{arm922t} and @option{arm940t}
2012 This enables the hardware single-stepping support found on these
2017 @* None (this is also used as the ARM946)
2019 @* use variant <@var{-variant lm3s}> when debugging luminary lm3s targets. This will cause
2020 OpenOCD to use a software reset rather than asserting SRST to avoid a issue with clearing
2021 the debug registers. This is fixed in Fury Rev B, DustDevil Rev B, Tempest, these revisions will
2022 be detected and the normal reset behaviour used.
2024 @* Supported variants are @option{ixp42x}, @option{ixp45x}, @option{ixp46x},@option{pxa250}, @option{pxa255}, @option{pxa26x}.
2026 @* Supported variants are @option{arm1136}, @option{arm1156}, @option{arm1176}
2028 @* Use variant @option{ejtag_srst} when debugging targets that do not
2029 provide a functional SRST line on the EJTAG connector. This causes
2030 OpenOCD to instead use an EJTAG software reset command to reset the
2031 processor. You still need to enable @option{srst} on the reset
2032 configuration command to enable OpenOCD hardware reset functionality.
2033 @comment END varients
2035 @section working_area - Command Removed
2036 @cindex working_area
2037 @*@b{Please use the ``$_TARGETNAME configure -work-area-... parameters instead}
2038 @* This documentation remains because there are existing scripts that
2039 still use this that need to be converted.
2041 working_area target# address size backup| [virtualaddress]
2043 @* The target# is a the 0 based target numerical index.
2045 This command specifies a working area for the debugger to use. This
2046 may be used to speed-up downloads to target memory and flash
2047 operations, or to perform otherwise unavailable operations (some
2048 coprocessor operations on ARM7/9 systems, for example). The last
2049 parameter decides whether the memory should be preserved
2050 (<@var{backup}>) or can simply be overwritten (<@var{nobackup}>). If
2051 possible, use a working_area that doesn't need to be backed up, as
2052 performing a backup slows down operation.
2054 @node Flash Configuration
2055 @chapter Flash Programing
2056 @cindex Flash Configuration
2058 @b{Note:} As of 28/nov/2008 OpenOCD does not know how to program a SPI
2059 flash that a micro may boot from. Perhaps you the reader would like to
2060 contribute support for this.
2064 @item Configure via the command @b{flash bank}
2065 @* Normally this is done in a configuration file.
2066 @item Operate on the flash via @b{flash SOMECOMMAND}
2067 @* Often commands to manipulate the flash are typed by a human, or run
2068 via a script in some automated way. For example: To program the boot
2069 flash on your board.
2071 @* Flashing via GDB requires the flash be configured via ``flash
2072 bank'', and the GDB flash features be enabled. See the Daemon
2073 configuration section for more details.
2076 @section Flash commands
2077 @cindex Flash commands
2078 @subsection flash banks
2081 @*List configured flash banks
2082 @*@b{NOTE:} the singular form: 'flash bank' is used to configure the flash banks.
2083 @subsection flash info
2084 @b{flash info} <@var{num}>
2086 @*Print info about flash bank <@option{num}>
2087 @subsection flash probe
2088 @b{flash probe} <@var{num}>
2090 @*Identify the flash, or validate the parameters of the configured flash. Operation
2091 depends on the flash type.
2092 @subsection flash erase_check
2093 @b{flash erase_check} <@var{num}>
2094 @cindex flash erase_check
2095 @*Check erase state of sectors in flash bank <@var{num}>. This is the only operation that
2096 updates the erase state information displayed by @option{flash info}. That means you have
2097 to issue an @option{erase_check} command after erasing or programming the device to get
2098 updated information.
2099 @subsection flash protect_check
2100 @b{flash protect_check} <@var{num}>
2101 @cindex flash protect_check
2102 @*Check protection state of sectors in flash bank <num>.
2103 @option{flash erase_sector} using the same syntax.
2104 @subsection flash erase_sector
2105 @b{flash erase_sector} <@var{num}> <@var{first}> <@var{last}>
2106 @cindex flash erase_sector
2107 @anchor{flash erase_sector}
2108 @*Erase sectors at bank <@var{num}>, starting at sector <@var{first}> up to and including
2109 <@var{last}>. Sector numbering starts at 0. Depending on the flash type, erasing may
2110 require the protection to be disabled first (e.g. Intel Advanced Bootblock flash using
2112 @subsection flash erase_address
2113 @b{flash erase_address} <@var{address}> <@var{length}>
2114 @cindex flash erase_address
2115 @*Erase sectors starting at <@var{address}> for <@var{length}> bytes
2116 @subsection flash write_bank
2117 @b{flash write_bank} <@var{num}> <@var{file}> <@var{offset}>
2118 @cindex flash write_bank
2119 @anchor{flash write_bank}
2120 @*Write the binary <@var{file}> to flash bank <@var{num}>, starting at
2121 <@option{offset}> bytes from the beginning of the bank.
2122 @subsection flash write_image
2123 @b{flash write_image} [@var{erase}] <@var{file}> [@var{offset}] [@var{type}]
2124 @cindex flash write_image
2125 @anchor{flash write_image}
2126 @*Write the image <@var{file}> to the current target's flash bank(s). A relocation
2127 [@var{offset}] can be specified and the file [@var{type}] can be specified
2128 explicitly as @option{bin} (binary), @option{ihex} (Intel hex), @option{elf}
2129 (ELF file) or @option{s19} (Motorola s19). Flash memory will be erased prior to programming
2130 if the @option{erase} parameter is given.
2131 @subsection flash protect
2132 @b{flash protect} <@var{num}> <@var{first}> <@var{last}> <@option{on}|@option{off}>
2133 @cindex flash protect
2134 @*Enable (@var{on}) or disable (@var{off}) protection of flash sectors <@var{first}> to
2135 <@var{last}> of @option{flash bank} <@var{num}>.
2137 @subsection mFlash commands
2138 @cindex mFlash commands
2140 @item @b{mflash probe}
2141 @cindex mflash probe
2143 @item @b{mflash write} <@var{num}> <@var{file}> <@var{offset}>
2144 @cindex mflash write
2145 Write the binary <@var{file}> to mflash bank <@var{num}>, starting at
2146 <@var{offset}> bytes from the beginning of the bank.
2147 @item @b{mflash dump} <@var{num}> <@var{file}> <@var{offset}> <@var{size}>
2149 Dump <size> bytes, starting at <@var{offset}> bytes from the beginning of the <@var{num}> bank
2153 @section flash bank command
2154 The @b{flash bank} command is used to configure one or more flash chips (or banks in OpenOCD terms)
2157 @b{flash bank} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}>
2158 <@var{bus_width}> <@var{target#}> [@var{driver_options ...}]
2161 @*Configures a flash bank at <@var{base}> of <@var{size}> bytes and <@var{chip_width}>
2162 and <@var{bus_width}> bytes using the selected flash <driver>.
2164 @subsection External Flash - cfi options
2166 CFI flash are external flash chips - often they are connected to a
2167 specific chip select on the micro. By default at hard reset most
2168 micros have the ablity to ``boot'' from some flash chip - typically
2169 attached to the chips CS0 pin.
2171 For other chip selects: OpenOCD does not know how to configure, or
2172 access a specific chip select. Instead you the human might need to via
2173 other commands (like: mww) configure additional chip selects, or
2174 perhaps configure a GPIO pin that controls the ``write protect'' pin
2177 @b{flash bank cfi} <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}>
2178 <@var{target#}> [@var{jedec_probe}|@var{x16_as_x8}]
2179 @*CFI flashes require the number of the target they're connected to as an additional
2180 argument. The CFI driver makes use of a working area (specified for the target)
2181 to significantly speed up operation.
2183 @var{chip_width} and @var{bus_width} are specified in bytes.
2185 The @var{jedec_probe} option is used to detect certain non-CFI flash roms, like AM29LV010 and similar types.
2189 @subsection Internal Flash (Micro Controllers)
2190 @subsubsection lpc2000 options
2191 @cindex lpc2000 options
2193 @b{flash bank lpc2000} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
2194 <@var{clock}> [@var{calc_checksum}]
2195 @*LPC flashes don't require the chip and bus width to be specified. Additional
2196 parameters are the <@var{variant}>, which may be @var{lpc2000_v1} (older LPC21xx and LPC22xx)
2197 or @var{lpc2000_v2} (LPC213x, LPC214x, LPC210[123], LPC23xx and LPC24xx), the number
2198 of the target this flash belongs to (first is 0), the frequency at which the core
2199 is currently running (in kHz - must be an integral number), and the optional keyword
2200 @var{calc_checksum}, telling the driver to calculate a valid checksum for the exception
2204 @subsubsection at91sam7 options
2205 @cindex at91sam7 options
2207 @b{flash bank at91sam7} 0 0 0 0 <@var{target#}>
2208 @*AT91SAM7 flashes only require the @var{target#}, all other values are looked up after
2209 reading the chip-id and type.
2211 @subsubsection str7 options
2212 @cindex str7 options
2214 @b{flash bank str7x} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
2215 @*variant can be either STR71x, STR73x or STR75x.
2217 @subsubsection str9 options
2218 @cindex str9 options
2220 @b{flash bank str9x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2221 @*The str9 needs the flash controller to be configured prior to Flash programming, eg.
2223 str9x flash_config 0 4 2 0 0x80000
2225 This will setup the BBSR, NBBSR, BBADR and NBBADR registers respectively.
2227 @subsubsection str9 options (str9xpec driver)
2229 @b{flash bank str9xpec} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2230 @*Before using the flash commands the turbo mode will need enabling using str9xpec
2231 @option{enable_turbo} <@var{num>.}
2233 Only use this driver for locking/unlocking the device or configuring the option bytes.
2234 Use the standard str9 driver for programming. @xref{STR9 specific commands}.
2236 @subsubsection stellaris (LM3Sxxx) options
2237 @cindex stellaris (LM3Sxxx) options
2239 @b{flash bank stellaris} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2240 @*stellaris flash plugin only require the @var{target#}.
2242 @subsubsection stm32x options
2243 @cindex stm32x options
2245 @b{flash bank stm32x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2246 @*stm32x flash plugin only require the @var{target#}.
2248 @subsubsection aduc702x options
2249 @cindex aduc702x options
2251 @b{flash bank aduc702x} 0 0 0 0 <@var{target#}>
2252 @*The aduc702x flash plugin works with Analog Devices model numbers ADUC7019 through ADUC7028. The setup command only requires the @var{target#} argument (all devices in this family have the same memory layout).
2254 @subsection mFlash configuration
2255 @cindex mFlash configuration
2256 @b{mflash bank} <@var{soc}> <@var{base}> <@var{chip_width}> <@var{bus_width}>
2257 <@var{RST pin}> <@var{WP pin}> <@var{DPD pin}> <@var{target #}>
2259 @*Configures a mflash for <@var{soc}> host bank at
2260 <@var{base}>. <@var{chip_width}> and <@var{bus_width}> are bytes
2261 order. Pin number format is dependent on host GPIO calling convention.
2262 If WP or DPD pin was not used, write -1. Currently, mflash bank
2263 support s3c2440 and pxa270.
2265 (ex. of s3c2440) mflash <@var{RST pin}> is GPIO B1, <@var{WP pin}> and <@var{DPD pin}> are not used.
2267 mflash bank s3c2440 0x10000000 2 2 1b -1 -1 0
2269 (ex. of pxa270) mflash <@var{RST pin}> is GPIO 43, <@var{DPD pin}> is not used and <@var{DPD pin}> is GPIO 51.
2271 mflash bank pxa270 0x08000000 2 2 43 -1 51 0
2274 @section Micro Controller Specific Flash Commands
2276 @subsection AT91SAM7 specific commands
2277 @cindex AT91SAM7 specific commands
2278 The flash configuration is deduced from the chip identification register. The flash
2279 controller handles erases automatically on a page (128/265 byte) basis so erase is
2280 not necessary for flash programming. AT91SAM7 processors with less than 512K flash
2281 only have a single flash bank embedded on chip. AT91SAM7xx512 have two flash planes
2282 that can be erased separatly. Only an EraseAll command is supported by the controller
2283 for each flash plane and this is called with
2285 @item @b{flash erase} <@var{num}> @var{first_plane} @var{last_plane}
2286 @*bulk erase flash planes first_plane to last_plane.
2287 @item @b{at91sam7 gpnvm} <@var{num}> <@var{bit}> <@option{set}|@option{clear}>
2288 @cindex at91sam7 gpnvm
2289 @*set or clear a gpnvm bit for the processor
2292 @subsection STR9 specific commands
2293 @cindex STR9 specific commands
2294 @anchor{STR9 specific commands}
2295 These are flash specific commands when using the str9xpec driver.
2297 @item @b{str9xpec enable_turbo} <@var{num}>
2298 @cindex str9xpec enable_turbo
2299 @*enable turbo mode, simply this will remove the str9 from the chain and talk
2300 directly to the embedded flash controller.
2301 @item @b{str9xpec disable_turbo} <@var{num}>
2302 @cindex str9xpec disable_turbo
2303 @*restore the str9 into jtag chain.
2304 @item @b{str9xpec lock} <@var{num}>
2305 @cindex str9xpec lock
2306 @*lock str9 device. The str9 will only respond to an unlock command that will
2308 @item @b{str9xpec unlock} <@var{num}>
2309 @cindex str9xpec unlock
2310 @*unlock str9 device.
2311 @item @b{str9xpec options_read} <@var{num}>
2312 @cindex str9xpec options_read
2313 @*read str9 option bytes.
2314 @item @b{str9xpec options_write} <@var{num}>
2315 @cindex str9xpec options_write
2316 @*write str9 option bytes.
2319 Note: Before using the str9xpec driver here is some background info to help
2320 you better understand how the drivers works. OpenOCD has two flash drivers for
2324 Standard driver @option{str9x} programmed via the str9 core. Normally used for
2325 flash programming as it is faster than the @option{str9xpec} driver.
2327 Direct programming @option{str9xpec} using the flash controller, this is
2328 ISC compilant (IEEE 1532) tap connected in series with the str9 core. The str9
2329 core does not need to be running to program using this flash driver. Typical use
2330 for this driver is locking/unlocking the target and programming the option bytes.
2333 Before we run any cmds using the @option{str9xpec} driver we must first disable
2334 the str9 core. This example assumes the @option{str9xpec} driver has been
2335 configured for flash bank 0.
2337 # assert srst, we do not want core running
2338 # while accessing str9xpec flash driver
2340 # turn off target polling
2343 str9xpec enable_turbo 0
2345 str9xpec options_read 0
2346 # re-enable str9 core
2347 str9xpec disable_turbo 0
2351 The above example will read the str9 option bytes.
2352 When performing a unlock remember that you will not be able to halt the str9 - it
2353 has been locked. Halting the core is not required for the @option{str9xpec} driver
2354 as mentioned above, just issue the cmds above manually or from a telnet prompt.
2356 @subsection STR9 configuration
2357 @cindex STR9 configuration
2359 @item @b{str9x flash_config} <@var{bank}> <@var{BBSR}> <@var{NBBSR}>
2360 <@var{BBADR}> <@var{NBBADR}>
2361 @cindex str9x flash_config
2362 @*Configure str9 flash controller.
2364 eg. str9x flash_config 0 4 2 0 0x80000
2366 BBSR - Boot Bank Size register
2367 NBBSR - Non Boot Bank Size register
2368 BBADR - Boot Bank Start Address register
2369 NBBADR - Boot Bank Start Address register
2373 @subsection STR9 option byte configuration
2374 @cindex STR9 option byte configuration
2376 @item @b{str9xpec options_cmap} <@var{num}> <@option{bank0}|@option{bank1}>
2377 @cindex str9xpec options_cmap
2378 @*configure str9 boot bank.
2379 @item @b{str9xpec options_lvdthd} <@var{num}> <@option{2.4v}|@option{2.7v}>
2380 @cindex str9xpec options_lvdthd
2381 @*configure str9 lvd threshold.
2382 @item @b{str9xpec options_lvdsel} <@var{num}> <@option{vdd}|@option{vdd_vddq}>
2383 @cindex str9xpec options_lvdsel
2384 @*configure str9 lvd source.
2385 @item @b{str9xpec options_lvdwarn} <@var{bank}> <@option{vdd}|@option{vdd_vddq}>
2386 @cindex str9xpec options_lvdwarn
2387 @*configure str9 lvd reset warning source.
2390 @subsection STM32x specific commands
2391 @cindex STM32x specific commands
2393 These are flash specific commands when using the stm32x driver.
2395 @item @b{stm32x lock} <@var{num}>
2397 @*lock stm32 device.
2398 @item @b{stm32x unlock} <@var{num}>
2399 @cindex stm32x unlock
2400 @*unlock stm32 device.
2401 @item @b{stm32x options_read} <@var{num}>
2402 @cindex stm32x options_read
2403 @*read stm32 option bytes.
2404 @item @b{stm32x options_write} <@var{num}> <@option{SWWDG}|@option{HWWDG}>
2405 <@option{RSTSTNDBY}|@option{NORSTSTNDBY}> <@option{RSTSTOP}|@option{NORSTSTOP}>
2406 @cindex stm32x options_write
2407 @*write stm32 option bytes.
2408 @item @b{stm32x mass_erase} <@var{num}>
2409 @cindex stm32x mass_erase
2410 @*mass erase flash memory.
2413 @subsection Stellaris specific commands
2414 @cindex Stellaris specific commands
2416 These are flash specific commands when using the Stellaris driver.
2418 @item @b{stellaris mass_erase} <@var{num}>
2419 @cindex stellaris mass_erase
2420 @*mass erase flash memory.
2424 @node General Commands
2425 @chapter General Commands
2428 The commands documented in this chapter here are common commands that
2429 you a human may want to type and see the output of. Configuration type
2430 commands are documented elsewhere.
2434 @item @b{Source Of Commands}
2435 @* OpenOCD commands can occur in a configuration script (discussed
2436 elsewhere) or typed manually by a human or supplied programatically,
2437 or via one of several Tcp/Ip Ports.
2439 @item @b{From the human}
2440 @* A human should interact with the Telnet interface (default port: 4444,
2441 or via GDB, default port 3333)
2443 To issue commands from within a GDB session, use the @option{monitor}
2444 command, e.g. use @option{monitor poll} to issue the @option{poll}
2445 command. All output is relayed through the GDB session.
2447 @item @b{Machine Interface}
2448 The TCL interface intent is to be a machine interface. The default TCL
2453 @section Daemon Commands
2455 @subsection sleep [@var{msec}]
2457 @*Wait for n milliseconds before resuming. Useful in connection with script files
2458 (@var{script} command and @var{target_script} configuration).
2460 @subsection shutdown
2462 @*Close the OpenOCD daemon, disconnecting all clients (GDB, Telnet, Other).
2464 @subsection debug_level [@var{n}]
2466 @anchor{debug_level}
2467 @*Display or adjust debug level to n<0-3>
2469 @subsection fast [@var{enable|disable}]
2471 @*Default disabled. Set default behaviour of OpenOCD to be "fast and dangerous". For instance ARM7/9 DCC memory
2472 downloads and fast memory access will work if the JTAG interface isn't too fast and
2473 the core doesn't run at a too low frequency. Note that this option only changes the default
2474 and that the indvidual options, like DCC memory downloads, can be enabled and disabled
2477 The target specific "dangerous" optimisation tweaking options may come and go
2478 as more robust and user friendly ways are found to ensure maximum throughput
2479 and robustness with a minimum of configuration.
2481 Typically the "fast enable" is specified first on the command line:
2484 openocd -c "fast enable" -c "interface dummy" -f target/str710.cfg
2487 @subsection log_output <@var{file}>
2489 @*Redirect logging to <file> (default: stderr)
2491 @subsection script <@var{file}>
2493 @*Execute commands from <file>
2494 Also see: ``source [find FILENAME]''
2496 @section Target state handling
2497 @subsection power <@var{on}|@var{off}>
2499 @*Turn power switch to target on/off.
2500 No arguments: print status.
2501 Not all interfaces support this.
2503 @subsection reg [@option{#}|@option{name}] [value]
2505 @*Access a single register by its number[@option{#}] or by its [@option{name}].
2506 No arguments: list all available registers for the current target.
2507 Number or name argument: display a register
2508 Number or name and value arguments: set register value
2510 @subsection poll [@option{on}|@option{off}]
2512 @*Poll the target for its current state. If the target is in debug mode, architecture
2513 specific information about the current state is printed. An optional parameter
2514 allows continuous polling to be enabled and disabled.
2516 @subsection halt [@option{ms}]
2518 @*Send a halt request to the target and wait for it to halt for up to [@option{ms}] milliseconds.
2519 Default [@option{ms}] is 5 seconds if no arg given.
2520 Optional arg @option{ms} is a timeout in milliseconds. Using 0 as the [@option{ms}]
2521 will stop OpenOCD from waiting.
2523 @subsection wait_halt [@option{ms}]
2525 @*Wait for the target to enter debug mode. Optional [@option{ms}] is
2526 a timeout in milliseconds. Default [@option{ms}] is 5 seconds if no
2529 @subsection resume [@var{address}]
2531 @*Resume the target at its current code position, or at an optional address.
2532 OpenOCD will wait 5 seconds for the target to resume.
2534 @subsection step [@var{address}]
2536 @*Single-step the target at its current code position, or at an optional address.
2538 @subsection reset [@option{run}|@option{halt}|@option{init}]
2540 @*Perform a hard-reset. The optional parameter specifies what should happen after the reset.
2542 With no arguments a "reset run" is executed
2546 @*Let the target run.
2549 @*Immediately halt the target (works only with certain configurations).
2552 @*Immediately halt the target, and execute the reset script (works only with certain
2556 @subsection soft_reset_halt
2558 @*Requesting target halt and executing a soft reset. This often used
2559 when a target cannot be reset and halted. The target, after reset is
2560 released begins to execute code. OpenOCD attempts to stop the CPU and
2561 then sets the Program counter back at the reset vector. Unfortunatlly
2562 that code that was executed may have left hardware in an unknown
2566 @section Memory access commands
2568 display available ram memory.
2569 @subsection Memory Peek/Poke type commands
2570 These commands allow accesses of a specific size to the memory
2571 system. Often these are used to configure the current target in some
2572 special way. For example - one may need to write certian values to the
2573 SDRAM controller to enable SDRAM.
2576 @item To change the current target see the ``targets'' (plural) command
2577 @item In system level scripts these commands are depricated, please use the TARGET object versions.
2581 @item @b{mdw} <@var{addr}> [@var{count}]
2583 @*display memory words (32bit)
2584 @item @b{mdh} <@var{addr}> [@var{count}]
2586 @*display memory half-words (16bit)
2587 @item @b{mdb} <@var{addr}> [@var{count}]
2589 @*display memory bytes (8bit)
2590 @item @b{mww} <@var{addr}> <@var{value}>
2592 @*write memory word (32bit)
2593 @item @b{mwh} <@var{addr}> <@var{value}>
2595 @*write memory half-word (16bit)
2596 @item @b{mwb} <@var{addr}> <@var{value}>
2598 @*write memory byte (8bit)
2601 @section Image Loading Commands
2602 @subsection load_image
2603 @b{load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2606 @*Load image <@var{file}> to target memory at <@var{address}>
2607 @subsection fast_load_image
2608 @b{fast_load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2609 @cindex fast_load_image
2610 @anchor{fast_load_image}
2611 @*Normally you should be using @b{load_image} or GDB load. However, for
2612 testing purposes or when IO overhead is significant(OpenOCD running on embedded
2613 host), then storing the image in memory and uploading the image to the target
2614 can be a way to upload e.g. multiple debug sessions when the binary does not change.
2615 Arguments as @b{load_image}, but image is stored in OpenOCD host
2616 memory, i.e. does not affect target. This approach is also useful when profiling
2617 target programming performance as IO and target programming can easily be profiled
2619 @subsection fast_load
2623 @*Loads image stored in memory by @b{fast_load_image} to current target. Must be preceeded by fast_load_image.
2624 @subsection dump_image
2625 @b{dump_image} <@var{file}> <@var{address}> <@var{size}>
2628 @*Dump <@var{size}> bytes of target memory starting at <@var{address}> to a
2629 (binary) <@var{file}>.
2630 @subsection verify_image
2631 @b{verify_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2632 @cindex verify_image
2633 @*Verify <@var{file}> against target memory starting at <@var{address}>.
2634 This will first attempt comparison using a crc checksum, if this fails it will try a binary compare.
2637 @section Breakpoint commands
2638 @cindex Breakpoint commands
2640 @item @b{bp} <@var{addr}> <@var{len}> [@var{hw}]
2642 @*set breakpoint <address> <length> [hw]
2643 @item @b{rbp} <@var{addr}>
2645 @*remove breakpoint <adress>
2646 @item @b{wp} <@var{addr}> <@var{len}> <@var{r}|@var{w}|@var{a}> [@var{value}] [@var{mask}]
2648 @*set watchpoint <address> <length> <r/w/a> [value] [mask]
2649 @item @b{rwp} <@var{addr}>
2651 @*remove watchpoint <adress>
2654 @section Misc Commands
2655 @cindex Other Target Commands
2657 @item @b{profile} <@var{seconds}> <@var{gmon.out}>
2659 Profiling samples the CPU PC as quickly as OpenOCD is able, which will be used as a random sampling of PC.
2662 @section Target Specific Commands
2663 @cindex Target Specific Commands
2667 @section Architecture Specific Commands
2668 @cindex Architecture Specific Commands
2670 @subsection ARMV4/5 specific commands
2671 @cindex ARMV4/5 specific commands
2673 These commands are specific to ARM architecture v4 and v5, like all ARM7/9 systems
2674 or Intel XScale (XScale isn't supported yet).
2676 @item @b{armv4_5 reg}
2678 @*Display a list of all banked core registers, fetching the current value from every
2679 core mode if necessary. OpenOCD versions before rev. 60 didn't fetch the current
2681 @item @b{armv4_5 core_mode} [@var{arm}|@var{thumb}]
2682 @cindex armv4_5 core_mode
2683 @*Displays the core_mode, optionally changing it to either ARM or Thumb mode.
2684 The target is resumed in the currently set @option{core_mode}.
2687 @subsection ARM7/9 specific commands
2688 @cindex ARM7/9 specific commands
2690 These commands are specific to ARM7 and ARM9 targets, like ARM7TDMI, ARM720t,
2691 ARM920t or ARM926EJ-S.
2693 @item @b{arm7_9 dbgrq} <@var{enable}|@var{disable}>
2694 @cindex arm7_9 dbgrq
2695 @*Enable use of the DBGRQ bit to force entry into debug mode. This should be
2696 safe for all but ARM7TDMI--S cores (like Philips LPC).
2697 @item @b{arm7_9 fast_memory_access} <@var{enable}|@var{disable}>
2698 @cindex arm7_9 fast_memory_access
2699 @anchor{arm7_9 fast_memory_access}
2700 @*Allow OpenOCD to read and write memory without checking completion of
2701 the operation. This provides a huge speed increase, especially with USB JTAG
2702 cables (FT2232), but might be unsafe if used with targets running at a very low
2703 speed, like the 32kHz startup clock of an AT91RM9200.
2704 @item @b{arm7_9 dcc_downloads} <@var{enable}|@var{disable}>
2705 @cindex arm7_9 dcc_downloads
2706 @*Enable the use of the debug communications channel (DCC) to write larger (>128 byte)
2707 amounts of memory. DCC downloads offer a huge speed increase, but might be potentially
2708 unsafe, especially with targets running at a very low speed. This command was introduced
2709 with OpenOCD rev. 60.
2712 @subsection ARM720T specific commands
2713 @cindex ARM720T specific commands
2716 @item @b{arm720t cp15} <@var{num}> [@var{value}]
2717 @cindex arm720t cp15
2718 @*display/modify cp15 register <@option{num}> [@option{value}].
2719 @item @b{arm720t md<bhw>_phys} <@var{addr}> [@var{count}]
2720 @cindex arm720t md<bhw>_phys
2721 @*Display memory at physical address addr.
2722 @item @b{arm720t mw<bhw>_phys} <@var{addr}> <@var{value}>
2723 @cindex arm720t mw<bhw>_phys
2724 @*Write memory at physical address addr.
2725 @item @b{arm720t virt2phys} <@var{va}>
2726 @cindex arm720t virt2phys
2727 @*Translate a virtual address to a physical address.
2730 @subsection ARM9TDMI specific commands
2731 @cindex ARM9TDMI specific commands
2734 @item @b{arm9tdmi vector_catch} <@var{all}|@var{none}>
2735 @cindex arm9tdmi vector_catch
2736 @*Catch arm9 interrupt vectors, can be @option{all} @option{none} or any of the following:
2737 @option{reset} @option{undef} @option{swi} @option{pabt} @option{dabt} @option{reserved}
2738 @option{irq} @option{fiq}.
2740 Can also be used on other arm9 based cores, arm966, arm920t and arm926ejs.
2743 @subsection ARM966E specific commands
2744 @cindex ARM966E specific commands
2747 @item @b{arm966e cp15} <@var{num}> [@var{value}]
2748 @cindex arm966e cp15
2749 @*display/modify cp15 register <@option{num}> [@option{value}].
2752 @subsection ARM920T specific commands
2753 @cindex ARM920T specific commands
2756 @item @b{arm920t cp15} <@var{num}> [@var{value}]
2757 @cindex arm920t cp15
2758 @*display/modify cp15 register <@option{num}> [@option{value}].
2759 @item @b{arm920t cp15i} <@var{num}> [@var{value}] [@var{address}]
2760 @cindex arm920t cp15i
2761 @*display/modify cp15 (interpreted access) <@option{opcode}> [@option{value}] [@option{address}]
2762 @item @b{arm920t cache_info}
2763 @cindex arm920t cache_info
2764 @*Print information about the caches found. This allows you to see if your target
2765 is a ARM920T (2x16kByte cache) or ARM922T (2x8kByte cache).
2766 @item @b{arm920t md<bhw>_phys} <@var{addr}> [@var{count}]
2767 @cindex arm920t md<bhw>_phys
2768 @*Display memory at physical address addr.
2769 @item @b{arm920t mw<bhw>_phys} <@var{addr}> <@var{value}>
2770 @cindex arm920t mw<bhw>_phys
2771 @*Write memory at physical address addr.
2772 @item @b{arm920t read_cache} <@var{filename}>
2773 @cindex arm920t read_cache
2774 @*Dump the content of ICache and DCache to a file.
2775 @item @b{arm920t read_mmu} <@var{filename}>
2776 @cindex arm920t read_mmu
2777 @*Dump the content of the ITLB and DTLB to a file.
2778 @item @b{arm920t virt2phys} <@var{va}>
2779 @cindex arm920t virt2phys
2780 @*Translate a virtual address to a physical address.
2783 @subsection ARM926EJS specific commands
2784 @cindex ARM926EJS specific commands
2787 @item @b{arm926ejs cp15} <@var{num}> [@var{value}]
2788 @cindex arm926ejs cp15
2789 @*display/modify cp15 register <@option{num}> [@option{value}].
2790 @item @b{arm926ejs cache_info}
2791 @cindex arm926ejs cache_info
2792 @*Print information about the caches found.
2793 @item @b{arm926ejs md<bhw>_phys} <@var{addr}> [@var{count}]
2794 @cindex arm926ejs md<bhw>_phys
2795 @*Display memory at physical address addr.
2796 @item @b{arm926ejs mw<bhw>_phys} <@var{addr}> <@var{value}>
2797 @cindex arm926ejs mw<bhw>_phys
2798 @*Write memory at physical address addr.
2799 @item @b{arm926ejs virt2phys} <@var{va}>
2800 @cindex arm926ejs virt2phys
2801 @*Translate a virtual address to a physical address.
2804 @subsection CORTEX_M3 specific commands
2805 @cindex CORTEX_M3 specific commands
2808 @item @b{cortex_m3 maskisr} <@var{on}|@var{off}>
2809 @cindex cortex_m3 maskisr
2810 @*Enable masking (disabling) interrupts during target step/resume.
2814 @section Debug commands
2815 @cindex Debug commands
2816 The following commands give direct access to the core, and are most likely
2817 only useful while debugging OpenOCD.
2819 @item @b{arm7_9 write_xpsr} <@var{32-bit value}> <@option{0=cpsr}, @option{1=spsr}>
2820 @cindex arm7_9 write_xpsr
2821 @*Immediately write either the current program status register (CPSR) or the saved
2822 program status register (SPSR), without changing the register cache (as displayed
2823 by the @option{reg} and @option{armv4_5 reg} commands).
2824 @item @b{arm7_9 write_xpsr_im8} <@var{8-bit value}> <@var{rotate 4-bit}>
2825 <@var{0=cpsr},@var{1=spsr}>
2826 @cindex arm7_9 write_xpsr_im8
2827 @*Write the 8-bit value rotated right by 2*rotate bits, using an immediate write
2828 operation (similar to @option{write_xpsr}).
2829 @item @b{arm7_9 write_core_reg} <@var{num}> <@var{mode}> <@var{value}>
2830 @cindex arm7_9 write_core_reg
2831 @*Write a core register, without changing the register cache (as displayed by the
2832 @option{reg} and @option{armv4_5 reg} commands). The <@var{mode}> argument takes the
2833 encoding of the [M4:M0] bits of the PSR.
2836 @section Target Requests
2837 @cindex Target Requests
2838 OpenOCD can handle certain target requests, currently debugmsg are only supported for arm7_9 and cortex_m3.
2839 See libdcc in the contrib dir for more details.
2841 @item @b{target_request debugmsgs} <@var{enable}|@var{disable}>
2842 @cindex target_request debugmsgs
2843 @*Enable/disable target debugmsgs requests. debugmsgs enable messages to be sent to the debugger while the target is running.
2847 @chapter JTAG Commands
2848 @cindex JTAG commands
2849 Generally most people will not use the bulk of these commands. They
2850 are mostly used by the OpenOCD developers or those who need to
2851 directly manipulate the JTAG taps.
2853 In general these commands control JTAG taps at a very low level. For
2854 example if you need to control a JTAG Route Controller (ie: the
2855 OMAP3530 on the Beagle Board has one) you might use these commands in
2856 a script or an event procedure.
2860 @item @b{scan_chain}
2862 @*Print current scan chain configuration.
2863 @item @b{jtag_reset} <@var{trst}> <@var{srst}>
2865 @*Toggle reset lines.
2866 @item @b{endstate} <@var{tap_state}>
2868 @*Finish JTAG operations in <@var{tap_state}>.
2869 @item @b{runtest} <@var{num_cycles}>
2871 @*Move to Run-Test/Idle, and execute <@var{num_cycles}>
2872 @item @b{statemove} [@var{tap_state}]
2874 @*Move to current endstate or [@var{tap_state}]
2875 @item @b{irscan} <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
2877 @*Execute IR scan <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
2878 @item @b{drscan} <@var{device}> [@var{dev2}] [@var{var2}] ...
2880 @*Execute DR scan <@var{device}> [@var{dev2}] [@var{var2}] ...
2881 @item @b{verify_ircapture} <@option{enable}|@option{disable}>
2882 @cindex verify_ircapture
2883 @*Verify value captured during Capture-IR. Default is enabled.
2884 @item @b{var} <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
2886 @*Allocate, display or delete variable <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
2887 @item @b{field} <@var{var}> <@var{field}> [@var{value}|@var{flip}]
2889 Display/modify variable field <@var{var}> <@var{field}> [@var{value}|@var{flip}].
2894 Available tap_states are:
2934 If OpenOCD runs on an embedded host(as ZY1000 does), then tftp can
2935 be used to access files on PCs(either developer PC or some other PC).
2937 The way this works on the ZY1000 is to prefix a filename by
2938 "/tftp/ip/" and append the tftp path on the tftp
2939 server(tftpd). E.g. "load_image /tftp/10.0.0.96/c:\temp\abc.elf" will
2940 load c:\temp\abc.elf from the developer pc (10.0.0.96) into memory as
2941 if the file was hosted on the embedded host.
2943 In order to achieve decent performance, you must choose a tftp server
2944 that supports a packet size bigger than the default packet size(512 bytes). There
2945 are numerous tftp servers out there(free and commercial) and you will have to do
2946 a bit of googling to find something that fits your requirements.
2948 @node Sample Scripts
2949 @chapter Sample Scripts
2952 This page shows how to use the target library.
2954 The configuration script can be divided in the following section:
2956 @item daemon configuration
2958 @item jtag scan chain
2959 @item target configuration
2960 @item flash configuration
2963 Detailed information about each section can be found at OpenOCD configuration.
2965 @section AT91R40008 example
2966 @cindex AT91R40008 example
2967 To start OpenOCD with a target script for the AT91R40008 CPU and reset
2968 the CPU upon startup of the OpenOCD daemon.
2970 openocd -f interface/parport.cfg -f target/at91r40008.cfg -c init -c reset
2974 @node GDB and OpenOCD
2975 @chapter GDB and OpenOCD
2976 @cindex GDB and OpenOCD
2977 OpenOCD complies with the remote gdbserver protocol, and as such can be used
2978 to debug remote targets.
2980 @section Connecting to GDB
2981 @cindex Connecting to GDB
2982 @anchor{Connecting to GDB}
2983 Use GDB 6.7 or newer with OpenOCD if you run into trouble. For
2984 instance 6.3 has a known bug where it produces bogus memory access
2985 errors, which has since been fixed: look up 1836 in
2986 @url{http://sourceware.org/cgi-bin/gnatsweb.pl?database=gdb}
2988 @*OpenOCD can communicate with GDB in two ways:
2991 A socket (tcp) connection is typically started as follows:
2993 target remote localhost:3333
2995 This would cause GDB to connect to the gdbserver on the local pc using port 3333.
2997 A pipe connection is typically started as follows:
2999 target remote | openocd --pipe
3001 This would cause GDB to run OpenOCD and communicate using pipes (stdin/stdout).
3002 Using this method has the advantage of GDB starting/stopping OpenOCD for the debug
3006 @*To see a list of available OpenOCD commands type @option{monitor help} on the
3009 OpenOCD supports the gdb @option{qSupported} packet, this enables information
3010 to be sent by the gdb server (OpenOCD) to GDB. Typical information includes
3011 packet size and device memory map.
3013 Previous versions of OpenOCD required the following GDB options to increase
3014 the packet size and speed up GDB communication.
3016 set remote memory-write-packet-size 1024
3017 set remote memory-write-packet-size fixed
3018 set remote memory-read-packet-size 1024
3019 set remote memory-read-packet-size fixed
3021 This is now handled in the @option{qSupported} PacketSize and should not be required.
3023 @section Programming using GDB
3024 @cindex Programming using GDB
3026 By default the target memory map is sent to GDB, this can be disabled by
3027 the following OpenOCD config option:
3029 gdb_memory_map disable
3031 For this to function correctly a valid flash config must also be configured
3032 in OpenOCD. For faster performance you should also configure a valid
3035 Informing GDB of the memory map of the target will enable GDB to protect any
3036 flash area of the target and use hardware breakpoints by default. This means
3037 that the OpenOCD option @option{gdb_breakpoint_override} is not required when
3038 using a memory map. @xref{gdb_breakpoint_override}.
3040 To view the configured memory map in GDB, use the gdb command @option{info mem}
3041 All other unasigned addresses within GDB are treated as RAM.
3043 GDB 6.8 and higher set any memory area not in the memory map as inaccessible,
3044 this can be changed to the old behaviour by using the following GDB command.
3046 set mem inaccessible-by-default off
3049 If @option{gdb_flash_program enable} is also used, GDB will be able to
3050 program any flash memory using the vFlash interface.
3052 GDB will look at the target memory map when a load command is given, if any
3053 areas to be programmed lie within the target flash area the vFlash packets
3056 If the target needs configuring before GDB programming, an event
3057 script can be executed.
3059 $_TARGETNAME configure -event EVENTNAME BODY
3062 To verify any flash programming the GDB command @option{compare-sections}
3065 @node TCL scripting API
3066 @chapter TCL scripts
3067 @cindex TCL scripting API
3071 The commands are stateless. E.g. the telnet command line has a concept
3072 of currently active target, the Tcl API proc's take this sort of state
3073 information as an argument to each proc.
3075 There are three main types of return values: single value, name value
3076 pair list and lists.
3078 Name value pair. The proc 'foo' below returns a name/value pair
3084 > set foo(you) Oyvind
3085 > set foo(mouse) Micky
3086 > set foo(duck) Donald
3094 me Duane you Oyvind mouse Micky duck Donald
3096 Thus, to get the names of the associative array is easy:
3098 foreach { name value } [set foo] {
3099 puts "Name: $name, Value: $value"
3103 Lists returned must be relatively small. Otherwise a range
3104 should be passed in to the proc in question.
3106 @section Internal Low Level Commands
3108 By Low level, the intent is a human would not directly use these commands.
3110 Low level commands are (should be) prefixed with "openocd_", e.g. openocd_flash_banks
3111 is the low level API upon which "flash banks" is implemented.
3114 @item @b{ocd_mem2array} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
3116 Read memory and return as a TCL array for script processing
3117 @item @b{ocd_array2mem} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
3119 Convert a TCL array to memory locations and write the values
3120 @item @b{ocd_flash_banks} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}> <@var{target}> [@option{driver options} ...]
3122 Return information about the flash banks
3125 OpenOCD commands can consist of two words, e.g. "flash banks". The
3126 startup.tcl "unknown" proc will translate this into a tcl proc
3127 called "flash_banks".
3129 @section OpenOCD specific Global Variables
3133 Real TCL has ::tcl_platform(), and platform::identify, and many other
3134 variables. JimTCL, as implimented in OpenOCD creates $HostOS which
3135 holds one of the following values.
3138 @item @b{winxx} Built using Microsoft Visual Studio
3139 @item @b{linux} Linux is the underlying operating sytem
3140 @item @b{darwin} Darwin (mac-os) is the underlying operating sytem.
3141 @item @b{cygwin} Running under Cygwin
3142 @item @b{mingw32} Running under MingW32
3143 @item @b{other} Unknown, none of the above.
3146 Note: 'winxx' was choosen because today (March-2009) no distinction is made between Win32 and Win64.
3149 @chapter Deprecated/Removed Commands
3150 @cindex Deprecated/Removed Commands
3151 Certain OpenOCD commands have been deprecated/removed during the various revisions.
3154 @item @b{arm7_9 fast_writes}
3155 @cindex arm7_9 fast_writes
3156 @*use @option{arm7_9 fast_memory_access} command with same args. @xref{arm7_9 fast_memory_access}.
3157 @item @b{arm7_9 force_hw_bkpts}
3158 @cindex arm7_9 force_hw_bkpts
3159 @*Use @option{gdb_breakpoint_override} instead. Note that GDB will use hardware breakpoints
3160 for flash if the gdb memory map has been set up(default when flash is declared in
3161 target configuration). @xref{gdb_breakpoint_override}.
3162 @item @b{arm7_9 sw_bkpts}
3163 @cindex arm7_9 sw_bkpts
3164 @*On by default. See also @option{gdb_breakpoint_override}. @xref{gdb_breakpoint_override}.
3165 @item @b{daemon_startup}
3166 @cindex daemon_startup
3167 @*this config option has been removed, simply adding @option{init} and @option{reset halt} to
3168 the end of your config script will give the same behaviour as using @option{daemon_startup reset}
3169 and @option{target cortex_m3 little reset_halt 0}.
3170 @item @b{dump_binary}
3172 @*use @option{dump_image} command with same args. @xref{dump_image}.
3173 @item @b{flash erase}
3175 @*use @option{flash erase_sector} command with same args. @xref{flash erase_sector}.
3176 @item @b{flash write}
3178 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
3179 @item @b{flash write_binary}
3180 @cindex flash write_binary
3181 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
3182 @item @b{flash auto_erase}
3183 @cindex flash auto_erase
3184 @*use @option{flash write_image} command passing @option{erase} as the first parameter. @xref{flash write_image}.
3185 @item @b{load_binary}
3187 @*use @option{load_image} command with same args. @xref{load_image}.
3188 @item @b{run_and_halt_time}
3189 @cindex run_and_halt_time
3190 @*This command has been removed for simpler reset behaviour, it can be simulated with the
3197 @item @b{target} <@var{type}> <@var{endian}> <@var{jtag-position}>
3199 @*use the create subcommand of @option{target}.
3200 @item @b{target_script} <@var{target#}> <@var{eventname}> <@var{scriptname}>
3201 @cindex target_script
3202 @*use <@var{target_name}> configure -event <@var{eventname}> "script <@var{scriptname}>"
3203 @item @b{working_area}
3204 @cindex working_area
3205 @*use the @option{configure} subcommand of @option{target} to set the work-area-virt, work-area-phy, work-area-size, and work-area-backup properties of the target.
3212 @item @b{RTCK, also known as: Adaptive Clocking - What is it?}
3214 @cindex adaptive clocking
3217 In digital circuit design it is often refered to as ``clock
3218 synchronisation'' the JTAG interface uses one clock (TCK or TCLK)
3219 operating at some speed, your target is operating at another. The two
3220 clocks are not synchronised, they are ``asynchronous''
3222 In order for the two to work together they must be synchronised. Otherwise
3223 the two systems will get out of sync with each other and nothing will
3224 work. There are 2 basic options.
3227 Use a special circuit.
3229 One clock must be some multiple slower the the other.
3232 @b{Does this really matter?} For some chips and some situations, this
3233 is a non-issue (ie: A 500MHz ARM926) but for others - for example some
3234 ATMEL SAM7 and SAM9 chips start operation from reset at 32kHz -
3235 program/enable the oscillators and eventually the main clock. It is in
3236 those critical times you must slow the jtag clock to sometimes 1 to
3239 Imagine debugging that 500MHz ARM926 hand held battery powered device
3240 that ``deep sleeps'' at 32kHz between every keystroke. It can be
3243 @b{Solution #1 - A special circuit}
3245 In order to make use of this your jtag dongle must support the RTCK
3246 feature. Not all dongles support this - keep reading!
3248 The RTCK signal often found in some ARM chips is used to help with
3249 this problem. ARM has a good description of the problem described at
3250 this link: @url{http://www.arm.com/support/faqdev/4170.html} [checked
3251 28/nov/2008]. Link title: ``How does the jtag synchronisation logic
3252 work? / how does adaptive clocking work?''.
3254 The nice thing about adaptive clocking is that ``battery powered hand
3255 held device example'' - the adaptiveness works perfectly all the
3256 time. One can set a break point or halt the system in the deep power
3257 down code, slow step out until the system speeds up.
3259 @b{Solution #2 - Always works - but may be slower}
3261 Often this is a perfectly acceptable solution.
3263 In the most simple terms: Often the JTAG clock must be 1/10 to 1/12 of
3264 the target clock speed. But what is that ``magic division'' it varies
3265 depending upon the chips on your board. @b{ARM Rule of thumb} Most ARM
3266 based systems require an 8:1 division. @b{Xilinx Rule of thumb} is
3267 1/12 the clock speed.
3269 Note: Many FTDI2232C based JTAG dongles are limited to 6MHz.
3271 You can still debug the 'lower power' situations - you just need to
3272 manually adjust the clock speed at every step. While painful and
3273 teadious, it is not always practical.
3275 It is however easy to ``code your way around it'' - ie: Cheat a little
3276 have a special debug mode in your application that does a ``high power
3277 sleep''. If you are careful - 98% of your problems can be debugged
3280 To set the JTAG frequency use the command:
3288 @item @b{Win32 Pathnames} Why does not backslashes in paths under Windows doesn't work?
3290 OpenOCD uses Tcl and a backslash is an escape char. Use @{ and @}
3291 around Windows filenames.
3304 @item @b{Missing: cygwin1.dll} OpenOCD complains about a missing cygwin1.dll.
3306 Make sure you have Cygwin installed, or at least a version of OpenOCD that
3307 claims to come with all the necessary dlls. When using Cygwin, try launching
3308 OpenOCD from the Cygwin shell.
3310 @item @b{Breakpoint Issue} I'm trying to set a breakpoint using GDB (or a frontend like Insight or
3311 Eclipse), but OpenOCD complains that "Info: arm7_9_common.c:213
3312 arm7_9_add_breakpoint(): sw breakpoint requested, but software breakpoints not enabled".
3314 GDB issues software breakpoints when a normal breakpoint is requested, or to implement
3315 source-line single-stepping. On ARMv4T systems, like ARM7TDMI, ARM720t or ARM920t,
3316 software breakpoints consume one of the two available hardware breakpoints.
3318 @item @b{LPC2000 Flash} When erasing or writing LPC2000 on-chip flash, the operation fails sometimes
3319 and works sometimes fine.
3321 Make sure the core frequency specified in the @option{flash lpc2000} line matches the
3322 clock at the time you're programming the flash. If you've specified the crystal's
3323 frequency, make sure the PLL is disabled, if you've specified the full core speed
3324 (e.g. 60MHz), make sure the PLL is enabled.
3326 @item @b{Amontec Chameleon} When debugging using an Amontec Chameleon in its JTAG Accelerator configuration,
3327 I keep getting "Error: amt_jtagaccel.c:184 amt_wait_scan_busy(): amt_jtagaccel timed
3328 out while waiting for end of scan, rtck was disabled".
3330 Make sure your PC's parallel port operates in EPP mode. You might have to try several
3331 settings in your PC BIOS (ECP, EPP, and different versions of those).
3333 @item @b{Data Aborts} When debugging with OpenOCD and GDB (plain GDB, Insight, or Eclipse),
3334 I get lots of "Error: arm7_9_common.c:1771 arm7_9_read_memory():
3335 memory read caused data abort".
3337 The errors are non-fatal, and are the result of GDB trying to trace stack frames
3338 beyond the last valid frame. It might be possible to prevent this by setting up
3339 a proper "initial" stack frame, if you happen to know what exactly has to
3340 be done, feel free to add this here.
3342 @b{Simple:} In your startup code - push 8 registers of ZEROs onto the
3343 stack before calling main(). What GDB is doing is ``climbing'' the run
3344 time stack by reading various values on the stack using the standard
3345 call frame for the target. GDB keeps going - until one of 2 things
3346 happen @b{#1} an invalid frame is found, or @b{#2} some huge number of
3347 stackframes have been processed. By pushing ZEROs on the stack, GDB
3350 @b{Debugging Interrupt Service Routines} - In your ISR before you call
3351 your C code, do the same, artifically push some zeros on to the stack,
3352 remember to pop them off when the ISR is done.
3354 @b{Also note:} If you have a multi-threaded operating system, they
3355 often do not @b{in the intrest of saving memory} waste these few
3359 @item @b{JTAG Reset Config} I get the following message in the OpenOCD console (or log file):
3360 "Warning: arm7_9_common.c:679 arm7_9_assert_reset(): srst resets test logic, too".
3362 This warning doesn't indicate any serious problem, as long as you don't want to
3363 debug your core right out of reset. Your .cfg file specified @option{jtag_reset
3364 trst_and_srst srst_pulls_trst} to tell OpenOCD that either your board,
3365 your debugger or your target uC (e.g. LPC2000) can't assert the two reset signals
3366 independently. With this setup, it's not possible to halt the core right out of
3367 reset, everything else should work fine.
3369 @item @b{USB Power} When using OpenOCD in conjunction with Amontec JTAGkey and the Yagarto
3370 Toolchain (Eclipse, arm-elf-gcc, arm-elf-gdb), the debugging seems to be
3371 unstable. When single-stepping over large blocks of code, GDB and OpenOCD
3372 quit with an error message. Is there a stability issue with OpenOCD?
3374 No, this is not a stability issue concerning OpenOCD. Most users have solved
3375 this issue by simply using a self-powered USB hub, which they connect their
3376 Amontec JTAGkey to. Apparently, some computers do not provide a USB power
3377 supply stable enough for the Amontec JTAGkey to be operated.
3379 @b{Laptops running on battery have this problem too...}
3381 @item @b{USB Power} When using the Amontec JTAGkey, sometimes OpenOCD crashes with the
3382 following error messages: "Error: ft2232.c:201 ft2232_read(): FT_Read returned:
3383 4" and "Error: ft2232.c:365 ft2232_send_and_recv(): couldn't read from FT2232".
3384 What does that mean and what might be the reason for this?
3386 First of all, the reason might be the USB power supply. Try using a self-powered
3387 hub instead of a direct connection to your computer. Secondly, the error code 4
3388 corresponds to an FT_IO_ERROR, which means that the driver for the FTDI USB
3389 chip ran into some sort of error - this points us to a USB problem.
3391 @item @b{GDB Disconnects} When using the Amontec JTAGkey, sometimes OpenOCD crashes with the following
3392 error message: "Error: gdb_server.c:101 gdb_get_char(): read: 10054".
3393 What does that mean and what might be the reason for this?
3395 Error code 10054 corresponds to WSAECONNRESET, which means that the debugger (GDB)
3396 has closed the connection to OpenOCD. This might be a GDB issue.
3398 @item @b{LPC2000 Flash} In the configuration file in the section where flash device configurations
3399 are described, there is a parameter for specifying the clock frequency
3400 for LPC2000 internal flash devices (e.g. @option{flash bank lpc2000
3401 0x0 0x40000 0 0 0 lpc2000_v1 14746 calc_checksum}), which must be
3402 specified in kilohertz. However, I do have a quartz crystal of a
3403 frequency that contains fractions of kilohertz (e.g. 14,745,600 Hz,
3404 i.e. 14,745.600 kHz). Is it possible to specify real numbers for the
3407 No. The clock frequency specified here must be given as an integral number.
3408 However, this clock frequency is used by the In-Application-Programming (IAP)
3409 routines of the LPC2000 family only, which seems to be very tolerant concerning
3410 the given clock frequency, so a slight difference between the specified clock
3411 frequency and the actual clock frequency will not cause any trouble.
3413 @item @b{Command Order} Do I have to keep a specific order for the commands in the configuration file?
3415 Well, yes and no. Commands can be given in arbitrary order, yet the
3416 devices listed for the JTAG scan chain must be given in the right
3417 order (jtag newdevice), with the device closest to the TDO-Pin being
3418 listed first. In general, whenever objects of the same type exist
3419 which require an index number, then these objects must be given in the
3420 right order (jtag newtap, targets and flash banks - a target
3421 references a jtag newtap and a flash bank references a target).
3423 You can use the ``scan_chain'' command to verify and display the tap order.
3425 @item @b{JTAG Tap Order} JTAG Tap Order - Command Order
3427 Many newer devices have multiple JTAG taps. For example: ST
3428 Microsystems STM32 chips have two taps, a ``boundary scan tap'' and
3429 ``CortexM3'' tap. Example: The STM32 reference manual, Document ID:
3430 RM0008, Section 26.5, Figure 259, page 651/681, the ``TDI'' pin is
3431 connected to the Boundary Scan Tap, which then connects to the
3432 CortexM3 Tap, which then connects to the TDO pin.
3434 Thus, the proper order for the STM32 chip is: (1) The CortexM3, then
3435 (2) The Boundary Scan Tap. If your board includes an additional JTAG
3436 chip in the scan chain (for example a Xilinx CPLD or FPGA) you could
3437 place it before or after the stm32 chip in the chain. For example:
3440 @item OpenOCD_TDI(output) -> STM32 TDI Pin (BS Input)
3441 @item STM32 BS TDO (output) -> STM32 CortexM3 TDI (input)
3442 @item STM32 CortexM3 TDO (output) -> SM32 TDO Pin
3443 @item STM32 TDO Pin (output) -> Xilinx TDI Pin (input)
3444 @item Xilinx TDO Pin -> OpenOCD TDO (input)
3447 The ``jtag device'' commands would thus be in the order shown below. Note
3450 @item jtag newtap Xilinx tap -irlen ...
3451 @item jtag newtap stm32 cpu -irlen ...
3452 @item jtag newtap stm32 bs -irlen ...
3453 @item # Create the debug target and say where it is
3454 @item target create stm32.cpu -chain-position stm32.cpu ...
3458 @item @b{SYSCOMP} Sometimes my debugging session terminates with an error. When I look into the
3459 log file, I can see these error messages: Error: arm7_9_common.c:561
3460 arm7_9_execute_sys_speed(): timeout waiting for SYSCOMP
3466 @node TCL Crash Course
3467 @chapter TCL Crash Course
3470 Not everyone knows TCL - this is not intended to be a replacement for
3471 learning TCL, the intent of this chapter is to give you some idea of
3472 how the TCL Scripts work.
3474 This chapter is written with two audiences in mind. (1) OpenOCD users
3475 who need to understand a bit more of how JIM-Tcl works so they can do
3476 something useful, and (2) those that want to add a new command to
3479 @section TCL Rule #1
3480 There is a famous joke, it goes like this:
3482 @item Rule #1: The wife is always correct
3483 @item Rule #2: If you think otherwise, See Rule #1
3486 The TCL equal is this:
3489 @item Rule #1: Everything is a string
3490 @item Rule #2: If you think otherwise, See Rule #1
3493 As in the famous joke, the consequences of Rule #1 are profound. Once
3494 you understand Rule #1, you will understand TCL.
3496 @section TCL Rule #1b
3497 There is a second pair of rules.
3499 @item Rule #1: Control flow does not exist. Only commands
3500 @* For example: the classic FOR loop or IF statement is not a control
3501 flow item, they are commands, there is no such thing as control flow
3503 @item Rule #2: If you think otherwise, See Rule #1
3504 @* Actually what happens is this: There are commands that by
3505 convention, act like control flow key words in other languages. One of
3506 those commands is the word ``for'', another command is ``if''.
3509 @section Per Rule #1 - All Results are strings
3510 Every TCL command results in a string. The word ``result'' is used
3511 deliberatly. No result is just an empty string. Remember: @i{Rule #1 -
3512 Everything is a string}
3514 @section TCL Quoting Operators
3515 In life of a TCL script, there are two important periods of time, the
3516 difference is subtle.
3519 @item Evaluation Time
3522 The two key items here are how ``quoted things'' work in TCL. TCL has
3523 three primary quoting constructs, the [square-brackets] the
3524 @{curly-braces@} and ``double-quotes''
3526 By now you should know $VARIABLES always start with a $DOLLAR
3527 sign. BTW, to set a variable, you actually use the command ``set'', as
3528 in ``set VARNAME VALUE'' much like the ancient BASIC langauge ``let x
3529 = 1'' statement, but without the equal sign.
3532 @item @b{[square-brackets]}
3533 @* @b{[square-brackets]} are command subsitution. It operates much
3534 like Unix Shell `back-ticks`. The result of a [square-bracket]
3535 operation is exactly 1 string. @i{Remember Rule #1 - Everything is a
3536 string}. These two statments are roughly identical.
3540 echo "The Date is: $X"
3543 puts "The Date is: $X"
3545 @item @b{``double-quoted-things''}
3546 @* @b{``double-quoted-things''} are just simply quoted
3547 text. $VARIABLES and [square-brackets] are expanded in place - the
3548 result however is exactly 1 string. @i{Remember Rule #1 - Everything
3552 puts "It is now \"[date]\", $x is in 1 hour"
3554 @item @b{@{Curly-Braces@}}
3555 @*@b{@{Curly-Braces@}} are magic: $VARIABLES and [square-brackets] are
3556 parsed, but are NOT expanded or executed. @{Curly-Braces@} are like
3557 'single-quote' operators in BASH shell scripts, with the added
3558 feature: @{curly-braces@} nest, single quotes can not. @{@{@{this is
3559 nested 3 times@}@}@} NOTE: [date] is perhaps a bad example, as of
3560 28/nov/2008, Jim/OpenOCD does not have a date command.
3563 @section Consequences of Rule 1/2/3/4
3565 The consequences of Rule 1 is profound.
3567 @subsection Tokenizing & Execution.
3569 Of course, whitespace, blank lines and #comment lines are handled in
3572 As a script is parsed, each (multi) line in the script file is
3573 tokenized and according to the quoting rules. After tokenizing, that
3574 line is immedatly executed.
3576 Multi line statements end with one or more ``still-open''
3577 @{curly-braces@} which - eventually - a few lines later closes.
3579 @subsection Command Execution
3581 Remember earlier: There is no such thing as ``control flow''
3582 statements in TCL. Instead there are COMMANDS that simpily act like
3583 control flow operators.
3585 Commands are executed like this:
3588 @item Parse the next line into (argc) and (argv[]).
3589 @item Look up (argv[0]) in a table and call its function.
3590 @item Repeat until End Of File.
3593 It sort of works like this:
3596 ReadAndParse( &argc, &argv );
3598 cmdPtr = LookupCommand( argv[0] );
3600 (*cmdPtr->Execute)( argc, argv );
3604 When the command ``proc'' is parsed (which creates a procedure
3605 function) it gets 3 parameters on the command line. @b{1} the name of
3606 the proc (function), @b{2} the list of parameters, and @b{3} the body
3607 of the function. Not the choice of words: LIST and BODY. The PROC
3608 command stores these items in a table somewhere so it can be found by
3611 @subsection The FOR Command
3613 The most interesting command to look at is the FOR command. In TCL,
3614 the FOR command is normally implimented in C. Remember, FOR is a
3615 command just like any other command.
3617 When the ascii text containing the FOR command is parsed, the parser
3618 produces 5 parameter strings, @i{(If in doubt: Refer to Rule #1)} they
3622 @item The ascii text 'for'
3623 @item The start text
3624 @item The test expression
3629 Sort of reminds you of ``main( int argc, char **argv )'' does it not?
3630 Remember @i{Rule #1 - Everything is a string.} The key point is this:
3631 Often many of those parameters are in @{curly-braces@} - thus the
3632 variables inside are not expanded or replaced until later.
3634 Remember that every TCL command looks like the classic ``main( argc,
3635 argv )'' function in C. In JimTCL - they actually look like this:
3639 MyCommand( Jim_Interp *interp,
3641 Jim_Obj * const *argvs );
3644 Real TCL is nearly identical. Although the newer versions have
3645 introduced a byte-code parser and intepreter, but at the core, it
3646 still operates in the same basic way.
3648 @subsection FOR Command Implimentation
3650 To understand TCL it is perhaps most helpful to see the FOR
3651 command. Remember, it is a COMMAND not a control flow structure.
3653 In TCL there are two underying C helper functions.
3655 Remember Rule #1 - You are a string.
3657 The @b{first} helper parses and executes commands found in an ascii
3658 string. Commands can be seperated by semi-colons, or newlines. While
3659 parsing, variables are expanded per the quoting rules
3661 The @b{second} helper evaluates an ascii string as a numerical
3662 expression and returns a value.
3664 Here is an example of how the @b{FOR} command could be
3665 implimented. The pseudo code below does not show error handling.
3667 void Execute_AsciiString( void *interp, const char *string );
3669 int Evaluate_AsciiExpression( void *interp, const char *string );
3672 MyForCommand( void *interp,
3677 SetResult( interp, "WRONG number of parameters");
3681 // argv[0] = the ascii string just like C
3683 // Execute the start statement.
3684 Execute_AsciiString( interp, argv[1] );
3688 i = Evaluate_AsciiExpression(interp, argv[2]);
3693 Execute_AsciiString( interp, argv[3] );
3695 // Execute the LOOP part
3696 Execute_AsciiString( interp, argv[4] );
3700 SetResult( interp, "" );
3705 Every other command IF, WHILE, FORMAT, PUTS, EXPR, everything works
3706 in the same basic way.
3708 @section OpenOCD TCL Usage
3710 @subsection source and find commands
3711 @b{Where:} In many configuration files
3712 @* Example: @b{ source [find FILENAME] }
3713 @*Remember the parsing rules
3715 @item The FIND command is in square brackets.
3716 @* The FIND command is executed with the parameter FILENAME. It should
3717 find the full path to the named file. The RESULT is a string, which is
3718 subsituted on the orginal command line.
3719 @item The command source is executed with the resulting filename.
3720 @* SOURCE reads a file and executes as a script.
3722 @subsection format command
3723 @b{Where:} Generally occurs in numerous places.
3724 @* TCL no command like @b{printf()}, intead it has @b{format}, which is really more like
3730 puts [format "The answer: %d" [expr $x * $y]]
3733 @item The SET command creates 2 variables, X and Y.
3734 @item The double [nested] EXPR command performs math
3735 @* The EXPR command produces numerical result as a string.
3737 @item The format command is executed, producing a single string
3738 @* Refer to Rule #1.
3739 @item The PUTS command outputs the text.
3741 @subsection Body Or Inlined Text
3742 @b{Where:} Various TARGET scripts.
3745 proc someproc @{@} @{
3746 ... multiple lines of stuff ...
3748 $_TARGETNAME configure -event FOO someproc
3749 #2 Good - no variables
3750 $_TARGETNAME confgure -event foo "this ; that;"
3751 #3 Good Curly Braces
3752 $_TARGETNAME configure -event FOO @{
3755 #4 DANGER DANGER DANGER
3756 $_TARGETNAME configure -event foo "puts \"Time: [date]\""
3759 @item The $_TARGETNAME is an OpenOCD variable convention.
3760 @*@b{$_TARGETNAME} represents the last target created, the value changes
3761 each time a new target is created. Remember the parsing rules. When
3762 the ascii text is parsed, the @b{$_TARGETNAME} becomes a simple string,
3763 the name of the target which happens to be a TARGET (object)
3765 @item The 2nd parameter to the @option{-event} parameter is a TCBODY
3766 @*There are 4 examples:
3768 @item The TCLBODY is a simple string that happens to be a proc name
3769 @item The TCLBODY is several simple commands semi-colon seperated
3770 @item The TCLBODY is a multi-line @{curly-brace@} quoted string
3771 @item The TCLBODY is a string with variables that get expanded.
3774 In the end, when the target event FOO occurs the TCLBODY is
3775 evaluated. Method @b{#1} and @b{#2} are functionally identical. For
3776 Method @b{#3} and @b{#4} it is more interesting. What is the TCLBODY?
3778 Remember the parsing rules. In case #3, @{curly-braces@} mean the
3779 $VARS and [square-brackets] are expanded later, when the EVENT occurs,
3780 and the text is evaluated. In case #4, they are replaced before the
3781 ``Target Object Command'' is executed. This occurs at the same time
3782 $_TARGETNAME is replaced. In case #4 the date will never
3783 change. @{BTW: [date] is perhaps a bad example, as of 28/nov/2008,
3784 Jim/OpenOCD does not have a date command@}
3786 @subsection Global Variables
3787 @b{Where:} You might discover this when writing your own procs @* In
3788 simple terms: Inside a PROC, if you need to access a global variable
3789 you must say so. Also see ``upvar''. Example:
3791 proc myproc @{ @} @{
3792 set y 0 #Local variable Y
3793 global x #Global variable X
3794 puts [format "X=%d, Y=%d" $x $y]
3797 @section Other Tcl Hacks
3798 @b{Dynamic Variable Creation}
3800 # Dynamically create a bunch of variables.
3801 for @{ set x 0 @} @{ $x < 32 @} @{ set x [expr $x + 1]@} @{
3803 set vn [format "BIT%d" $x]
3807 set $vn [expr (1 << $x)]
3810 @b{Dynamic Proc/Command Creation}
3812 # One "X" function - 5 uart functions.
3813 foreach who @{A B C D E@}
3814 proc [format "show_uart%c" $who] @{ @} "show_UARTx $who"
3818 @node Target library
3819 @chapter Target library
3820 @cindex Target library
3822 OpenOCD comes with a target configuration script library. These scripts can be
3823 used as-is or serve as a starting point.
3825 The target library is published together with the OpenOCD executable and
3826 the path to the target library is in the OpenOCD script search path.
3827 Similarly there are example scripts for configuring the JTAG interface.
3829 The command line below uses the example parport configuration scripts
3830 that ship with OpenOCD, then configures the str710.cfg target and
3831 finally issues the init and reset command. The communication speed
3832 is set to 10kHz for reset and 8MHz for post reset.
3836 openocd -f interface/parport.cfg -f target/str710.cfg -c "init" -c "reset"
3840 To list the target scripts available:
3843 $ ls /usr/local/lib/openocd/target
3845 arm7_fast.cfg lm3s6965.cfg pxa255.cfg stm32.cfg xba_revA3.cfg
3846 at91eb40a.cfg lpc2148.cfg pxa255_sst.cfg str710.cfg zy1000.cfg
3847 at91r40008.cfg lpc2294.cfg sam7s256.cfg str912.cfg
3848 at91sam9260.cfg nslu2.cfg sam7x256.cfg wi-9c.cfg
3856 @comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
3857 @comment case issue with ``Index.html'' and ``index.html''
3858 @comment Occurs when creating ``--html --no-split'' output
3859 @comment This fix is based on: http://sourceware.org/ml/binutils/2006-05/msg00215.html
3860 @unnumbered OpenOCD Index