3 * pic18f458.c - PIC18F458 Device Library Source
5 * This file is part of the GNU PIC Library.
8 * The GNU PIC Library is maintained by,
9 * Vangelis Rokas <vrokas@otenet.gr>
15 #include <pic18f458.h>
17 __sfr __at (0xf00) RXF0SIDH;
18 volatile __RXF0SIDHbits_t __at (0xf00) RXF0SIDHbits;
20 __sfr __at (0xf01) RXF0SIDL;
21 volatile __RXF0SIDLbits_t __at (0xf01) RXF0SIDLbits;
23 __sfr __at (0xf02) RXF0EIDH;
24 volatile __RXF0EIDHbits_t __at (0xf02) RXF0EIDHbits;
26 __sfr __at (0xf03) RXF0EIDL;
27 volatile __RXF0EIDLbits_t __at (0xf03) RXF0EIDLbits;
29 __sfr __at (0xf04) RXF1SIDH;
30 volatile __RXF1SIDHbits_t __at (0xf04) RXF1SIDHbits;
32 __sfr __at (0xf05) RXF1SIDL;
33 volatile __RXF1SIDLbits_t __at (0xf05) RXF1SIDLbits;
35 __sfr __at (0xf06) RXF1EIDH;
36 volatile __RXF1EIDHbits_t __at (0xf06) RXF1EIDHbits;
38 __sfr __at (0xf07) RXF1EIDL;
39 volatile __RXF1EIDLbits_t __at (0xf07) RXF1EIDLbits;
41 __sfr __at (0xf08) RXF2SIDH;
42 volatile __RXF2SIDHbits_t __at (0xf08) RXF2SIDHbits;
44 __sfr __at (0xf09) RXF2SIDL;
45 volatile __RXF2SIDLbits_t __at (0xf09) RXF2SIDLbits;
47 __sfr __at (0xf0a) RXF2EIDH;
48 volatile __RXF2EIDHbits_t __at (0xf0a) RXF2EIDHbits;
50 __sfr __at (0xf0b) RXF2EIDL;
51 volatile __RXF2EIDLbits_t __at (0xf0b) RXF2EIDLbits;
53 __sfr __at (0xf0c) RXF3SIDH;
54 volatile __RXF3SIDHbits_t __at (0xf0c) RXF3SIDHbits;
56 __sfr __at (0xf0d) RXF3SIDL;
57 volatile __RXF3SIDLbits_t __at (0xf0d) RXF3SIDLbits;
59 __sfr __at (0xf0e) RXF3EIDH;
60 volatile __RXF3EIDHbits_t __at (0xf0e) RXF3EIDHbits;
62 __sfr __at (0xf0f) RXF3EIDL;
63 volatile __RXF3EIDLbits_t __at (0xf0f) RXF3EIDLbits;
65 __sfr __at (0xf10) RXF4SIDH;
66 volatile __RXF4SIDHbits_t __at (0xf10) RXF4SIDHbits;
68 __sfr __at (0xf11) RXF4SIDL;
69 volatile __RXF4SIDLbits_t __at (0xf11) RXF4SIDLbits;
71 __sfr __at (0xf12) RXF4EIDH;
72 volatile __RXF4EIDHbits_t __at (0xf12) RXF4EIDHbits;
74 __sfr __at (0xf13) RXF4EIDL;
75 volatile __RXF4EIDLbits_t __at (0xf13) RXF4EIDLbits;
77 __sfr __at (0xf14) RXF5SIDH;
78 volatile __RXF5SIDHbits_t __at (0xf14) RXF5SIDHbits;
80 __sfr __at (0xf15) RXF5SIDL;
81 volatile __RXF5SIDLbits_t __at (0xf15) RXF5SIDLbits;
83 __sfr __at (0xf16) RXF5EIDH;
84 volatile __RXF5EIDHbits_t __at (0xf16) RXF5EIDHbits;
86 __sfr __at (0xf17) RXF5EIDL;
87 volatile __RXF5EIDLbits_t __at (0xf17) RXF5EIDLbits;
89 __sfr __at (0xf18) RXM0SIDH;
90 volatile __RXM0SIDHbits_t __at (0xf18) RXM0SIDHbits;
92 __sfr __at (0xf19) RXM0SIDL;
93 volatile __RXM0SIDLbits_t __at (0xf19) RXM0SIDLbits;
95 __sfr __at (0xf1a) RXM0EIDH;
96 volatile __RXM0EIDHbits_t __at (0xf1a) RXM0EIDHbits;
98 __sfr __at (0xf1b) RXM0EIDL;
99 volatile __RXM0EIDLbits_t __at (0xf1b) RXM0EIDLbits;
101 __sfr __at (0xf1c) RXM1SIDH;
102 volatile __RXM1SIDHbits_t __at (0xf1c) RXM1SIDHbits;
104 __sfr __at (0xf1d) RXM1SIDL;
105 volatile __RXM1SIDLbits_t __at (0xf1d) RXM1SIDLbits;
107 __sfr __at (0xf1e) RXM1EIDH;
108 volatile __RXM1EIDHbits_t __at (0xf1e) RXM1EIDHbits;
110 __sfr __at (0xf1f) RXM1EIDL;
111 volatile __RXM1EIDLbits_t __at (0xf1f) RXM1EIDLbits;
113 __sfr __at (0xf20) TXB2CON;
114 volatile __TXB2CONbits_t __at (0xf20) TXB2CONbits;
116 __sfr __at (0xf21) TXB2SIDH;
117 volatile __TXB2SIDHbits_t __at (0xf21) TXB2SIDHbits;
119 __sfr __at (0xf22) TXB2SIDL;
120 volatile __TXB2SIDLbits_t __at (0xf22) TXB2SIDLbits;
122 __sfr __at (0xf23) TXB2EIDH;
123 volatile __TXB2EIDHbits_t __at (0xf23) TXB2EIDHbits;
125 __sfr __at (0xf24) TXB2EIDL;
126 volatile __TXB2EIDLbits_t __at (0xf24) TXB2EIDLbits;
128 __sfr __at (0xf25) TXB2DLC;
129 volatile __TXB2DLCbits_t __at (0xf25) TXB2DLCbits;
131 __sfr __at (0xf26) TXB2D0;
132 volatile __TXB2D0bits_t __at (0xf26) TXB2D0bits;
134 __sfr __at (0xf27) TXB2D1;
135 volatile __TXB2D1bits_t __at (0xf27) TXB2D1bits;
137 __sfr __at (0xf28) TXB2D2;
138 volatile __TXB2D2bits_t __at (0xf28) TXB2D2bits;
140 __sfr __at (0xf29) TXB2D3;
141 volatile __TXB2D3bits_t __at (0xf29) TXB2D3bits;
143 __sfr __at (0xf2a) TXB2D4;
144 volatile __TXB2D4bits_t __at (0xf2a) TXB2D4bits;
146 __sfr __at (0xf2b) TXB2D5;
147 volatile __TXB2D5bits_t __at (0xf2b) TXB2D5bits;
149 __sfr __at (0xf2c) TXB2D6;
150 volatile __TXB2D6bits_t __at (0xf2c) TXB2D6bits;
152 __sfr __at (0xf2d) TXB2D7;
153 volatile __TXB2D7bits_t __at (0xf2d) TXB2D7bits;
155 __sfr __at (0xf2e) CANSTATRO4;
156 volatile __CANSTATRO4bits_t __at (0xf2e) CANSTATRO4bits;
158 __sfr __at (0xf30) TXB1CON;
159 volatile __TXB1CONbits_t __at (0xf30) TXB1CONbits;
161 __sfr __at (0xf31) TXB1SIDH;
162 volatile __TXB1SIDHbits_t __at (0xf31) TXB1SIDHbits;
164 __sfr __at (0xf32) TXB1SIDL;
165 volatile __TXB1SIDLbits_t __at (0xf32) TXB1SIDLbits;
167 __sfr __at (0xf33) TXB1EIDH;
168 volatile __TXB1EIDHbits_t __at (0xf33) TXB1EIDHbits;
170 __sfr __at (0xf34) TXB1EIDL;
171 volatile __TXB1EIDLbits_t __at (0xf34) TXB1EIDLbits;
173 __sfr __at (0xf35) TXB1DLC;
174 volatile __TXB1DLCbits_t __at (0xf35) TXB1DLCbits;
176 __sfr __at (0xf36) TXB1D0;
177 volatile __TXB1D0bits_t __at (0xf36) TXB1D0bits;
179 __sfr __at (0xf37) TXB1D1;
180 volatile __TXB1D1bits_t __at (0xf37) TXB1D1bits;
182 __sfr __at (0xf38) TXB1D2;
183 volatile __TXB1D2bits_t __at (0xf38) TXB1D2bits;
185 __sfr __at (0xf39) TXB1D3;
186 volatile __TXB1D3bits_t __at (0xf39) TXB1D3bits;
188 __sfr __at (0xf3a) TXB1D4;
189 volatile __TXB1D4bits_t __at (0xf3a) TXB1D4bits;
191 __sfr __at (0xf3b) TXB1D5;
192 volatile __TXB1D5bits_t __at (0xf3b) TXB1D5bits;
194 __sfr __at (0xf3c) TXB1D6;
195 volatile __TXB1D6bits_t __at (0xf3c) TXB1D6bits;
197 __sfr __at (0xf3d) TXB1D7;
198 volatile __TXB1D7bits_t __at (0xf3d) TXB1D7bits;
200 __sfr __at (0xf3e) CANSTATRO3;
201 volatile __CANSTATRO3bits_t __at (0xf3e) CANSTATRO3bits;
203 __sfr __at (0xf40) TXB0CON;
204 volatile __TXB0CONbits_t __at (0xf40) TXB0CONbits;
206 __sfr __at (0xf41) TXB0SIDH;
207 volatile __TXB0SIDHbits_t __at (0xf41) TXB0SIDHbits;
209 __sfr __at (0xf42) TXB0SIDL;
210 volatile __TXB0SIDLbits_t __at (0xf42) TXB0SIDLbits;
212 __sfr __at (0xf43) TXB0EIDH;
213 volatile __TXB0EIDHbits_t __at (0xf43) TXB0EIDHbits;
215 __sfr __at (0xf44) TXB0EIDL;
216 volatile __TXB0EIDLbits_t __at (0xf44) TXB0EIDLbits;
218 __sfr __at (0xf45) TXB0DLC;
219 volatile __TXB0DLCbits_t __at (0xf45) TXB0DLCbits;
221 __sfr __at (0xf46) TXB0D0;
222 volatile __TXB0D0bits_t __at (0xf46) TXB0D0bits;
224 __sfr __at (0xf47) TXB0D1;
225 volatile __TXB0D1bits_t __at (0xf47) TXB0D1bits;
227 __sfr __at (0xf48) TXB0D2;
228 volatile __TXB0D2bits_t __at (0xf48) TXB0D2bits;
230 __sfr __at (0xf49) TXB0D3;
231 volatile __TXB0D3bits_t __at (0xf49) TXB0D3bits;
233 __sfr __at (0xf4a) TXB0D4;
234 volatile __TXB0D4bits_t __at (0xf4a) TXB0D4bits;
236 __sfr __at (0xf4b) TXB0D5;
237 volatile __TXB0D5bits_t __at (0xf4b) TXB0D5bits;
239 __sfr __at (0xf4c) TXB0D6;
240 volatile __TXB0D6bits_t __at (0xf4c) TXB0D6bits;
242 __sfr __at (0xf4d) TXB0D7;
243 volatile __TXB0D7bits_t __at (0xf4d) TXB0D7bits;
245 __sfr __at (0xf4e) CANSTATRO2;
246 volatile __CANSTATRO2bits_t __at (0xf4e) CANSTATRO2bits;
248 __sfr __at (0xf50) RXB1CON;
249 volatile __RXB1CONbits_t __at (0xf50) RXB1CONbits;
251 __sfr __at (0xf51) RXB1SIDH;
252 volatile __RXB1SIDHbits_t __at (0xf51) RXB1SIDHbits;
254 __sfr __at (0xf52) RXB1SIDL;
255 volatile __RXB1SIDLbits_t __at (0xf52) RXB1SIDLbits;
257 __sfr __at (0xf53) RXB1EIDH;
258 volatile __RXB1EIDHbits_t __at (0xf53) RXB1EIDHbits;
260 __sfr __at (0xf54) RXB1EIDL;
261 volatile __RXB1EIDLbits_t __at (0xf54) RXB1EIDLbits;
263 __sfr __at (0xf55) RXB1DLC;
264 volatile __RXB1DLCbits_t __at (0xf55) RXB1DLCbits;
266 __sfr __at (0xf56) RXB1D0;
267 volatile __RXB1D0bits_t __at (0xf56) RXB1D0bits;
269 __sfr __at (0xf57) RXB1D1;
270 volatile __RXB1D1bits_t __at (0xf57) RXB1D1bits;
272 __sfr __at (0xf58) RXB1D2;
273 volatile __RXB1D2bits_t __at (0xf58) RXB1D2bits;
275 __sfr __at (0xf59) RXB1D3;
276 volatile __RXB1D3bits_t __at (0xf59) RXB1D3bits;
278 __sfr __at (0xf5a) RXB1D4;
279 volatile __RXB1D4bits_t __at (0xf5a) RXB1D4bits;
281 __sfr __at (0xf5b) RXB1D5;
282 volatile __RXB1D5bits_t __at (0xf5b) RXB1D5bits;
284 __sfr __at (0xf5c) RXB1D6;
285 volatile __RXB1D6bits_t __at (0xf5c) RXB1D6bits;
287 __sfr __at (0xf5d) RXB1D7;
288 volatile __RXB1D7bits_t __at (0xf5d) RXB1D7bits;
290 __sfr __at (0xf5e) CANSTATRO1;
291 volatile __CANSTATRO1bits_t __at (0xf5e) CANSTATRO1bits;
293 __sfr __at (0xf60) RXB0CON;
294 volatile __RXB0CONbits_t __at (0xf60) RXB0CONbits;
296 __sfr __at (0xf61) RXB0SIDH;
297 volatile __RXB0SIDHbits_t __at (0xf61) RXB0SIDHbits;
299 __sfr __at (0xf62) RXB0SIDL;
300 volatile __RXB0SIDLbits_t __at (0xf62) RXB0SIDLbits;
302 __sfr __at (0xf63) RXB0EIDH;
303 volatile __RXB0EIDHbits_t __at (0xf63) RXB0EIDHbits;
305 __sfr __at (0xf64) RXB0EIDL;
306 volatile __RXB0EIDLbits_t __at (0xf64) RXB0EIDLbits;
308 __sfr __at (0xf65) RXB0DLC;
309 volatile __RXB0DLCbits_t __at (0xf65) RXB0DLCbits;
311 __sfr __at (0xf66) RXB0D0;
312 __sfr __at (0xf67) RXB0D1;
313 __sfr __at (0xf68) RXB0D2;
314 __sfr __at (0xf69) RXB0D3;
315 __sfr __at (0xf6a) RXB0D4;
316 __sfr __at (0xf6b) RXB0D5;
317 __sfr __at (0xf6c) RXB0D6;
318 __sfr __at (0xf6d) RXB0D7;
319 __sfr __at (0xf6e) CANSTAT;
320 volatile __CANSTATbits_t __at (0xf6e) CANSTATbits;
322 __sfr __at (0xf6f) CANCON;
323 volatile __CANCONbits_t __at (0xf6f) CANCONbits;
325 __sfr __at (0xf70) BRGCON1;
326 volatile __BRGCON1bits_t __at (0xf70) BRGCON1bits;
328 __sfr __at (0xf71) BRGCON2;
329 volatile __BRGCON2bits_t __at (0xf71) BRGCON2bits;
331 __sfr __at (0xf72) BRGCON3;
332 volatile __BRGCON3bits_t __at (0xf72) BRGCON3bits;
334 __sfr __at (0xf73) CIOCON;
335 volatile __CIOCONbits_t __at (0xf73) CIOCONbits;
337 __sfr __at (0xf74) COMSTAT;
338 volatile __COMSTATbits_t __at (0xf74) COMSTATbits;
340 __sfr __at (0xf75) RXERRCNT;
341 volatile __RXERRCNTbits_t __at (0xf75) RXERRCNTbits;
343 __sfr __at (0xf76) TXERRCNT;
344 volatile __TXERRCNTbits_t __at (0xf76) TXERRCNTbits;
346 __sfr __at (0xf80) PORTA;
347 volatile __PORTAbits_t __at (0xf80) PORTAbits;
349 __sfr __at (0xf81) PORTB;
350 volatile __PORTBbits_t __at (0xf81) PORTBbits;
352 __sfr __at (0xf82) PORTC;
353 volatile __PORTCbits_t __at (0xf82) PORTCbits;
355 __sfr __at (0xf83) PORTD;
356 volatile __PORTDbits_t __at (0xf83) PORTDbits;
358 __sfr __at (0xf84) PORTE;
359 volatile __PORTEbits_t __at (0xf84) PORTEbits;
361 __sfr __at (0xf89) LATA;
362 volatile __LATAbits_t __at (0xf89) LATAbits;
364 __sfr __at (0xf8a) LATB;
365 volatile __LATBbits_t __at (0xf8a) LATBbits;
367 __sfr __at (0xf8b) LATC;
368 volatile __LATCbits_t __at (0xf8b) LATCbits;
370 __sfr __at (0xf8c) LATD;
371 volatile __LATDbits_t __at (0xf8c) LATDbits;
373 __sfr __at (0xf8d) LATE;
374 volatile __LATEbits_t __at (0xf8d) LATEbits;
376 __sfr __at (0xf92) TRISA;
377 volatile __TRISAbits_t __at (0xf92) TRISAbits;
379 __sfr __at (0xf93) TRISB;
380 volatile __TRISBbits_t __at (0xf93) TRISBbits;
382 __sfr __at (0xf94) TRISC;
383 volatile __TRISCbits_t __at (0xf94) TRISCbits;
385 __sfr __at (0xf95) TRISD;
386 volatile __TRISDbits_t __at (0xf95) TRISDbits;
388 __sfr __at (0xf96) TRISE;
389 volatile __TRISEbits_t __at (0xf96) TRISEbits;
391 __sfr __at (0xf9d) PIE1;
392 volatile __PIE1bits_t __at (0xf9d) PIE1bits;
394 __sfr __at (0xf9e) PIR1;
395 volatile __PIR1bits_t __at (0xf9e) PIR1bits;
397 __sfr __at (0xf9f) IPR1;
398 volatile __IPR1bits_t __at (0xf9f) IPR1bits;
400 __sfr __at (0xfa0) PIE2;
401 volatile __PIE2bits_t __at (0xfa0) PIE2bits;
403 __sfr __at (0xfa1) PIR2;
404 volatile __PIR2bits_t __at (0xfa1) PIR2bits;
406 __sfr __at (0xfa2) IPR2;
407 volatile __IPR2bits_t __at (0xfa2) IPR2bits;
409 __sfr __at (0xfa3) PIE3;
410 volatile __PIE3bits_t __at (0xfa3) PIE3bits;
412 __sfr __at (0xfa4) PIR3;
413 volatile __PIR3bits_t __at (0xfa4) PIR3bits;
415 __sfr __at (0xfa5) IPR3;
416 volatile __IPR3bits_t __at (0xfa5) IPR3bits;
418 __sfr __at (0xfa6) EECON1;
419 volatile __EECON1bits_t __at (0xfa6) EECON1bits;
421 __sfr __at (0xfa7) EECON2;
422 __sfr __at (0xfa8) EEDATA;
423 __sfr __at (0xfa9) EEADR;
424 __sfr __at (0xfab) RCSTA;
425 volatile __RCSTAbits_t __at (0xfab) RCSTAbits;
427 __sfr __at (0xfac) TXSTA;
428 volatile __TXSTAbits_t __at (0xfac) TXSTAbits;
430 __sfr __at (0xfad) TXREG;
431 __sfr __at (0xfae) RCREG;
432 __sfr __at (0xfaf) SPBRG;
433 __sfr __at (0xfb0) PSPCON;
434 volatile __PSPCONbits_t __at (0xfb0) PSPCONbits;
436 __sfr __at (0xfb1) T3CON;
437 volatile __T3CONbits_t __at (0xfb1) T3CONbits;
439 __sfr __at (0xfb2) TMR3L;
440 __sfr __at (0xfb3) TMR3H;
441 __sfr __at (0xfb4) CMCON;
442 volatile __CMCONbits_t __at (0xfb4) CMCONbits;
444 __sfr __at (0xfb5) CVRCON;
445 volatile __CVRCONbits_t __at (0xfb5) CVRCONbits;
447 __sfr __at (0xfb6) ECCPAS;
448 volatile __ECCPASbits_t __at (0xfb6) ECCPASbits;
450 __sfr __at (0xfb7) ECCP1DEL;
451 volatile __ECCP1DELbits_t __at (0xfb7) ECCP1DELbits;
453 __sfr __at (0xfba) ECCP1CON;
454 volatile __ECCP1CONbits_t __at (0xfba) ECCP1CONbits;
456 __sfr __at (0xfbb) ECCPR1L;
457 __sfr __at (0xfbc) ECCPR1H;
458 __sfr __at (0xfbd) CCP1CON;
459 volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits;
461 __sfr __at (0xfbe) CCPR1L;
462 __sfr __at (0xfbf) CCPR1H;
463 __sfr __at (0xfc1) ADCON1;
464 volatile __ADCON1bits_t __at (0xfc1) ADCON1bits;
466 __sfr __at (0xfc2) ADCON0;
467 volatile __ADCON0bits_t __at (0xfc2) ADCON0bits;
469 __sfr __at (0xfc3) ADRESL;
470 __sfr __at (0xfc4) ADRESH;
471 __sfr __at (0xfc5) SSPCON2;
472 volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits;
474 __sfr __at (0xfc6) SSPCON1;
475 volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits;
477 __sfr __at (0xfc7) SSPSTAT;
478 volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits;
480 __sfr __at (0xfc8) SSPADD;
481 __sfr __at (0xfc9) SSPBUF;
482 __sfr __at (0xfca) T2CON;
483 volatile __T2CONbits_t __at (0xfca) T2CONbits;
485 __sfr __at (0xfcb) PR2;
486 __sfr __at (0xfcc) TMR2;
487 __sfr __at (0xfcd) T1CON;
488 volatile __T1CONbits_t __at (0xfcd) T1CONbits;
490 __sfr __at (0xfce) TMR1L;
491 __sfr __at (0xfcf) TMR1H;
492 __sfr __at (0xfd0) RCON;
493 volatile __RCONbits_t __at (0xfd0) RCONbits;
495 __sfr __at (0xfd1) WDTCON;
496 volatile __WDTCONbits_t __at (0xfd1) WDTCONbits;
498 __sfr __at (0xfd2) LVDCON;
499 volatile __LVDCONbits_t __at (0xfd2) LVDCONbits;
501 __sfr __at (0xfd3) OSCCON;
502 volatile __OSCCONbits_t __at (0xfd3) OSCCONbits;
504 __sfr __at (0xfd5) T0CON;
505 __sfr __at (0xfd6) TMR0L;
506 __sfr __at (0xfd7) TMR0H;
507 __sfr __at (0xfd8) STATUS;
508 volatile __STATUSbits_t __at (0xfd8) STATUSbits;
510 __sfr __at (0xfd9) FSR2L;
511 __sfr __at (0xfda) FSR2H;
512 __sfr __at (0xfdb) PLUSW2;
513 __sfr __at (0xfdc) PREINC2;
514 __sfr __at (0xfdd) POSTDEC2;
515 __sfr __at (0xfde) POSTINC2;
516 __sfr __at (0xfdf) INDF2;
517 __sfr __at (0xfe0) BSR;
518 __sfr __at (0xfe1) FSR1L;
519 __sfr __at (0xfe2) FSR1H;
520 __sfr __at (0xfe3) PLUSW1;
521 __sfr __at (0xfe4) PREINC1;
522 __sfr __at (0xfe5) POSTDEC1;
523 __sfr __at (0xfe6) POSTINC1;
524 __sfr __at (0xfe7) INDF1;
525 __sfr __at (0xfe8) WREG;
526 __sfr __at (0xfe9) FSR0L;
527 __sfr __at (0xfea) FSR0H;
528 __sfr __at (0xfeb) PLUSW0;
529 __sfr __at (0xfec) PREINC0;
530 __sfr __at (0xfed) POSTDEC0;
531 __sfr __at (0xfee) POSTINC0;
532 __sfr __at (0xfef) INDF0;
533 __sfr __at (0xff0) INTCON3;
534 volatile __INTCON3bits_t __at (0xff0) INTCON3bits;
536 __sfr __at (0xff1) INTCON2;
537 volatile __INTCON2bits_t __at (0xff1) INTCON2bits;
539 __sfr __at (0xff2) INTCON;
540 volatile __INTCONbits_t __at (0xff2) INTCONbits;
542 __sfr __at (0xff3) PRODL;
543 __sfr __at (0xff4) PRODH;
544 __sfr __at (0xff5) TABLAT;
545 __sfr __at (0xff6) TBLPTRL;
546 __sfr __at (0xff7) TBLPTRH;
547 __sfr __at (0xff8) TBLPTRU;
548 __sfr __at (0xff9) PCL;
549 __sfr __at (0xffa) PCLATH;
550 __sfr __at (0xffb) PCLATU;
551 __sfr __at (0xffc) STKPTR;
552 volatile __STKPTRbits_t __at (0xffc) STKPTRbits;
554 __sfr __at (0xffd) TOSL;
555 __sfr __at (0xffe) TOSH;
556 __sfr __at (0xfff) TOSU;