2 * pic18f44j10.c - device specific definitions
4 * This file is part of the GNU PIC library for SDCC,
5 * originally devised by Vangelis Rokas <vrokas AT otenet.gr>
7 * It has been automatically generated by inc2h-pic16.pl,
8 * (c) 2007 by Raphael Neider <rneider AT web.de>
11 #include <pic18f44j10.h>
14 __sfr __at (0xF80) PORTA;
15 volatile __PORTAbits_t __at (0xF80) PORTAbits;
17 __sfr __at (0xF81) PORTB;
18 volatile __PORTBbits_t __at (0xF81) PORTBbits;
20 __sfr __at (0xF82) PORTC;
21 volatile __PORTCbits_t __at (0xF82) PORTCbits;
23 __sfr __at (0xF83) PORTD;
24 volatile __PORTDbits_t __at (0xF83) PORTDbits;
26 __sfr __at (0xF84) PORTE;
27 volatile __PORTEbits_t __at (0xF84) PORTEbits;
29 __sfr __at (0xF85) SSP2CON2;
30 volatile __SSP2CON2bits_t __at (0xF85) SSP2CON2bits;
32 __sfr __at (0xF86) SSP2CON1;
33 volatile __SSP2CON1bits_t __at (0xF86) SSP2CON1bits;
35 __sfr __at (0xF87) SSP2STAT;
36 volatile __SSP2STATbits_t __at (0xF87) SSP2STATbits;
38 __sfr __at (0xF88) SSP2ADD;
40 __sfr __at (0xF89) LATA;
41 volatile __LATAbits_t __at (0xF89) LATAbits;
43 __sfr __at (0xF8A) LATB;
44 volatile __LATBbits_t __at (0xF8A) LATBbits;
46 __sfr __at (0xF8B) LATC;
47 volatile __LATCbits_t __at (0xF8B) LATCbits;
49 __sfr __at (0xF8C) LATD;
50 volatile __LATDbits_t __at (0xF8C) LATDbits;
52 __sfr __at (0xF8D) LATE;
53 volatile __LATEbits_t __at (0xF8D) LATEbits;
55 __sfr __at (0xF8E) SSP2BUF;
57 __sfr __at (0xF92) DDRA;
58 volatile __DDRAbits_t __at (0xF92) DDRAbits;
60 __sfr __at (0xF92) TRISA;
61 volatile __TRISAbits_t __at (0xF92) TRISAbits;
63 __sfr __at (0xF93) DDRB;
64 volatile __DDRBbits_t __at (0xF93) DDRBbits;
66 __sfr __at (0xF93) TRISB;
67 volatile __TRISBbits_t __at (0xF93) TRISBbits;
69 __sfr __at (0xF94) DDRC;
70 volatile __DDRCbits_t __at (0xF94) DDRCbits;
72 __sfr __at (0xF94) TRISC;
73 volatile __TRISCbits_t __at (0xF94) TRISCbits;
75 __sfr __at (0xF95) DDRD;
76 volatile __DDRDbits_t __at (0xF95) DDRDbits;
78 __sfr __at (0xF95) TRISD;
79 volatile __TRISDbits_t __at (0xF95) TRISDbits;
81 __sfr __at (0xF96) DDRE;
82 volatile __DDREbits_t __at (0xF96) DDREbits;
84 __sfr __at (0xF96) TRISE;
85 volatile __TRISEbits_t __at (0xF96) TRISEbits;
87 __sfr __at (0xF9B) OSCTUNE;
88 volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits;
90 __sfr __at (0xF9D) PIE1;
91 volatile __PIE1bits_t __at (0xF9D) PIE1bits;
93 __sfr __at (0xF9E) PIR1;
94 volatile __PIR1bits_t __at (0xF9E) PIR1bits;
96 __sfr __at (0xF9F) IPR1;
97 volatile __IPR1bits_t __at (0xF9F) IPR1bits;
99 __sfr __at (0xFA0) PIE2;
100 volatile __PIE2bits_t __at (0xFA0) PIE2bits;
102 __sfr __at (0xFA1) PIR2;
103 volatile __PIR2bits_t __at (0xFA1) PIR2bits;
105 __sfr __at (0xFA2) IPR2;
106 volatile __IPR2bits_t __at (0xFA2) IPR2bits;
108 __sfr __at (0xFA3) PIE3;
109 volatile __PIE3bits_t __at (0xFA3) PIE3bits;
111 __sfr __at (0xFA4) PIR3;
112 volatile __PIR3bits_t __at (0xFA4) PIR3bits;
114 __sfr __at (0xFA5) IPR3;
115 volatile __IPR3bits_t __at (0xFA5) IPR3bits;
117 __sfr __at (0xFA6) EECON1;
118 volatile __EECON1bits_t __at (0xFA6) EECON1bits;
120 __sfr __at (0xFA7) EECON2;
122 __sfr __at (0xFAB) RCSTA;
123 volatile __RCSTAbits_t __at (0xFAB) RCSTAbits;
125 __sfr __at (0xFAB) RCSTA1;
126 volatile __RCSTA1bits_t __at (0xFAB) RCSTA1bits;
128 __sfr __at (0xFAC) TXSTA;
129 volatile __TXSTAbits_t __at (0xFAC) TXSTAbits;
131 __sfr __at (0xFAC) TXSTA1;
132 volatile __TXSTA1bits_t __at (0xFAC) TXSTA1bits;
134 __sfr __at (0xFAD) TXREG;
136 __sfr __at (0xFAD) TXREG1;
138 __sfr __at (0xFAE) RCREG;
140 __sfr __at (0xFAE) RCREG1;
142 __sfr __at (0xFAF) SPBRG;
144 __sfr __at (0xFAF) SPBRG1;
146 __sfr __at (0xFB0) SPBRGH;
148 __sfr __at (0xFB4) CMCON;
149 volatile __CMCONbits_t __at (0xFB4) CMCONbits;
151 __sfr __at (0xFB5) CVRCON;
152 volatile __CVRCONbits_t __at (0xFB5) CVRCONbits;
154 __sfr __at (0xFB6) ECCP1AS;
155 volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits;
157 __sfr __at (0xFB7) ECCP1DEL;
158 volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits;
160 __sfr __at (0xFB7) PWM1CON;
161 volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits;
163 __sfr __at (0xFB8) BAUDCON;
164 volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits;
166 __sfr __at (0xFB8) BAUDCTL;
167 volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits;
169 __sfr __at (0xFBA) CCP2CON;
170 volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits;
172 __sfr __at (0xFBB) CCPR2;
174 __sfr __at (0xFBB) CCPR2L;
176 __sfr __at (0xFBC) CCPR2H;
178 __sfr __at (0xFBD) CCP1CON;
179 volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits;
181 __sfr __at (0xFBD) ECCP1CON;
182 volatile __ECCP1CONbits_t __at (0xFBD) ECCP1CONbits;
184 __sfr __at (0xFBE) CCPR1;
186 __sfr __at (0xFBE) CCPR1L;
188 __sfr __at (0xFBF) CCPR1H;
190 __sfr __at (0xFC0) ADCON2;
191 volatile __ADCON2bits_t __at (0xFC0) ADCON2bits;
193 __sfr __at (0xFC1) ADCON1;
194 volatile __ADCON1bits_t __at (0xFC1) ADCON1bits;
196 __sfr __at (0xFC2) ADCON0;
197 volatile __ADCON0bits_t __at (0xFC2) ADCON0bits;
199 __sfr __at (0xFC3) ADRES;
201 __sfr __at (0xFC3) ADRESL;
203 __sfr __at (0xFC4) ADRESH;
205 __sfr __at (0xFC5) SSP1CON2;
206 volatile __SSP1CON2bits_t __at (0xFC5) SSP1CON2bits;
208 __sfr __at (0xFC5) SSPCON2;
209 volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits;
211 __sfr __at (0xFC6) SSP1CON1;
212 volatile __SSP1CON1bits_t __at (0xFC6) SSP1CON1bits;
214 __sfr __at (0xFC6) SSPCON1;
215 volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits;
217 __sfr __at (0xFC7) SSP1STAT;
218 volatile __SSP1STATbits_t __at (0xFC7) SSP1STATbits;
220 __sfr __at (0xFC7) SSPSTAT;
221 volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits;
223 __sfr __at (0xFC8) SSP1ADD;
225 __sfr __at (0xFC8) SSPADD;
227 __sfr __at (0xFC9) SSP1BUF;
229 __sfr __at (0xFC9) SSPBUF;
231 __sfr __at (0xFCA) T2CON;
232 volatile __T2CONbits_t __at (0xFCA) T2CONbits;
234 __sfr __at (0xFCB) PR2;
236 __sfr __at (0xFCC) TMR2;
238 __sfr __at (0xFCD) T1CON;
239 volatile __T1CONbits_t __at (0xFCD) T1CONbits;
241 __sfr __at (0xFCE) TMR1L;
243 __sfr __at (0xFCF) TMR1H;
245 __sfr __at (0xFD0) RCON;
246 volatile __RCONbits_t __at (0xFD0) RCONbits;
248 __sfr __at (0xFD1) WDTCON;
249 volatile __WDTCONbits_t __at (0xFD1) WDTCONbits;
251 __sfr __at (0xFD3) OSCCON;
252 volatile __OSCCONbits_t __at (0xFD3) OSCCONbits;
254 __sfr __at (0xFD5) T0CON;
255 volatile __T0CONbits_t __at (0xFD5) T0CONbits;
257 __sfr __at (0xFD6) TMR0L;
259 __sfr __at (0xFD7) TMR0H;
261 __sfr __at (0xFD8) STATUS;
262 volatile __STATUSbits_t __at (0xFD8) STATUSbits;
264 __sfr __at (0xFD9) FSR2L;
266 __sfr __at (0xFDA) FSR2H;
268 __sfr __at (0xFDB) PLUSW2;
270 __sfr __at (0xFDC) PREINC2;
272 __sfr __at (0xFDD) POSTDEC2;
274 __sfr __at (0xFDE) POSTINC2;
276 __sfr __at (0xFDF) INDF2;
278 __sfr __at (0xFE0) BSR;
280 __sfr __at (0xFE1) FSR1L;
282 __sfr __at (0xFE2) FSR1H;
284 __sfr __at (0xFE3) PLUSW1;
286 __sfr __at (0xFE4) PREINC1;
288 __sfr __at (0xFE5) POSTDEC1;
290 __sfr __at (0xFE6) POSTINC1;
292 __sfr __at (0xFE7) INDF1;
294 __sfr __at (0xFE8) WREG;
296 __sfr __at (0xFE9) FSR0L;
298 __sfr __at (0xFEA) FSR0H;
300 __sfr __at (0xFEB) PLUSW0;
302 __sfr __at (0xFEC) PREINC0;
304 __sfr __at (0xFED) POSTDEC0;
306 __sfr __at (0xFEE) POSTINC0;
308 __sfr __at (0xFEF) INDF0;
310 __sfr __at (0xFF0) INTCON3;
311 volatile __INTCON3bits_t __at (0xFF0) INTCON3bits;
313 __sfr __at (0xFF1) INTCON2;
314 volatile __INTCON2bits_t __at (0xFF1) INTCON2bits;
316 __sfr __at (0xFF2) INTCON;
317 volatile __INTCONbits_t __at (0xFF2) INTCONbits;
319 __sfr __at (0xFF3) PROD;
321 __sfr __at (0xFF3) PRODL;
323 __sfr __at (0xFF4) PRODH;
325 __sfr __at (0xFF5) TABLAT;
327 __sfr __at (0xFF6) TBLPTR;
329 __sfr __at (0xFF6) TBLPTRL;
331 __sfr __at (0xFF7) TBLPTRH;
333 __sfr __at (0xFF8) TBLPTRU;
335 __sfr __at (0xFF9) PC;
337 __sfr __at (0xFF9) PCL;
339 __sfr __at (0xFFA) PCLATH;
341 __sfr __at (0xFFB) PCLATU;
343 __sfr __at (0xFFC) STKPTR;
344 volatile __STKPTRbits_t __at (0xFFC) STKPTRbits;
346 __sfr __at (0xFFD) TOS;
348 __sfr __at (0xFFD) TOSL;
350 __sfr __at (0xFFE) TOSH;
352 __sfr __at (0xFFF) TOSU;