1 /* Register definitions for pic16f676.
2 * This file was automatically generated by:
4 * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
8 data __at (INDF_ADDR) volatile char INDF;
9 sfr __at (TMR0_ADDR) TMR0;
10 data __at (PCL_ADDR) volatile char PCL;
11 sfr __at (STATUS_ADDR) STATUS;
12 sfr __at (FSR_ADDR) FSR;
13 sfr __at (PORTA_ADDR) PORTA;
14 sfr __at (PORTC_ADDR) PORTC;
15 sfr __at (PCLATH_ADDR) PCLATH;
16 sfr __at (INTCON_ADDR) INTCON;
17 sfr __at (PIR1_ADDR) PIR1;
18 sfr __at (TMR1L_ADDR) TMR1L;
19 sfr __at (TMR1H_ADDR) TMR1H;
20 sfr __at (T1CON_ADDR) T1CON;
21 sfr __at (CMCON_ADDR) CMCON;
22 sfr __at (ADRESH_ADDR) ADRESH;
23 sfr __at (ADCON0_ADDR) ADCON0;
24 sfr __at (OPTION_REG_ADDR) OPTION_REG;
25 sfr __at (TRISA_ADDR) TRISA;
26 sfr __at (TRISC_ADDR) TRISC;
27 sfr __at (PIE1_ADDR) PIE1;
28 sfr __at (PCON_ADDR) PCON;
29 sfr __at (OSCCAL_ADDR) OSCCAL;
30 sfr __at (ANSEL_ADDR) ANSEL;
31 sfr __at (WPU_ADDR) WPU;
32 sfr __at (WPUA_ADDR) WPUA;
33 sfr __at (IOC_ADDR) IOC;
34 sfr __at (IOCA_ADDR) IOCA;
35 sfr __at (VRCON_ADDR) VRCON;
36 sfr __at (EEDATA_ADDR) EEDATA;
37 sfr __at (EEDAT_ADDR) EEDAT;
38 sfr __at (EEADR_ADDR) EEADR;
39 sfr __at (EECON1_ADDR) EECON1;
40 sfr __at (EECON2_ADDR) EECON2;
41 sfr __at (ADRESL_ADDR) ADRESL;
42 sfr __at (ADCON1_ADDR) ADCON1;
45 // bitfield definitions
47 volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
48 volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits;
49 volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
50 volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
51 volatile __OSCCAL_bits_t __at(OSCCAL_ADDR) OSCCAL_bits;
52 volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
53 volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
54 volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
55 volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
56 volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
57 volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits;