1 /* Register definitions for pic16c925.
2 * This file was automatically generated by:
4 * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
8 __sfr __at (INDF_ADDR) INDF;
9 __sfr __at (TMR0_ADDR) TMR0;
10 __sfr __at (PCL_ADDR) PCL;
11 __sfr __at (STATUS_ADDR) STATUS;
12 __sfr __at (FSR_ADDR) FSR;
13 __sfr __at (PORTA_ADDR) PORTA;
14 __sfr __at (PORTB_ADDR) PORTB;
15 __sfr __at (PORTC_ADDR) PORTC;
16 __sfr __at (PORTD_ADDR) PORTD;
17 __sfr __at (PORTE_ADDR) PORTE;
18 __sfr __at (PCLATH_ADDR) PCLATH;
19 __sfr __at (INTCON_ADDR) INTCON;
20 __sfr __at (PIR1_ADDR) PIR1;
21 __sfr __at (TMR1L_ADDR) TMR1L;
22 __sfr __at (TMR1H_ADDR) TMR1H;
23 __sfr __at (T1CON_ADDR) T1CON;
24 __sfr __at (TMR2_ADDR) TMR2;
25 __sfr __at (T2CON_ADDR) T2CON;
26 __sfr __at (SSPBUF_ADDR) SSPBUF;
27 __sfr __at (SSPCON_ADDR) SSPCON;
28 __sfr __at (CCPR1L_ADDR) CCPR1L;
29 __sfr __at (CCPR1H_ADDR) CCPR1H;
30 __sfr __at (CCP1CON_ADDR) CCP1CON;
31 __sfr __at (ADRESH_ADDR) ADRESH;
32 __sfr __at (ADCON0_ADDR) ADCON0;
33 __sfr __at (OPTION_REG_ADDR) OPTION_REG;
34 __sfr __at (TRISA_ADDR) TRISA;
35 __sfr __at (TRISB_ADDR) TRISB;
36 __sfr __at (TRISC_ADDR) TRISC;
37 __sfr __at (TRISD_ADDR) TRISD;
38 __sfr __at (TRISE_ADDR) TRISE;
39 __sfr __at (PIE1_ADDR) PIE1;
40 __sfr __at (PCON_ADDR) PCON;
41 __sfr __at (PR2_ADDR) PR2;
42 __sfr __at (SSPADD_ADDR) SSPADD;
43 __sfr __at (SSPSTAT_ADDR) SSPSTAT;
44 __sfr __at (ADRESL_ADDR) ADRESL;
45 __sfr __at (ADCON1_ADDR) ADCON1;
46 __sfr __at (PORTF_ADDR) PORTF;
47 __sfr __at (PORTG_ADDR) PORTG;
48 __sfr __at (PMCON1_ADDR) PMCON1;
49 __sfr __at (LCDSE_ADDR) LCDSE;
50 __sfr __at (LCDPS_ADDR) LCDPS;
51 __sfr __at (LCDCON_ADDR) LCDCON;
52 __sfr __at (LCDD00_ADDR) LCDD00;
53 __sfr __at (LCDD01_ADDR) LCDD01;
54 __sfr __at (LCDD02_ADDR) LCDD02;
55 __sfr __at (LCDD03_ADDR) LCDD03;
56 __sfr __at (LCDD04_ADDR) LCDD04;
57 __sfr __at (LCDD05_ADDR) LCDD05;
58 __sfr __at (LCDD06_ADDR) LCDD06;
59 __sfr __at (LCDD07_ADDR) LCDD07;
60 __sfr __at (LCDD08_ADDR) LCDD08;
61 __sfr __at (LCDD09_ADDR) LCDD09;
62 __sfr __at (LCDD10_ADDR) LCDD10;
63 __sfr __at (LCDD11_ADDR) LCDD11;
64 __sfr __at (LCDD12_ADDR) LCDD12;
65 __sfr __at (LCDD13_ADDR) LCDD13;
66 __sfr __at (LCDD14_ADDR) LCDD14;
67 __sfr __at (LCDD15_ADDR) LCDD15;
68 __sfr __at (TRISF_ADDR) TRISF;
69 __sfr __at (TRISG_ADDR) TRISG;
70 __sfr __at (PMDATA_ADDR) PMDATA;
71 __sfr __at (PMDATH_ADDR) PMDATH;
72 __sfr __at (PMADR_ADDR) PMADR;
73 __sfr __at (PMADRH_ADDR) PMADRH;
76 // bitfield definitions
78 volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
79 volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
80 volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits;
81 volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
82 volatile __LCDCON_bits_t __at(LCDCON_ADDR) LCDCON_bits;
83 volatile __LCDPS_bits_t __at(LCDPS_ADDR) LCDPS_bits;
84 volatile __LCDSE_bits_t __at(LCDSE_ADDR) LCDSE_bits;
85 volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
86 volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
87 volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
88 volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
89 volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits;
90 volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
91 volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
92 volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits;
93 volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits;
94 volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits;
95 volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits;
96 volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits;
97 volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
98 volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
99 volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
100 volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
101 volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;
102 volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits;
103 volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits;
104 volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits;