1 /* Register definitions for pic12f675.
2 * This file was automatically generated by:
4 * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
8 __sfr __at (INDF_ADDR) INDF;
9 __sfr __at (TMR0_ADDR) TMR0;
10 __sfr __at (PCL_ADDR) PCL;
11 __sfr __at (STATUS_ADDR) STATUS;
12 __sfr __at (FSR_ADDR) FSR;
13 __sfr __at (GPIO_ADDR) GPIO;
14 __sfr __at (PCLATH_ADDR) PCLATH;
15 __sfr __at (INTCON_ADDR) INTCON;
16 __sfr __at (PIR1_ADDR) PIR1;
17 __sfr __at (TMR1L_ADDR) TMR1L;
18 __sfr __at (TMR1H_ADDR) TMR1H;
19 __sfr __at (T1CON_ADDR) T1CON;
20 __sfr __at (CMCON_ADDR) CMCON;
21 __sfr __at (ADRESH_ADDR) ADRESH;
22 __sfr __at (ADCON0_ADDR) ADCON0;
23 __sfr __at (OPTION_REG_ADDR) OPTION_REG;
24 __sfr __at (TRISIO_ADDR) TRISIO;
25 __sfr __at (PIE1_ADDR) PIE1;
26 __sfr __at (PCON_ADDR) PCON;
27 __sfr __at (OSCCAL_ADDR) OSCCAL;
28 __sfr __at (WPU_ADDR) WPU;
29 __sfr __at (IOC_ADDR) IOC;
30 __sfr __at (IOCB_ADDR) IOCB;
31 __sfr __at (VRCON_ADDR) VRCON;
32 __sfr __at (EEDATA_ADDR) EEDATA;
33 __sfr __at (EEDAT_ADDR) EEDAT;
34 __sfr __at (EEADR_ADDR) EEADR;
35 __sfr __at (EECON1_ADDR) EECON1;
36 __sfr __at (EECON2_ADDR) EECON2;
37 __sfr __at (ADRESL_ADDR) ADRESL;
38 __sfr __at (ANSEL_ADDR) ANSEL;
41 // bitfield definitions
43 volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
44 volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits;
45 volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits;
46 volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits;
47 volatile __GPIO_bits_t __at(GPIO_ADDR) GPIO_bits;
48 volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
49 volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits;
50 volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits;
51 volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
52 volatile __OSCCAL_bits_t __at(OSCCAL_ADDR) OSCCAL_bits;
53 volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
54 volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
55 volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
56 volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
57 volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
58 volatile __TRISIO_bits_t __at(TRISIO_ADDR) TRISIO_bits;
59 volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits;