git.gag.com Git - fw/sdcc/blob - device/lib/_strlen.lst

   1                               1 ;--------------------------------------------------------
   2                               2 ; File Created by SDCC : FreeWare ANSI-C Compiler
   3                               3 ; Version 2.1.9Ga Sun Jan 16 17:31:33 2000
   4                               4
   5                               5 ;--------------------------------------------------------
   6                               6         .module _strlen
   7                               7 ;--------------------------------------------------------
   8                               8 ; publics variables in this module
   9                               9 ;--------------------------------------------------------
  10                              10         .globl _strlen
  11                              11 ;--------------------------------------------------------
  12                              12 ; special function registers
  13                              13 ;--------------------------------------------------------
  14                              14 ;--------------------------------------------------------
  15                              15 ; special function bits
  16                              16 ;--------------------------------------------------------
  17                              17 ;--------------------------------------------------------
  18                              18 ; internal ram data
  19                              19 ;--------------------------------------------------------
  20                              20         .area   DSEG    (DATA)
  21                              21 ;--------------------------------------------------------
  22                              22 ; overlayable items in internal ram
  23                              23 ;--------------------------------------------------------
  24                              24         .area   OSEG    (OVR,DATA)
  25                              25 ;--------------------------------------------------------
  26                              26 ; indirectly addressable internal ram data
  27                              27 ;--------------------------------------------------------
  28                              28         .area   ISEG    (DATA)
  29                              29 ;--------------------------------------------------------
  30                              30 ; bit data
  31                              31 ;--------------------------------------------------------
  32                              32         .area   BSEG    (BIT)
  33                              33 ;--------------------------------------------------------
  34                              34 ; external ram data
  35                              35 ;--------------------------------------------------------
  36                              36         .area   XSEG    (XDATA)
  37    0000                      37 _strlen_str_1_1:
  38    0000                      38         .ds     0x0003
  39                              39 ;--------------------------------------------------------
  40                              40 ; global & static initialisations
  41                              41 ;--------------------------------------------------------
  42                              42         .area GSINIT (CODE)
  43                              43 ;--------------------------------------------------------
  44                              44 ; code
  45                              45 ;--------------------------------------------------------
  46                              46         .area CSEG (CODE)
  47                     0000     47         G$strlen$0$0 ==.
  48                              48 ;       _strlen.c 27
  49                              49 ;       -----------------------------------------
  50                              50 ;        function strlen
  51                              51 ;       -----------------------------------------
  52    0000                      52 _strlen:
  53                     0002     53         ar2 = 0x02
  54                     0003     54         ar3 = 0x03
  55                     0004     55         ar4 = 0x04
  56                     0005     56         ar5 = 0x05
  57                     0006     57         ar6 = 0x06
  58                     0007     58         ar7 = 0x07
  59                     0000     59         ar0 = 0x00
  60                     0001     60         ar1 = 0x01
  61                              61 ;       _strlen.c 34
  62    0000 C0 F0                62         push    b
  63    0002 C0 83                63         push    dph
  64    0004 C0 82                64         push    dpl
  65    0006 90s00r00             65         mov     dptr,#_strlen_str_1_1
  66    0009 D0 E0                66         pop     acc
  67    000B F0                   67         movx    @dptr,a
  68    000C D0 E0                68         pop     acc
  69    000E A3                   69         inc     dptr
  70    000F F0                   70         movx    @dptr,a
  71    0010 D0 E0                71         pop     acc
  72    0012 A3                   72         inc     dptr
  73    0013 F0                   73         movx    @dptr,a
  74                              74 ;       _strlen.c 31
  75    0014 7A 00                75         mov     r2,#0x00
  76    0016 7B 00                76         mov     r3,#0x00
  77    0018 90s00r00             77         mov     dptr,#_strlen_str_1_1
  78    001B E0                   78         movx    a,@dptr
  79    001C FC                   79         mov     r4,a
  80    001D A3                   80         inc     dptr
  81    001E E0                   81         movx    a,@dptr
  82    001F FD                   82         mov     r5,a
  83    0020 A3                   83         inc     dptr
  84    0021 E0                   84         movx    a,@dptr
  85    0022 FE                   85         mov     r6,a
  86    0023                      86 00101$:
  87    0023 8C 07                87         mov     ar7,r4
  88    0025 8D 00                88         mov     ar0,r5
  89    0027 8E 01                89         mov     ar1,r6
  90    0029 0C                   90         inc     r4
  91    002A BC 00 01             91         cjne    r4,#0x00,00108$
  92    002D 0D                   92         inc     r5
  93    002E                      93 00108$:
  94    002E 90s00r00             94         mov     dptr,#_strlen_str_1_1
  95    0031 EC                   95         mov     a,r4
  96    0032 F0                   96         movx    @dptr,a
  97    0033 A3                   97         inc     dptr
  98    0034 ED                   98         mov     a,r5
  99    0035 F0                   99         movx    @dptr,a
 100    0036 A3                  100         inc     dptr
 101    0037 EE                  101         mov     a,r6
 102    0038 F0                  102         movx    @dptr,a
 103    0039 8F 82               103         mov     dpl,r7
 104    003B 88 83               104         mov     dph,r0
 105    003D 89 F0               105         mov     b,r1
 106    003F 12s00r00            106         lcall   __gptrget
 107                             107 ; Peephole 105   removed redundant mov
 108    0042 FF                  108         mov  r7,a
 109                             109 ; Peephole 110   removed ljmp by inverse jump logic
 110    0043 60 07               110         jz  00103$
 111    0045                     111 00109$:
 112                             112 ;       _strlen.c 32
 113    0045 0A                  113         inc     r2
 114    0046 BA 00 01            114         cjne    r2,#0x00,00110$
 115    0049 0B                  115         inc     r3
 116    004A                     116 00110$:
 117                             117 ; Peephole 132   changed ljmp to sjmp
 118    004A 80 D7               118         sjmp 00101$
 119    004C                     119 00103$:
 120                             120 ;       _strlen.c 34
 121    004C 8A 82               121         mov     dpl,r2
 122    004E 8B 83               122         mov     dph,r3
 123    0050                     123 00104$:
 124                     0050    124         C$_strlen.c$35$1$1 ==.
 125                     0050    125         XG$strlen$0$0 ==.
 126    0050 22                  126         ret
 127                             127         .area   CSEG    (CODE)