git.gag.com Git - fw/sdcc/blob - device/lib/_strcmp.lst

   1                               1 ;--------------------------------------------------------
   2                               2 ; File Created by SDCC : FreeWare ANSI-C Compiler
   3                               3 ; Version 2.1.9Ga Sun Jan 16 17:31:33 2000
   4                               4
   5                               5 ;--------------------------------------------------------
   6                               6         .module _strcmp
   7                               7 ;--------------------------------------------------------
   8                               8 ; publics variables in this module
   9                               9 ;--------------------------------------------------------
  10                              10         .globl _strcmp_PARM_2
  11                              11         .globl _strcmp
  12                              12 ;--------------------------------------------------------
  13                              13 ; special function registers
  14                              14 ;--------------------------------------------------------
  15                              15 ;--------------------------------------------------------
  16                              16 ; special function bits
  17                              17 ;--------------------------------------------------------
  18                              18 ;--------------------------------------------------------
  19                              19 ; internal ram data
  20                              20 ;--------------------------------------------------------
  21                              21         .area   DSEG    (DATA)
  22    0000                      22 _strcmp_sloc0_1_0:
  23    0000                      23         .ds     0x0001
  24    0001                      24 _strcmp_sloc1_1_0:
  25    0001                      25         .ds     0x0003
  26                              26 ;--------------------------------------------------------
  27                              27 ; overlayable items in internal ram
  28                              28 ;--------------------------------------------------------
  29                              29         .area   OSEG    (OVR,DATA)
  30                              30 ;--------------------------------------------------------
  31                              31 ; indirectly addressable internal ram data
  32                              32 ;--------------------------------------------------------
  33                              33         .area   ISEG    (DATA)
  34                              34 ;--------------------------------------------------------
  35                              35 ; bit data
  36                              36 ;--------------------------------------------------------
  37                              37         .area   BSEG    (BIT)
  38                              38 ;--------------------------------------------------------
  39                              39 ; external ram data
  40                              40 ;--------------------------------------------------------
  41                              41         .area   XSEG    (XDATA)
  42    0000                      42 _strcmp_PARM_2:
  43    0000                      43         .ds     0x0003
  44    0003                      44 _strcmp_src_1_1:
  45    0003                      45         .ds     0x0003
  46    0006                      46 _strcmp_ret_1_1:
  47    0006                      47         .ds     0x0002
  48                              48 ;--------------------------------------------------------
  49                              49 ; global & static initialisations
  50                              50 ;--------------------------------------------------------
  51                              51         .area GSINIT (CODE)
  52                              52 ;--------------------------------------------------------
  53                              53 ; code
  54                              54 ;--------------------------------------------------------
  55                              55         .area CSEG (CODE)
  56                     0000     56         G$strcmp$0$0 ==.
  57                              57 ;       _strcmp.c 27
  58                              58 ;       -----------------------------------------
  59                              59 ;        function strcmp
  60                              60 ;       -----------------------------------------
  61    0000                      61 _strcmp:
  62                     0002     62         ar2 = 0x02
  63                     0003     63         ar3 = 0x03
  64                     0004     64         ar4 = 0x04
  65                     0005     65         ar5 = 0x05
  66                     0006     66         ar6 = 0x06
  67                     0007     67         ar7 = 0x07
  68                     0000     68         ar0 = 0x00
  69                     0001     69         ar1 = 0x01
  70                              70 ;       _strcmp.c 42
  71    0000 C0 F0                71         push    b
  72    0002 C0 83                72         push    dph
  73    0004 C0 82                73         push    dpl
  74    0006 90s00r03             74         mov     dptr,#_strcmp_src_1_1
  75    0009 D0 E0                75         pop     acc
  76    000B F0                   76         movx    @dptr,a
  77    000C D0 E0                77         pop     acc
  78    000E A3                   78         inc     dptr
  79    000F F0                   79         movx    @dptr,a
  80    0010 D0 E0                80         pop     acc
  81    0012 A3                   81         inc     dptr
  82    0013 F0                   82         movx    @dptr,a
  83                              83 ;       _strcmp.c 34
  84    0014 90s00r03             84         mov     dptr,#_strcmp_src_1_1
  85    0017 E0                   85         movx    a,@dptr
  86    0018 FA                   86         mov     r2,a
  87    0019 A3                   87         inc     dptr
  88    001A E0                   88         movx    a,@dptr
  89    001B FB                   89         mov     r3,a
  90    001C A3                   90         inc     dptr
  91    001D E0                   91         movx    a,@dptr
  92    001E FC                   92         mov     r4,a
  93    001F 90s00r00             93         mov     dptr,#_strcmp_PARM_2
  94    0022 E0                   94         movx    a,@dptr
  95    0023 F5*01                95         mov     _strcmp_sloc1_1_0,a
  96    0025 A3                   96         inc     dptr
  97    0026 E0                   97         movx    a,@dptr
  98    0027 F5*02                98         mov     (_strcmp_sloc1_1_0 + 1),a
  99    0029 A3                   99         inc     dptr
 100    002A E0                  100         movx    a,@dptr
 101    002B F5*03               101         mov     (_strcmp_sloc1_1_0 + 2),a
 102    002D                     102 00102$:
 103    002D 85*01 82            103         mov     dpl,_strcmp_sloc1_1_0
 104    0030 85*02 83            104         mov     dph,(_strcmp_sloc1_1_0 + 1)
 105    0033 85*03 F0            105         mov     b,(_strcmp_sloc1_1_0 + 2)
 106    0036 12s00r00            106         lcall   __gptrget
 107    0039 F5*00               107         mov     _strcmp_sloc0_1_0,a
 108    003B 8A 82               108         mov     dpl,r2
 109    003D 8B 83               109         mov     dph,r3
 110    003F 8C F0               110         mov     b,r4
 111    0041 12s00r00            111         lcall   __gptrget
 112                             112 ; Peephole 106   removed redundant mov
 113    0044 F9                  113         mov  r1,a
 114    0045 C3                  114         clr  c
 115    0046 95*00               115         subb    a,_strcmp_sloc0_1_0
 116                             116 ; Peephole 166   removed redundant mov
 117    0048 F9                  117         mov  r1,a
 118    0049 89 00               118         mov  ar0,r1
 119    004B 33                  119         rlc     a
 120    004C 95 E0               120         subb    a,acc
 121    004E FD                  121         mov     r5,a
 122    004F 90s00r06            122         mov     dptr,#_strcmp_ret_1_1
 123    0052 E8                  123         mov     a,r0
 124    0053 F0                  124         movx    @dptr,a
 125    0054 A3                  125         inc     dptr
 126    0055 ED                  126         mov     a,r5
 127    0056 F0                  127         movx    @dptr,a
 128    0057 E9                  128         mov     a,r1
 129                             129 ; Peephole 109   removed ljmp by inverse jump logic
 130    0058 70 1E               130         jnz  00104$
 131    005A                     131 00117$:
 132    005A E5*00               132         mov     a,_strcmp_sloc0_1_0
 133                             133 ; Peephole 110   removed ljmp by inverse jump logic
 134    005C 60 1A               134         jz  00104$
 135    005E                     135 00118$:
 136                             136 ;       _strcmp.c 35
 137    005E 0A                  137         inc     r2
 138    005F BA 00 01            138         cjne    r2,#0x00,00119$
 139    0062 0B                  139         inc     r3
 140    0063                     140 00119$:
 141    0063 90s00r03            141         mov     dptr,#_strcmp_src_1_1
 142    0066 EA                  142         mov     a,r2
 143    0067 F0                  143         movx    @dptr,a
 144    0068 A3                  144         inc     dptr
 145    0069 EB                  145         mov     a,r3
 146    006A F0                  146         movx    @dptr,a
 147    006B A3                  147         inc     dptr
 148    006C EC                  148         mov     a,r4
 149    006D F0                  149         movx    @dptr,a
 150    006E 05*01               150         inc     _strcmp_sloc1_1_0
 151    0070 E4                  151         clr     a
 152    0071 B5*01 02            152         cjne    a,_strcmp_sloc1_1_0,00120$
 153    0074 05*02               153         inc     (_strcmp_sloc1_1_0 + 1)
 154    0076                     154 00120$:
 155                             155 ; Peephole 132   changed ljmp to sjmp
 156    0076 80 B5               156         sjmp 00102$
 157    0078                     157 00104$:
 158                             158 ;       _strcmp.c 37
 159    0078 90s00r03            159         mov     dptr,#_strcmp_src_1_1
 160    007B EA                  160         mov     a,r2
 161    007C F0                  161         movx    @dptr,a
 162    007D A3                  162         inc     dptr
 163    007E EB                  163         mov     a,r3
 164    007F F0                  164         movx    @dptr,a
 165    0080 A3                  165         inc     dptr
 166    0081 EC                  166         mov     a,r4
 167    0082 F0                  167         movx    @dptr,a
 168    0083 ED                  168         mov     a,r5
 169                             169 ; Peephole 111   removed ljmp by inverse jump logic
 170    0084 30 E7 0A            170         jnb  acc.7,00108$
 171    0087                     171 00121$:
 172                             172 ;       _strcmp.c 38
 173    0087 90s00r06            173         mov     dptr,#_strcmp_ret_1_1
 174                             174 ; Peephole 101   removed redundant mov
 175    008A 74 FF               175         mov  a,#0xff
 176    008C F0                  176         movx @dptr,a
 177    008D A3                  177         inc  dptr
 178    008E F0                  178         movx @dptr,a
 179                             179 ; Peephole 132   changed ljmp to sjmp
 180    008F 80 1A               180         sjmp 00109$
 181    0091                     181 00108$:
 182                             182 ;       _strcmp.c 39
 183    0091 C3                  183         clr     c
 184                             184 ; Peephole 180   changed mov to clr
 185    0092 E4                  185         clr  a
 186    0093 98                  186         subb    a,r0
 187                             187 ; Peephole 159   avoided xrl during execution
 188    0094 74 80               188         mov  a,#(0x00 ^ 0x80)
 189    0096 8D F0               189         mov     b,r5
 190    0098 63 F0 80            190         xrl     b,#0x80
 191    009B 95 F0               191         subb    a,b
 192                             192 ; Peephole 108   removed ljmp by inverse jump logic
 193    009D 50 0C               193         jnc  00109$
 194    009F                     194 00122$:
 195                             195 ;       _strcmp.c 40
 196    009F 90s00r06            196         mov     dptr,#_strcmp_ret_1_1
 197    00A2 E4                  197         clr     a
 198    00A3 A3                  198         inc     dptr
 199    00A4 F0                  199         movx    @dptr,a
 200    00A5 12s00r00            200         lcall   __decdptr
 201    00A8 74 01               201         mov     a,#0x01
 202    00AA F0                  202         movx    @dptr,a
 203    00AB                     203 00109$:
 204                             204 ;       _strcmp.c 42
 205    00AB 90s00r06            205         mov     dptr,#_strcmp_ret_1_1
 206    00AE E0                  206         movx    a,@dptr
 207    00AF FA                  207         mov     r2,a
 208    00B0 A3                  208         inc     dptr
 209    00B1 E0                  209         movx    a,@dptr
 210    00B2 FB                  210         mov     r3,a
 211    00B3 8A 82               211         mov     dpl,r2
 212    00B5 8B 83               212         mov     dph,r3
 213    00B7                     213 00110$:
 214                     00B7    214         C$_strcmp.c$43$1$1 ==.
 215                     00B7    215         XG$strcmp$0$0 ==.
 216    00B7 22                  216         ret
 217                             217         .area   CSEG    (CODE)